tangxifan a2b42c2e5f [Script] Now use variables to redirect the output directory of Verilog/SDC files		2020-10-09 16:00:41 -06:00
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openfpga_shell_script	[Script] Now use variables to redirect the output directory of Verilog/SDC files	2020-10-09 16:00:41 -06:00
openfpga_task/k4_cc_fdms/device_2x2/generate_fabric/config	[Script] Now use variables to redirect the output directory of Verilog/SDC files	2020-10-09 16:00:41 -06:00