SOFA/FPGA1212_SOFA_HD_PNR
Ganesh Gore 84ab1ac17f [SOFA_HD] Minor updates + Added labels for LVS Fix + One metal shape correction 2020-12-15 08:46:51 -07:00
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FPGA1212_FLAT_HD_SKY_Verilog [Cleanup] Renamed projects to SOFA-HD and QLSOFA-HD 2020-12-14 00:45:11 -07:00
FPGA1212_FLAT_HD_SKY_task [Cleanup] Renamed projects to SOFA-HD and QLSOFA-HD 2020-12-14 00:45:11 -07:00
FPGA1212_SOFA_HD_Verilog [SOFA_HD] Updated netlist and task 2020-12-14 01:14:14 -07:00
FPGA1212_SOFA_HD_task [SOFA_HD] Updated netlist and task 2020-12-14 01:14:14 -07:00
Verification [SOFA_HD] Updated verification script 2020-12-14 01:16:30 -07:00
fpga_top [SOFA_HD] Minor updates + Added labels for LVS Fix + One metal shape correction 2020-12-15 08:46:51 -07:00
modules [SOFA_HD] Minor updates + Added labels for LVS Fix + One metal shape correction 2020-12-15 08:46:51 -07:00
README.md [SOFA_HD] Minor updates + Added labels for LVS Fix + One metal shape correction 2020-12-15 08:46:51 -07:00
config.sh [SOFA_HD] Updated netlist and task 2020-12-14 01:14:14 -07:00

README.md

FPGA1212_FLAT_HD_SKY_PNR

12x12 FPGA designed using hierarchical flow and SKY130_FD_SC_HD. Flat Module design style