SOFA/FPGA1212_SOFA_CHD_PNR/Verification
Ganesh Gore 9f9897c5e2 [SOFA-CHD] Updated design with mux-primitive bug fixed - Calibre DRC pending 2020-12-14 00:34:42 -07:00
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ConfigChainTestFull_run [SOFA_CHD] Added Verification results 2020-12-09 00:55:27 -07:00
INIT/INIT [SOFA_CHD] Added Verification results 2020-12-09 00:55:27 -07:00
ScanChainTestFull_run [SOFA_CHD] Added Verification results 2020-12-09 00:55:27 -07:00
Makefile [SOFA-CHD] Updated design with mux-primitive bug fixed - Calibre DRC pending 2020-12-14 00:34:42 -07:00
fpga_reset_hd_sky_pnr.py [SOFA-CHD] Updated design with mux-primitive bug fixed - Calibre DRC pending 2020-12-14 00:34:42 -07:00