11 Commits

Author	SHA1	Message	Date
tangxifan	b1dc28e605	[Doc] Patch typo in fpga I/O resource overview	2020-11-17 15:32:49 -07:00
tangxifan	0d62af2980	[Doc] Add missing files about clb architecture	2020-11-17 12:04:38 -07:00
tangxifan	52076b8714	[Doc] Add detailed architecture schematic	2020-11-17 11:44:57 -07:00
tangxifan	679cb3fea2	[Doc] Minor fix on broken link	2020-11-13 18:47:51 -07:00
tangxifan	a2353355ec	[Doc] Update figures for I/O resources	2020-11-13 18:36:11 -07:00
tangxifan	8bae6bb893	[Doc] Update documentation about I/O resources	2020-11-13 17:24:43 -07:00
tangxifan	a018bd077a	[Doc] Add missing figures	2020-11-12 22:05:44 -07:00
tangxifan	67763c3464	[Doc] Update to latest architecture definition and device information	2020-11-12 21:59:14 -07:00
tangxifan	3108ba6283	[Doc] Update contact information	2020-11-12 19:51:23 -07:00
tangxifan	ca045745aa	[Doc] Update doc title	2020-11-12 19:49:57 -07:00
tangxifan	4897437c0d	[Doc] Add online documentation	2020-11-12 19:07:10 -07:00