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[Arch] Detect some bugs (will not cause verification failed) in vpr arch

This commit is contained in:
tangxifan 2020-11-09 15:12:00 -07:00
parent 69afafb581
commit 630c4060a8
1 changed files with 4 additions and 0 deletions
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4
ARCH/vpr_arch/k4_frac_N8_tileable_register_scan_chain_nonLR_caravel_io_skywater130nm.xml
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@ -579,6 +579,10 @@
<!-- We use direct connections to reduce the area to the most <!-- We use direct connections to reduce the area to the most
The global local routing is going to compensate the loss in routability The global local routing is going to compensate the loss in routability
--> -->
<!-- FIXME: The implicit port definition results in I0[0] connected to
in[2]. Such twisted connection is not expected.
I[0] should be connected to in[0]
-->
<direct name="direct_fle0" input="clb.I0" output="fle[0:0].in[0:2]"> <direct name="direct_fle0" input="clb.I0" output="fle[0:0].in[0:2]">
<!-- TODO: Timing should be backannotated from post-PnR results --> <!-- TODO: Timing should be backannotated from post-PnR results -->
</direct> </direct>