mirror of https://github.com/lnis-uofu/SOFA.git
[SOFA_HD] Updated netlist + Caravel precheck passed
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Ganesh Gore
parent
967905e046
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5c12369380
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FPGA1212_SOFA_HD_PNR/fpga_top/fpga_top_icv_in_design.nominal_25.spef (Stored with Git LFS)
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FPGA1212_SOFA_HD_PNR/fpga_top/fpga_top_icv_in_design.nominal_25.spef (Stored with Git LFS)
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@ -1,18 +1,18 @@
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| Module | Util| Area| Sites| Insts| Std_Cells
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|--------------------|----------|-----------------|-------|-------|-------
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|fpga_core_uut/sb_0__0_ | 31.45 | 8728.371200 | 6976 | 1 | 868
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|fpga_core_uut/sb_0__11_ | 47.54 | 9449.062400 | 7552 | 11 | 945
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|fpga_core_uut/sb_0__12_ | 31.62 | 8728.371200 | 6976 | 1 | 865
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|fpga_core_uut/sb_11__0_ | 47.53 | 10970.521600 | 8768 | 11 | 1033
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|fpga_core_uut/sb_11__11_ | 64.3 | 11691.212800 | 9344 | 121 | 999
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|fpga_core_uut/sb_11__12_ | 47.15 | 10970.521600 | 8768 | 11 | 1021
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|fpga_core_uut/sb_12__0_ | 42.63 | 8728.371200 | 6976 | 1 | 827
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|fpga_core_uut/sb_12__11_ | 54.85 | 9449.062400 | 7552 | 11 | 931
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|fpga_core_uut/sb_12__12_ | 43.81 | 8728.371200 | 6976 | 1 | 823
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|fpga_core_uut/cbx_12__0_ | 63.67 | 5765.529600 | 4608 | 12 | 558
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|fpga_core_uut/cbx_12__11_ | 78.43 | 5765.529600 | 4608 | 132 | 372
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|fpga_core_uut/cbx_12__12_ | 77.47 | 5765.529600 | 4608 | 12 | 366
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|fpga_core_uut/cby_0__12_ | 20.51 | 5044.838400 | 4032 | 12 | 556
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|fpga_core_uut/cby_11__12_ | 82.22 | 5044.838400 | 4032 | 132 | 291
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|fpga_core_uut/cby_12__12_ | 83.28 | 5044.838400 | 4032 | 12 | 267
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|fpga_core_uut/grid_clb_12__12_ | 77.94 | 11531.059200 | 9216 | 144 | 597
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|fpga_core_uut/sb_0__0_ | 31.64 | 8728.371200 | 6976 | 1 | 1059
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|fpga_core_uut/sb_0__11_ | 47.66 | 9449.062400 | 7552 | 11 | 1157
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|fpga_core_uut/sb_0__12_ | 31.42 | 8728.371200 | 6976 | 1 | 1044
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|fpga_core_uut/sb_11__0_ | 47.66 | 10970.521600 | 8768 | 11 | 1212
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|fpga_core_uut/sb_11__11_ | 64.33 | 11691.212800 | 9344 | 121 | 1170
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|fpga_core_uut/sb_11__12_ | 47.16 | 10970.521600 | 8768 | 11 | 1241
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|fpga_core_uut/sb_12__0_ | 42.82 | 8728.371200 | 6976 | 1 | 1038
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|fpga_core_uut/sb_12__11_ | 54.48 | 9449.062400 | 7552 | 11 | 1156
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|fpga_core_uut/sb_12__12_ | 43.74 | 8728.371200 | 6976 | 1 | 1042
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|fpga_core_uut/cbx_12__0_ | 64.32 | 5765.529600 | 4608 | 12 | 610
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|fpga_core_uut/cbx_12__11_ | 77.45 | 5765.529600 | 4608 | 132 | 481
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|fpga_core_uut/cbx_12__12_ | 77.65 | 5765.529600 | 4608 | 12 | 456
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|fpga_core_uut/cby_0__12_ | 21.25 | 5044.838400 | 4032 | 12 | 671
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|fpga_core_uut/cby_11__12_ | 83.95 | 5044.838400 | 4032 | 132 | 385
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|fpga_core_uut/cby_12__12_ | 86.76 | 5044.838400 | 4032 | 12 | 279
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|fpga_core_uut/grid_clb_12__12_ | 78.04 | 11531.059200 | 9216 | 144 | 819
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@ -1,35 +1,33 @@
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Ref Name Total Area Utilization_% Instance Count
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----------------------------------------------------------------------------------------------------
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sky130_fd_sc_hd__dfxtp_4 1330730.025600 12.95 55977
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sky130_fd_sc_hd__dfxtp_4 1434260.569600 13.96 60332
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sky130_fd_sc_hd__mux2_1 1314450.662400 12.79 116728
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sky130_fd_sc_hd__buf_8 304882.406400 2.97 20306
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sky130_fd_sc_hd__dfxtp_1 237007.308800 2.31 11839
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sky130_fd_sc_hd__buf_6 156502.598400 1.52 13898
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sky130_fd_sc_hd__dlygate4sd3_1 71628.697600 0.70 7156
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sky130_fd_sc_hd__buf_1 71340.921600 0.69 19006
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sky130_fd_sc_hd__buf_8 305948.428800 2.98 20377
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sky130_fd_sc_hd__buf_6 155140.041600 1.51 13777
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sky130_fd_sc_hd__dfxtp_1 152225.996800 1.48 7604
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sky130_fd_sc_hd__buf_1 72470.755200 0.71 19307
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sky130_fd_sc_hd__dlygate4sd3_1 71979.033600 0.70 7191
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sky130_fd_sc_hd__sdfxtp_1 60538.060800 0.59 2304
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sky130_fd_sc_hd__inv_8 44953.113600 0.44 3992
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sky130_fd_sc_hd__bufbuf_16 43331.558400 0.42 1332
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sky130_fd_sc_hd__inv_1 40520.112000 0.39 10795
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sky130_fd_sc_hd__conb_1 23561.347200 0.23 6277
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sky130_fd_sc_hd__buf_4 10089.676800 0.10 1344
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sky130_fd_sc_hd__inv_8 50211.907200 0.49 4459
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sky130_fd_sc_hd__inv_1 41969.001600 0.41 11181
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sky130_fd_sc_hd__bufbuf_16 34743.321600 0.34 1068
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sky130_fd_sc_hd__conb_1 22439.020800 0.22 5978
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sky130_fd_sc_hd__mux2_8 7567.257600 0.07 288
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sky130_fd_sc_hd__or2_0 7206.912000 0.07 1152
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sky130_fd_sc_hd__buf_12 6005.760000 0.06 300
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sky130_fd_sc_hd__buf_4 5945.702400 0.06 792
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sky130_fd_sc_hd__ebufn_4 5758.022400 0.06 354
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sky130_fd_sc_hd__buf_12 5525.299200 0.05 276
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sky130_fd_sc_hd__inv_6 4195.273600 0.04 479
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sky130_fd_sc_hd__buf_16 3936.275200 0.04 143
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sky130_fd_sc_hd__clkbuf_1 3828.672000 0.04 1020
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sky130_fd_sc_hd__dfxtp_2 3062.937600 0.03 144
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sky130_fd_sc_hd__bufbuf_8 2477.376000 0.02 132
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sky130_fd_sc_hd__buf_2 2342.246400 0.02 468
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sky130_fd_sc_hd__inv_2 2207.116800 0.02 588
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sky130_fd_sc_hd__dlygate4sd2_1 1366.310400 0.01 156
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sky130_fd_sc_hd__nand2b_1 825.792000 0.01 132
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sky130_fd_sc_hd__inv_6 3275.641600 0.03 374
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sky130_fd_sc_hd__inv_2 1621.555200 0.02 432
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sky130_fd_sc_hd__buf_2 1441.382400 0.01 288
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sky130_fd_sc_hd__dlygate4sd2_1 1269.968000 0.01 145
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sky130_fd_sc_hd__nand2b_1 900.864000 0.01 144
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sky130_fd_sc_hd__inv_4 675.648000 0.01 108
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sky130_fd_sc_hd__buf_16 330.316800 0.00 12
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sky130_fd_sc_hd__dlygate4sd1_1 324.060800 0.00 37
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sky130_fd_sc_hd__dfxtp_2 510.489600 0.00 24
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sky130_fd_sc_hd__dlygate4sd1_1 297.785600 0.00 34
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sky130_fd_sc_hd__clkbuf_8 165.158400 0.00 12
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sky130_fd_sc_hd__or2b_4 135.129600 0.00 12
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FPGA_BBOX_AREA 5973088.6656
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CORE_BBOX_AREA 10276128.1216
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FPGA_BBOX_UTIL 58.1258679818
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@ -6,7 +6,7 @@ Report : clock timing
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-setup
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Design : fpga_top
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Version: P-2019.03-SP4
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Date : Mon Dec 7 11:48:29 2020
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Date : Mon Dec 14 01:06:09 2020
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****************************************
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Information: Timer using 'PrimeTime Delay Calculation, AWP'. (TIM-050)
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@ -16,7 +16,7 @@ Information: Timer using 'PrimeTime Delay Calculation, AWP'. (TIM-050)
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--- Latency ---
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Clock Pin Trans Source Offset Network Total Corner
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---------------------------------------------------------------------------------------------------
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fpga_core_uut/sb_11__1_/mem_bottom_track_1/sky130_fd_sc_hd__dfxtp_1_0_/CLK 4.283 0.000 -- 9.187 9.187 rp-+ nominal
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fpga_core_uut/sb_2__11_/mem_bottom_track_1/sky130_fd_sc_hd__dfxtp_1_0_/CLK 4.320 0.000 -- 9.569 9.569 rp-+ nominal
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---------------------------------------------------------------------------------------------------
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Mode: full_chip
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@ -25,7 +25,7 @@ Information: Timer using 'PrimeTime Delay Calculation, AWP'. (TIM-050)
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--- Latency ---
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Clock Pin Trans Source Offset Network Total Corner
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---------------------------------------------------------------------------------------------------
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fpga_core_uut/grid_clb_11__1_/logical_tile_clb_mode_clb__0/logical_tile_clb_mode_default__fle_7/logical_tile_clb_mode_default__fle_mode_physical__fabric_0/logical_tile_clb_mode_default__fle_mode_physical__fabric_mode_default__ff_1/sky130_fd_sc_hd__sdfxtp_1_0_/CLK 0.625 0.000 -- 6.546 6.546 rp-+ nominal
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fpga_core_uut/grid_clb_11__2_/logical_tile_clb_mode_clb__0/logical_tile_clb_mode_default__fle_0/logical_tile_clb_mode_default__fle_mode_physical__fabric_0/logical_tile_clb_mode_default__fle_mode_physical__fabric_mode_default__ff_1/sky130_fd_sc_hd__sdfxtp_1_0_/CLK 0.723 0.000 -- 7.580 7.580 rp-+ nominal
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---------------------------------------------------------------------------------------------------
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****************************************
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Report : clock timing
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@ -34,7 +34,7 @@ Report : clock timing
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-setup
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Design : fpga_top
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Version: P-2019.03-SP4
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Date : Mon Dec 7 11:48:29 2020
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Date : Mon Dec 14 01:06:09 2020
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****************************************
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Information: Timer using 'PrimeTime Delay Calculation, AWP'. (TIM-050)
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@ -43,8 +43,8 @@ Information: Timer using 'PrimeTime Delay Calculation, AWP'. (TIM-050)
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Clock Pin Latency Skew Corner
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---------------------------------------------------------------------------------------------------
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fpga_core_uut/sb_10__5_/mem_left_track_33/sky130_fd_sc_hd__dfxtp_1_2_/CLK 7.995 rp-+ nominal
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fpga_core_uut/cbx_10__5_/mem_top_ipin_0/sky130_fd_sc_hd__dfxtp_1_0_/CLK 5.257 2.737 rp-+ nominal
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fpga_core_uut/sb_0__10_/mem_bottom_track_33/sky130_fd_sc_hd__dfxtp_1_1_/CLK 8.678 rp-+ nominal
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fpga_core_uut/cby_0__10_/mem_right_ipin_0/sky130_fd_sc_hd__dfxtp_1_0_/CLK 5.853 2.826 rp-+ nominal
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---------------------------------------------------------------------------------------------------
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@ -53,8 +53,8 @@ Information: Timer using 'PrimeTime Delay Calculation, AWP'. (TIM-050)
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Clock Pin Latency Skew Corner
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---------------------------------------------------------------------------------------------------
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fpga_core_uut/grid_clb_8__2_/logical_tile_clb_mode_clb__0/logical_tile_clb_mode_default__fle_7/logical_tile_clb_mode_default__fle_mode_physical__fabric_0/logical_tile_clb_mode_default__fle_mode_physical__fabric_mode_default__ff_1/sky130_fd_sc_hd__sdfxtp_1_0_/CLK 5.962 rp-+ nominal
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fpga_core_uut/grid_clb_8__3_/logical_tile_clb_mode_clb__0/logical_tile_clb_mode_default__fle_0/logical_tile_clb_mode_default__fle_mode_physical__fabric_0/logical_tile_clb_mode_default__fle_mode_physical__fabric_mode_default__ff_0/sky130_fd_sc_hd__sdfxtp_1_0_/CLK 5.241 0.721 rp-+ nominal
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fpga_core_uut/grid_clb_8__2_/logical_tile_clb_mode_clb__0/logical_tile_clb_mode_default__fle_7/logical_tile_clb_mode_default__fle_mode_physical__fabric_0/logical_tile_clb_mode_default__fle_mode_physical__fabric_mode_default__ff_1/sky130_fd_sc_hd__sdfxtp_1_0_/CLK 6.870 rp-+ nominal
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fpga_core_uut/grid_clb_8__3_/logical_tile_clb_mode_clb__0/logical_tile_clb_mode_default__fle_0/logical_tile_clb_mode_default__fle_mode_physical__fabric_0/logical_tile_clb_mode_default__fle_mode_physical__fabric_mode_default__ff_0/sky130_fd_sc_hd__sdfxtp_1_0_/CLK 5.991 0.879 rp-+ nominal
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---------------------------------------------------------------------------------------------------
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Information: Timer using 'PrimeTime Delay Calculation, AWP'. (TIM-050)
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@ -63,7 +63,7 @@ Report : global timing
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-format { narrow }
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Design : fpga_top
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Version: P-2019.03-SP4
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Date : Mon Dec 7 11:48:31 2020
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Date : Mon Dec 14 01:06:10 2020
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****************************************
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No setup violations found.
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@ -1678,14 +1678,20 @@ MACRO cbx_1__0_
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LAYER met3 ;
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POLYGON 55.365 87.205 55.365 87.2 55.58 87.2 55.58 86.88 55.365 86.88 55.365 86.875 55.035 86.875 55.035 86.88 54.82 86.88 54.82 87.2 55.035 87.2 55.035 87.205 ;
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POLYGON 25.925 87.205 25.925 87.2 26.14 87.2 26.14 86.88 25.925 86.88 25.925 86.875 25.595 86.875 25.595 86.88 25.38 86.88 25.38 87.2 25.595 87.2 25.595 87.205 ;
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POLYGON 11.88 18.17 11.88 17.87 0.65 17.87 0.65 18.15 1.2 18.15 1.2 18.17 ;
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POLYGON 65.04 15.45 65.04 15.43 65.59 15.43 65.59 15.15 56.2 15.15 56.2 15.45 ;
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POLYGON 65.59 48.09 65.59 47.81 65.04 47.81 65.04 47.79 51.14 47.79 51.14 48.09 ;
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POLYGON 16.02 18.17 16.02 17.87 0.65 17.87 0.65 18.15 1.2 18.15 1.2 18.17 ;
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POLYGON 55.365 0.165 55.365 0.16 55.58 0.16 55.58 -0.16 55.365 -0.16 55.365 -0.165 55.035 -0.165 55.035 -0.16 54.82 -0.16 54.82 0.16 55.035 0.16 55.035 0.165 ;
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POLYGON 25.925 0.165 25.925 0.16 26.14 0.16 26.14 -0.16 25.925 -0.16 25.925 -0.165 25.595 -0.165 25.595 -0.16 25.38 -0.16 25.38 0.16 25.595 0.16 25.595 0.165 ;
|
||||
POLYGON 65.84 86.64 65.84 83.85 65.04 83.85 65.04 82.75 65.84 82.75 65.84 81.81 65.04 81.81 65.04 80.71 65.84 80.71 65.84 80.45 65.04 80.45 65.04 79.35 65.84 79.35 65.84 79.09 65.04 79.09 65.04 77.99 65.84 77.99 65.84 77.73 65.04 77.73 65.04 76.63 65.84 76.63 65.84 75.69 65.04 75.69 65.04 74.59 65.84 74.59 65.84 74.33 65.04 74.33 65.04 73.23 65.84 73.23 65.84 72.97 65.04 72.97 65.04 71.87 65.84 71.87 65.84 71.61 65.04 71.61 65.04 70.51 65.84 70.51 65.84 70.25 65.04 70.25 65.04 69.15 65.84 69.15 65.84 68.89 65.04 68.89 65.04 67.79 65.84 67.79 65.84 67.53 65.04 67.53 65.04 66.43 65.84 66.43 65.84 65.49 65.04 65.49 65.04 64.39 65.84 64.39 65.84 64.13 65.04 64.13 65.04 63.03 65.84 63.03 65.84 62.77 65.04 62.77 65.04 61.67 65.84 61.67 65.84 61.41 65.04 61.41 65.04 60.31 65.84 60.31 65.84 60.05 65.04 60.05 65.04 58.95 65.84 58.95 65.84 58.01 65.04 58.01 65.04 56.91 65.84 56.91 65.84 56.65 65.04 56.65 65.04 55.55 65.84 55.55 65.84 55.29 65.04 55.29 65.04 54.19 65.84 54.19 65.84 53.93 65.04 53.93 65.04 52.83 65.84 52.83 65.84 51.89 65.04 51.89 65.04 50.79 65.84 50.79 65.84 50.53 65.04 50.53 65.04 49.43 65.84 49.43 65.84 49.17 65.04 49.17 65.04 48.07 65.84 48.07 65.84 47.81 65.04 47.81 65.04 46.71 65.84 46.71 65.84 46.45 65.04 46.45 65.04 45.35 65.84 45.35 65.84 45.09 65.04 45.09 65.04 43.99 65.84 43.99 65.84 43.73 65.04 43.73 65.04 42.63 65.84 42.63 65.84 42.37 65.04 42.37 65.04 41.27 65.84 41.27 65.84 40.33 65.04 40.33 65.04 39.23 65.84 39.23 65.84 38.97 65.04 38.97 65.04 37.87 65.84 37.87 65.84 37.61 65.04 37.61 65.04 36.51 65.84 36.51 65.84 36.25 65.04 36.25 65.04 35.15 65.84 35.15 65.84 34.89 65.04 34.89 65.04 33.79 65.84 33.79 65.84 33.53 65.04 33.53 65.04 32.43 65.84 32.43 65.84 32.17 65.04 32.17 65.04 31.07 65.84 31.07 65.84 30.13 65.04 30.13 65.04 29.03 65.84 29.03 65.84 28.77 65.04 28.77 65.04 27.67 65.84 27.67 65.84 27.41 65.04 27.41 65.04 26.31 65.84 26.31 65.84 26.05 65.04 26.05 65.04 24.95 65.84 24.95 65.84 24.69 65.04 24.69 65.04 23.59 65.84 23.59 65.84 23.33 65.04 23.33 65.04 22.23 65.84 22.23 65.84 21.97 65.04 21.97 65.04 20.87 65.84 20.87 65.84 20.61 65.04 20.61 65.04 19.51 65.84 19.51 65.84 19.25 65.04 19.25 65.04 18.15 65.84 18.15 65.84 17.89 65.04 17.89 65.04 16.79 65.84 16.79 65.84 16.53 65.04 16.53 65.04 15.43 65.84 15.43 65.84 15.17 65.04 15.17 65.04 14.07 65.84 14.07 65.84 13.81 65.04 13.81 65.04 12.71 65.84 12.71 65.84 12.45 65.04 12.45 65.04 11.35 65.84 11.35 65.84 11.09 65.04 11.09 65.04 9.99 65.84 9.99 65.84 9.73 65.04 9.73 65.04 8.63 65.84 8.63 65.84 0.4 0.4 0.4 0.4 3.19 1.2 3.19 1.2 4.29 0.4 4.29 0.4 4.55 1.2 4.55 1.2 5.65 0.4 5.65 0.4 5.91 1.2 5.91 1.2 7.01 0.4 7.01 0.4 7.27 1.2 7.27 1.2 8.37 0.4 8.37 0.4 8.63 1.2 8.63 1.2 9.73 0.4 9.73 0.4 9.99 1.2 9.99 1.2 11.09 0.4 11.09 0.4 11.35 1.2 11.35 1.2 12.45 0.4 12.45 0.4 12.71 1.2 12.71 1.2 13.81 0.4 13.81 0.4 14.07 1.2 14.07 1.2 15.17 0.4 15.17 0.4 15.43 1.2 15.43 1.2 16.53 0.4 16.53 0.4 16.79 1.2 16.79 1.2 17.89 0.4 17.89 0.4 18.15 1.2 18.15 1.2 19.25 0.4 19.25 0.4 19.51 1.2 19.51 1.2 20.61 0.4 20.61 0.4 20.87 1.2 20.87 1.2 21.97 0.4 21.97 0.4 22.23 1.2 22.23 1.2 23.33 0.4 23.33 0.4 23.59 1.2 23.59 1.2 24.69 0.4 24.69 0.4 24.95 1.2 24.95 1.2 26.05 0.4 26.05 0.4 26.31 1.2 26.31 1.2 27.41 0.4 27.41 0.4 27.67 1.2 27.67 1.2 28.77 0.4 28.77 0.4 29.03 1.2 29.03 1.2 30.13 0.4 30.13 0.4 31.07 1.2 31.07 1.2 32.17 0.4 32.17 0.4 32.43 1.2 32.43 1.2 33.53 0.4 33.53 0.4 33.79 1.2 33.79 1.2 34.89 0.4 34.89 0.4 35.15 1.2 35.15 1.2 36.25 0.4 36.25 0.4 36.51 1.2 36.51 1.2 37.61 0.4 37.61 0.4 37.87 1.2 37.87 1.2 38.97 0.4 38.97 0.4 39.23 1.2 39.23 1.2 40.33 0.4 40.33 0.4 41.27 1.2 41.27 1.2 42.37 0.4 42.37 0.4 42.63 1.2 42.63 1.2 43.73 0.4 43.73 0.4 43.99 1.2 43.99 1.2 45.09 0.4 45.09 0.4 45.35 1.2 45.35 1.2 46.45 0.4 46.45 0.4 46.71 1.2 46.71 1.2 47.81 0.4 47.81 0.4 48.07 1.2 48.07 1.2 49.17 0.4 49.17 0.4 49.43 1.2 49.43 1.2 50.53 0.4 50.53 0.4 50.79 1.2 50.79 1.2 51.89 0.4 51.89 0.4 52.15 1.2 52.15 1.2 53.25 0.4 53.25 0.4 53.51 1.2 53.51 1.2 54.61 0.4 54.61 0.4 54.87 1.2 54.87 1.2 55.97 0.4 55.97 0.4 56.23 1.2 56.23 1.2 57.33 0.4 57.33 0.4 57.59 1.2 57.59 1.2 58.69 0.4 58.69 0.4 58.95 1.2 58.95 1.2 60.05 0.4 60.05 0.4 60.31 1.2 60.31 1.2 61.41 0.4 61.41 0.4 61.67 1.2 61.67 1.2 62.77 0.4 62.77 0.4 63.71 1.2 63.71 1.2 64.81 0.4 64.81 0.4 65.07 1.2 65.07 1.2 66.17 0.4 66.17 0.4 66.43 1.2 66.43 1.2 67.53 0.4 67.53 0.4 67.79 1.2 67.79 1.2 68.89 0.4 68.89 0.4 69.15 1.2 69.15 1.2 70.25 0.4 70.25 0.4 70.51 1.2 70.51 1.2 71.61 0.4 71.61 0.4 72.55 1.2 72.55 1.2 73.65 0.4 73.65 0.4 73.91 1.2 73.91 1.2 75.01 0.4 75.01 0.4 75.27 1.2 75.27 1.2 76.37 0.4 76.37 0.4 77.31 1.2 77.31 1.2 78.41 0.4 78.41 0.4 78.67 1.2 78.67 1.2 79.77 0.4 79.77 0.4 80.03 1.2 80.03 1.2 81.13 0.4 81.13 0.4 81.39 1.2 81.39 1.2 82.49 0.4 82.49 0.4 82.75 1.2 82.75 1.2 83.85 0.4 83.85 0.4 86.64 ;
|
||||
LAYER met2 ;
|
||||
RECT 55.06 86.855 55.34 87.225 ;
|
||||
RECT 25.62 86.855 25.9 87.225 ;
|
||||
POLYGON 10.42 17.24 10.42 0.24 10.46 0.24 10.46 0.1 10.28 0.1 10.28 17.24 ;
|
||||
POLYGON 14.1 16.05 14.1 0.24 14.14 0.24 14.14 0.1 13.96 0.1 13.96 16.05 ;
|
||||
POLYGON 3.06 7.38 3.06 0.1 2.88 0.1 2.88 0.24 2.92 0.24 2.92 7.38 ;
|
||||
RECT 32.3 0.69 32.56 1.01 ;
|
||||
RECT 30.46 0.69 30.72 1.01 ;
|
||||
RECT 28.62 0.35 28.88 0.67 ;
|
||||
RECT 55.06 -0.185 55.34 0.185 ;
|
||||
RECT 25.62 -0.185 25.9 0.185 ;
|
||||
POLYGON 65.96 86.76 65.96 0.28 39.68 0.28 39.68 0.765 38.98 0.765 38.98 0.28 38.76 0.28 38.76 0.765 38.06 0.765 38.06 0.28 36.46 0.28 36.46 0.765 35.76 0.765 35.76 0.28 35.54 0.28 35.54 0.765 34.84 0.765 34.84 0.28 34.62 0.28 34.62 0.765 33.92 0.765 33.92 0.28 33.24 0.28 33.24 0.765 32.54 0.765 32.54 0.28 32.32 0.28 32.32 0.765 31.62 0.765 31.62 0.28 31.4 0.28 31.4 0.765 30.7 0.765 30.7 0.28 30.48 0.28 30.48 0.765 29.78 0.765 29.78 0.28 29.56 0.28 29.56 0.765 28.86 0.765 28.86 0.28 28.64 0.28 28.64 0.765 27.94 0.765 27.94 0.28 27.72 0.28 27.72 0.765 27.02 0.765 27.02 0.28 26.8 0.28 26.8 0.765 26.1 0.765 26.1 0.28 24.96 0.28 24.96 0.765 24.26 0.765 24.26 0.28 23.58 0.28 23.58 0.765 22.88 0.765 22.88 0.28 22.2 0.28 22.2 0.765 21.5 0.765 21.5 0.28 21.28 0.28 21.28 0.765 20.58 0.765 20.58 0.28 19.9 0.28 19.9 0.765 19.2 0.765 19.2 0.28 18.98 0.28 18.98 0.765 18.28 0.765 18.28 0.28 17.6 0.28 17.6 0.765 16.9 0.765 16.9 0.28 16.68 0.28 16.68 0.765 15.98 0.765 15.98 0.28 15.76 0.28 15.76 0.765 15.06 0.765 15.06 0.28 14.84 0.28 14.84 0.765 14.14 0.765 14.14 0.28 13.92 0.28 13.92 0.765 13.22 0.765 13.22 0.28 12.54 0.28 12.54 0.765 11.84 0.765 11.84 0.28 11.16 0.28 11.16 0.765 10.46 0.765 10.46 0.28 10.24 0.28 10.24 0.765 9.54 0.765 9.54 0.28 9.32 0.28 9.32 0.765 8.62 0.765 8.62 0.28 8.4 0.28 8.4 0.765 7.7 0.765 7.7 0.28 7.02 0.28 7.02 0.765 6.32 0.765 6.32 0.28 6.1 0.28 6.1 0.765 5.4 0.765 5.4 0.28 5.18 0.28 5.18 0.765 4.48 0.765 4.48 0.28 4.26 0.28 4.26 0.765 3.56 0.765 3.56 0.28 2.88 0.28 2.88 0.765 2.18 0.765 2.18 0.28 0.28 0.28 0.28 86.76 2.18 86.76 2.18 86.275 2.88 86.275 2.88 86.76 3.1 86.76 3.1 86.275 3.8 86.275 3.8 86.76 15.98 86.76 15.98 86.275 16.68 86.275 16.68 86.76 24.26 86.76 24.26 86.275 24.96 86.275 24.96 86.76 61.52 86.76 61.52 86.275 62.22 86.275 62.22 86.76 63.36 86.76 63.36 86.275 64.06 86.275 64.06 86.76 ;
|
||||
|
|
@ -1695,11 +1701,14 @@ MACRO cbx_1__0_
|
|||
POLYGON 64.64 85.44 64.64 77.32 61.44 77.32 61.44 70.92 64.64 70.92 64.64 56.92 61.44 56.92 61.44 50.52 64.64 50.52 64.64 36.52 61.44 36.52 61.44 30.12 64.64 30.12 64.64 16.12 61.44 16.12 61.44 9.72 64.64 9.72 64.64 1.6 1.6 1.6 1.6 9.72 4.8 9.72 4.8 16.12 1.6 16.12 1.6 30.12 4.8 30.12 4.8 36.52 1.6 36.52 1.6 50.52 4.8 50.52 4.8 56.92 1.6 56.92 1.6 70.92 4.8 70.92 4.8 77.32 1.6 77.32 1.6 85.44 ;
|
||||
LAYER met1 ;
|
||||
RECT 45.68 86.8 46.32 87.28 ;
|
||||
POLYGON 51.895 86.645 51.895 86.415 51.605 86.415 51.605 86.46 41.7 86.46 41.7 85.78 41.56 85.78 41.56 86.6 51.605 86.6 51.605 86.645 ;
|
||||
POLYGON 49.06 0.92 49.06 0.44 39.49 0.44 39.49 0.38 39.17 0.38 39.17 0.64 39.49 0.64 39.49 0.58 48.92 0.58 48.92 0.92 ;
|
||||
POLYGON 32.04 0.92 32.04 0.44 28.91 0.44 28.91 0.38 28.59 0.38 28.59 0.64 28.91 0.64 28.91 0.58 31.9 0.58 31.9 0.92 ;
|
||||
RECT 45.68 -0.24 46.32 0.24 ;
|
||||
POLYGON 46.32 86.76 46.32 86.52 65.96 86.52 65.96 84.84 65.48 84.84 65.48 83.8 65.96 83.8 65.96 82.12 65.48 82.12 65.48 81.08 65.96 81.08 65.96 79.4 65.48 79.4 65.48 78.36 65.96 78.36 65.96 76.68 65.48 76.68 65.48 75.64 65.96 75.64 65.96 73.96 65.48 73.96 65.48 72.92 65.96 72.92 65.96 71.24 65.48 71.24 65.48 70.2 65.96 70.2 65.96 68.52 65.48 68.52 65.48 67.48 65.96 67.48 65.96 65.8 65.48 65.8 65.48 64.76 65.96 64.76 65.96 63.08 65.48 63.08 65.48 62.04 65.96 62.04 65.96 60.36 65.48 60.36 65.48 59.32 65.96 59.32 65.96 57.64 65.48 57.64 65.48 56.6 65.96 56.6 65.96 54.92 65.48 54.92 65.48 53.88 65.96 53.88 65.96 52.2 65.48 52.2 65.48 51.16 65.96 51.16 65.96 49.48 65.48 49.48 65.48 48.44 65.96 48.44 65.96 46.76 65.48 46.76 65.48 45.72 65.96 45.72 65.96 44.04 65.48 44.04 65.48 43 65.96 43 65.96 41.32 65.48 41.32 65.48 40.28 65.96 40.28 65.96 38.6 65.48 38.6 65.48 37.56 65.96 37.56 65.96 35.88 65.48 35.88 65.48 34.84 65.96 34.84 65.96 33.16 65.48 33.16 65.48 32.12 65.96 32.12 65.96 30.44 65.48 30.44 65.48 29.4 65.96 29.4 65.96 27.72 65.48 27.72 65.48 26.68 65.96 26.68 65.96 25 65.48 25 65.48 23.96 65.96 23.96 65.96 22.28 65.48 22.28 65.48 21.24 65.96 21.24 65.96 19.56 65.48 19.56 65.48 18.52 65.96 18.52 65.96 16.84 65.48 16.84 65.48 15.8 65.96 15.8 65.96 14.12 65.48 14.12 65.48 13.08 65.96 13.08 65.96 11.4 65.48 11.4 65.48 10.36 65.96 10.36 65.96 8.68 65.48 8.68 65.48 7.64 65.96 7.64 65.96 5.96 65.48 5.96 65.48 4.92 65.96 4.92 65.96 3.24 65.48 3.24 65.48 2.2 65.96 2.2 65.96 0.52 46.32 0.52 46.32 0.28 45.68 0.28 45.68 0.52 0.28 0.52 0.28 2.2 0.76 2.2 0.76 3.24 0.28 3.24 0.28 4.92 0.76 4.92 0.76 5.96 0.28 5.96 0.28 7.64 0.76 7.64 0.76 8.68 0.28 8.68 0.28 10.36 0.76 10.36 0.76 11.4 0.28 11.4 0.28 13.08 0.76 13.08 0.76 14.12 0.28 14.12 0.28 15.8 0.76 15.8 0.76 16.84 0.28 16.84 0.28 18.52 0.76 18.52 0.76 19.56 0.28 19.56 0.28 21.24 0.76 21.24 0.76 22.28 0.28 22.28 0.28 23.96 0.76 23.96 0.76 25 0.28 25 0.28 26.68 0.76 26.68 0.76 27.72 0.28 27.72 0.28 29.4 0.76 29.4 0.76 30.44 0.28 30.44 0.28 32.12 0.76 32.12 0.76 33.16 0.28 33.16 0.28 34.84 0.76 34.84 0.76 35.88 0.28 35.88 0.28 37.56 0.76 37.56 0.76 38.6 0.28 38.6 0.28 40.28 0.76 40.28 0.76 41.32 0.28 41.32 0.28 43 0.76 43 0.76 44.04 0.28 44.04 0.28 45.72 0.76 45.72 0.76 46.76 0.28 46.76 0.28 48.44 0.76 48.44 0.76 49.48 0.28 49.48 0.28 51.16 0.76 51.16 0.76 52.2 0.28 52.2 0.28 53.88 0.76 53.88 0.76 54.92 0.28 54.92 0.28 56.6 0.76 56.6 0.76 57.64 0.28 57.64 0.28 59.32 0.76 59.32 0.76 60.36 0.28 60.36 0.28 62.04 0.76 62.04 0.76 63.08 0.28 63.08 0.28 64.76 0.76 64.76 0.76 65.8 0.28 65.8 0.28 67.48 0.76 67.48 0.76 68.52 0.28 68.52 0.28 70.2 0.76 70.2 0.76 71.24 0.28 71.24 0.28 72.92 0.76 72.92 0.76 73.96 0.28 73.96 0.28 75.64 0.76 75.64 0.76 76.68 0.28 76.68 0.28 78.36 0.76 78.36 0.76 79.4 0.28 79.4 0.28 81.08 0.76 81.08 0.76 82.12 0.28 82.12 0.28 83.8 0.76 83.8 0.76 84.84 0.28 84.84 0.28 86.52 45.68 86.52 45.68 86.76 ;
|
||||
LAYER li1 ;
|
||||
RECT 0 86.955 66.24 87.125 ;
|
||||
RECT 62.56 84.235 66.24 84.405 ;
|
||||
POLYGON 66.24 87.125 66.24 86.955 59.715 86.955 59.715 86.23 59.425 86.23 59.425 86.955 58.905 86.955 58.905 86.475 58.735 86.475 58.735 86.955 58.065 86.955 58.065 86.475 57.895 86.475 57.895 86.955 57.305 86.955 57.305 86.475 56.975 86.475 56.975 86.955 56.465 86.955 56.465 86.475 56.135 86.475 56.135 86.955 55.625 86.955 55.625 86.155 55.295 86.155 55.295 86.955 52.355 86.955 52.355 86.23 52.065 86.23 52.065 86.955 51.34 86.955 51.34 86.495 51.015 86.495 51.015 86.955 49.225 86.955 49.225 86.495 48.955 86.495 48.955 86.955 47.66 86.955 47.66 86.495 47.335 86.495 47.335 86.955 45.545 86.955 45.545 86.495 45.275 86.495 45.275 86.955 43.98 86.955 43.98 86.495 43.655 86.495 43.655 86.955 41.865 86.955 41.865 86.495 41.595 86.495 41.595 86.955 40.415 86.955 40.415 86.575 40.085 86.575 40.085 86.955 37.635 86.955 37.635 86.23 37.345 86.23 37.345 86.955 25.235 86.955 25.235 86.575 24.905 86.575 24.905 86.955 22.455 86.955 22.455 86.23 22.165 86.23 22.165 86.955 11.865 86.955 11.865 86.155 11.535 86.155 11.535 86.955 11.025 86.955 11.025 86.475 10.695 86.475 10.695 86.955 10.185 86.955 10.185 86.475 9.855 86.475 9.855 86.955 9.265 86.955 9.265 86.475 9.095 86.475 9.095 86.955 8.425 86.955 8.425 86.475 8.255 86.475 8.255 86.955 7.735 86.955 7.735 86.23 7.445 86.23 7.445 86.955 0 86.955 0 87.125 ;
|
||||
RECT 65.32 84.235 66.24 84.405 ;
|
||||
RECT 0 84.235 3.68 84.405 ;
|
||||
RECT 65.32 81.515 66.24 81.685 ;
|
||||
RECT 0 81.515 3.68 81.685 ;
|
||||
|
|
@ -1707,22 +1716,22 @@ MACRO cbx_1__0_
|
|||
RECT 0 78.795 3.68 78.965 ;
|
||||
RECT 65.32 76.075 66.24 76.245 ;
|
||||
RECT 0 76.075 3.68 76.245 ;
|
||||
RECT 62.56 73.355 66.24 73.525 ;
|
||||
RECT 0 73.355 1.84 73.525 ;
|
||||
RECT 62.56 70.635 66.24 70.805 ;
|
||||
RECT 0 70.635 1.84 70.805 ;
|
||||
RECT 65.32 73.355 66.24 73.525 ;
|
||||
RECT 0 73.355 3.68 73.525 ;
|
||||
RECT 65.32 70.635 66.24 70.805 ;
|
||||
RECT 0 70.635 3.68 70.805 ;
|
||||
RECT 65.32 67.915 66.24 68.085 ;
|
||||
RECT 0 67.915 3.68 68.085 ;
|
||||
RECT 65.32 65.195 66.24 65.365 ;
|
||||
RECT 0 65.195 3.68 65.365 ;
|
||||
RECT 62.56 62.475 66.24 62.645 ;
|
||||
RECT 0 62.475 1.84 62.645 ;
|
||||
RECT 62.56 59.755 66.24 59.925 ;
|
||||
RECT 65.32 62.475 66.24 62.645 ;
|
||||
RECT 0 62.475 3.68 62.645 ;
|
||||
RECT 65.32 59.755 66.24 59.925 ;
|
||||
RECT 0 59.755 3.68 59.925 ;
|
||||
RECT 65.32 57.035 66.24 57.205 ;
|
||||
RECT 0 57.035 3.68 57.205 ;
|
||||
RECT 65.32 54.315 66.24 54.485 ;
|
||||
RECT 0 54.315 1.84 54.485 ;
|
||||
RECT 0 54.315 3.68 54.485 ;
|
||||
RECT 65.32 51.595 66.24 51.765 ;
|
||||
RECT 0 51.595 3.68 51.765 ;
|
||||
RECT 65.32 48.875 66.24 49.045 ;
|
||||
|
|
@ -1730,10 +1739,10 @@ MACRO cbx_1__0_
|
|||
RECT 65.32 46.155 66.24 46.325 ;
|
||||
RECT 0 46.155 3.68 46.325 ;
|
||||
RECT 65.32 43.435 66.24 43.605 ;
|
||||
RECT 0 43.435 1.84 43.605 ;
|
||||
RECT 64.4 40.715 66.24 40.885 ;
|
||||
RECT 0 40.715 1.84 40.885 ;
|
||||
RECT 64.4 37.995 66.24 38.165 ;
|
||||
RECT 0 43.435 3.68 43.605 ;
|
||||
RECT 65.32 40.715 66.24 40.885 ;
|
||||
RECT 0 40.715 3.68 40.885 ;
|
||||
RECT 65.32 37.995 66.24 38.165 ;
|
||||
RECT 0 37.995 3.68 38.165 ;
|
||||
RECT 65.32 35.275 66.24 35.445 ;
|
||||
RECT 0 35.275 3.68 35.445 ;
|
||||
|
|
@ -1752,26 +1761,29 @@ MACRO cbx_1__0_
|
|||
RECT 65.32 16.235 66.24 16.405 ;
|
||||
RECT 0 16.235 3.68 16.405 ;
|
||||
RECT 65.32 13.515 66.24 13.685 ;
|
||||
RECT 0 13.515 1.84 13.685 ;
|
||||
RECT 65.32 10.795 66.24 10.965 ;
|
||||
RECT 0 10.795 1.84 10.965 ;
|
||||
RECT 65.32 8.075 66.24 8.245 ;
|
||||
RECT 0 8.075 3.68 8.245 ;
|
||||
RECT 0 13.515 3.68 13.685 ;
|
||||
RECT 62.56 10.795 66.24 10.965 ;
|
||||
RECT 0 10.795 3.68 10.965 ;
|
||||
RECT 62.56 8.075 66.24 8.245 ;
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RECT 65.32 5.355 66.24 5.525 ;
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RECT 0 5.355 3.68 5.525 ;
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RECT 62.56 2.635 66.24 2.805 ;
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RECT 0 5.355 1.84 5.525 ;
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RECT 65.32 2.635 66.24 2.805 ;
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RECT 0 2.635 3.68 2.805 ;
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RECT 0 -0.085 66.24 0.085 ;
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RECT 0.17 0.17 66.07 86.87 ;
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LAYER mcon ;
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RECT 51.665 86.445 51.835 86.615 ;
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LAYER via ;
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RECT 55.125 86.965 55.275 87.115 ;
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RECT 25.685 86.965 25.835 87.115 ;
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RECT 39.255 0.435 39.405 0.585 ;
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RECT 28.675 0.435 28.825 0.585 ;
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RECT 55.125 -0.075 55.275 0.075 ;
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RECT 25.685 -0.075 25.835 0.075 ;
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LAYER via2 ;
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RECT 55.1 86.94 55.3 87.14 ;
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RECT 25.66 86.94 25.86 87.14 ;
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RECT 1.05 36.96 1.25 37.16 ;
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RECT 55.1 -0.1 55.3 0.1 ;
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RECT 25.66 -0.1 25.86 0.1 ;
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LAYER via3 ;
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@ -1502,13 +1502,14 @@ MACRO cbx_1__1_
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LAYER met3 ;
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POLYGON 55.365 87.205 55.365 87.2 55.58 87.2 55.58 86.88 55.365 86.88 55.365 86.875 55.035 86.875 55.035 86.88 54.82 86.88 54.82 87.2 55.035 87.2 55.035 87.205 ;
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POLYGON 25.925 87.205 25.925 87.2 26.14 87.2 26.14 86.88 25.925 86.88 25.925 86.875 25.595 86.875 25.595 86.88 25.38 86.88 25.38 87.2 25.595 87.2 25.595 87.205 ;
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POLYGON 1.315 38.585 1.315 38.57 10.5 38.57 10.5 38.27 1.315 38.27 1.315 38.255 0.985 38.255 0.985 38.585 ;
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POLYGON 42.7 48.09 42.7 47.79 1.2 47.79 1.2 47.81 0.65 47.81 0.65 48.09 ;
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POLYGON 55.365 0.165 55.365 0.16 55.58 0.16 55.58 -0.16 55.365 -0.16 55.365 -0.165 55.035 -0.165 55.035 -0.16 54.82 -0.16 54.82 0.16 55.035 0.16 55.035 0.165 ;
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POLYGON 25.925 0.165 25.925 0.16 26.14 0.16 26.14 -0.16 25.925 -0.16 25.925 -0.165 25.595 -0.165 25.595 -0.16 25.38 -0.16 25.38 0.16 25.595 0.16 25.595 0.165 ;
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POLYGON 65.84 86.64 65.84 77.73 65.04 77.73 65.04 76.63 65.84 76.63 65.84 76.37 65.04 76.37 65.04 75.27 65.84 75.27 65.84 75.01 65.04 75.01 65.04 73.91 65.84 73.91 65.84 73.65 65.04 73.65 65.04 72.55 65.84 72.55 65.84 71.61 65.04 71.61 65.04 70.51 65.84 70.51 65.84 70.25 65.04 70.25 65.04 69.15 65.84 69.15 65.84 68.89 65.04 68.89 65.04 67.79 65.84 67.79 65.84 67.53 65.04 67.53 65.04 66.43 65.84 66.43 65.84 66.17 65.04 66.17 65.04 65.07 65.84 65.07 65.84 64.81 65.04 64.81 65.04 63.71 65.84 63.71 65.84 63.45 65.04 63.45 65.04 62.35 65.84 62.35 65.84 62.09 65.04 62.09 65.04 60.99 65.84 60.99 65.84 60.73 65.04 60.73 65.04 59.63 65.84 59.63 65.84 59.37 65.04 59.37 65.04 58.27 65.84 58.27 65.84 58.01 65.04 58.01 65.04 56.91 65.84 56.91 65.84 56.65 65.04 56.65 65.04 55.55 65.84 55.55 65.84 54.61 65.04 54.61 65.04 53.51 65.84 53.51 65.84 53.25 65.04 53.25 65.04 52.15 65.84 52.15 65.84 51.89 65.04 51.89 65.04 50.79 65.84 50.79 65.84 50.53 65.04 50.53 65.04 49.43 65.84 49.43 65.84 49.17 65.04 49.17 65.04 48.07 65.84 48.07 65.84 47.81 65.04 47.81 65.04 46.71 65.84 46.71 65.84 46.45 65.04 46.45 65.04 45.35 65.84 45.35 65.84 45.09 65.04 45.09 65.04 43.99 65.84 43.99 65.84 43.73 65.04 43.73 65.04 42.63 65.84 42.63 65.84 42.37 65.04 42.37 65.04 41.27 65.84 41.27 65.84 41.01 65.04 41.01 65.04 39.91 65.84 39.91 65.84 39.65 65.04 39.65 65.04 38.55 65.84 38.55 65.84 38.29 65.04 38.29 65.04 37.19 65.84 37.19 65.84 36.93 65.04 36.93 65.04 35.83 65.84 35.83 65.84 35.57 65.04 35.57 65.04 34.47 65.84 34.47 65.84 34.21 65.04 34.21 65.04 33.11 65.84 33.11 65.84 32.85 65.04 32.85 65.04 31.75 65.84 31.75 65.84 31.49 65.04 31.49 65.04 30.39 65.84 30.39 65.84 30.13 65.04 30.13 65.04 29.03 65.84 29.03 65.84 28.77 65.04 28.77 65.04 27.67 65.84 27.67 65.84 27.41 65.04 27.41 65.04 26.31 65.84 26.31 65.84 26.05 65.04 26.05 65.04 24.95 65.84 24.95 65.84 24.69 65.04 24.69 65.04 23.59 65.84 23.59 65.84 23.33 65.04 23.33 65.04 22.23 65.84 22.23 65.84 21.97 65.04 21.97 65.04 20.87 65.84 20.87 65.84 20.61 65.04 20.61 65.04 19.51 65.84 19.51 65.84 19.25 65.04 19.25 65.04 18.15 65.84 18.15 65.84 17.89 65.04 17.89 65.04 16.79 65.84 16.79 65.84 16.53 65.04 16.53 65.04 15.43 65.84 15.43 65.84 15.17 65.04 15.17 65.04 14.07 65.84 14.07 65.84 13.81 65.04 13.81 65.04 12.71 65.84 12.71 65.84 12.45 65.04 12.45 65.04 11.35 65.84 11.35 65.84 7.01 65.04 7.01 65.04 5.91 65.84 5.91 65.84 5.65 65.04 5.65 65.04 4.55 65.84 4.55 65.84 4.29 65.04 4.29 65.04 3.19 65.84 3.19 65.84 0.4 0.4 0.4 0.4 3.19 1.2 3.19 1.2 4.29 0.4 4.29 0.4 4.55 1.2 4.55 1.2 5.65 0.4 5.65 0.4 11.35 1.2 11.35 1.2 12.45 0.4 12.45 0.4 12.71 1.2 12.71 1.2 13.81 0.4 13.81 0.4 14.07 1.2 14.07 1.2 15.17 0.4 15.17 0.4 15.43 1.2 15.43 1.2 16.53 0.4 16.53 0.4 16.79 1.2 16.79 1.2 17.89 0.4 17.89 0.4 18.15 1.2 18.15 1.2 19.25 0.4 19.25 0.4 19.51 1.2 19.51 1.2 20.61 0.4 20.61 0.4 20.87 1.2 20.87 1.2 21.97 0.4 21.97 0.4 22.23 1.2 22.23 1.2 23.33 0.4 23.33 0.4 23.59 1.2 23.59 1.2 24.69 0.4 24.69 0.4 24.95 1.2 24.95 1.2 26.05 0.4 26.05 0.4 26.31 1.2 26.31 1.2 27.41 0.4 27.41 0.4 27.67 1.2 27.67 1.2 28.77 0.4 28.77 0.4 29.03 1.2 29.03 1.2 30.13 0.4 30.13 0.4 30.39 1.2 30.39 1.2 31.49 0.4 31.49 0.4 31.75 1.2 31.75 1.2 32.85 0.4 32.85 0.4 33.11 1.2 33.11 1.2 34.21 0.4 34.21 0.4 34.47 1.2 34.47 1.2 35.57 0.4 35.57 0.4 35.83 1.2 35.83 1.2 36.93 0.4 36.93 0.4 37.19 1.2 37.19 1.2 38.29 0.4 38.29 0.4 38.55 1.2 38.55 1.2 39.65 0.4 39.65 0.4 39.91 1.2 39.91 1.2 41.01 0.4 41.01 0.4 41.27 1.2 41.27 1.2 42.37 0.4 42.37 0.4 42.63 1.2 42.63 1.2 43.73 0.4 43.73 0.4 43.99 1.2 43.99 1.2 45.09 0.4 45.09 0.4 45.35 1.2 45.35 1.2 46.45 0.4 46.45 0.4 46.71 1.2 46.71 1.2 47.81 0.4 47.81 0.4 48.07 1.2 48.07 1.2 49.17 0.4 49.17 0.4 49.43 1.2 49.43 1.2 50.53 0.4 50.53 0.4 50.79 1.2 50.79 1.2 51.89 0.4 51.89 0.4 52.15 1.2 52.15 1.2 53.25 0.4 53.25 0.4 53.51 1.2 53.51 1.2 54.61 0.4 54.61 0.4 54.87 1.2 54.87 1.2 55.97 0.4 55.97 0.4 56.23 1.2 56.23 1.2 57.33 0.4 57.33 0.4 57.59 1.2 57.59 1.2 58.69 0.4 58.69 0.4 58.95 1.2 58.95 1.2 60.05 0.4 60.05 0.4 60.31 1.2 60.31 1.2 61.41 0.4 61.41 0.4 61.67 1.2 61.67 1.2 62.77 0.4 62.77 0.4 63.03 1.2 63.03 1.2 64.13 0.4 64.13 0.4 64.39 1.2 64.39 1.2 65.49 0.4 65.49 0.4 65.75 1.2 65.75 1.2 66.85 0.4 66.85 0.4 67.11 1.2 67.11 1.2 68.21 0.4 68.21 0.4 68.47 1.2 68.47 1.2 69.57 0.4 69.57 0.4 69.83 1.2 69.83 1.2 70.93 0.4 70.93 0.4 71.19 1.2 71.19 1.2 72.29 0.4 72.29 0.4 72.55 1.2 72.55 1.2 73.65 0.4 73.65 0.4 73.91 1.2 73.91 1.2 75.01 0.4 75.01 0.4 75.27 1.2 75.27 1.2 76.37 0.4 76.37 0.4 76.63 1.2 76.63 1.2 77.73 0.4 77.73 0.4 77.99 1.2 77.99 1.2 79.09 0.4 79.09 0.4 86.64 ;
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LAYER met2 ;
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RECT 55.06 86.855 55.34 87.225 ;
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RECT 25.62 86.855 25.9 87.225 ;
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POLYGON 44.46 0.92 44.46 0.27 40.6 0.27 40.6 0.41 44.32 0.41 44.32 0.92 ;
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RECT 55.06 -0.185 55.34 0.185 ;
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RECT 25.62 -0.185 25.9 0.185 ;
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POLYGON 65.96 86.76 65.96 0.28 62.22 0.28 62.22 0.765 61.52 0.765 61.52 0.28 60.84 0.28 60.84 0.765 60.14 0.765 60.14 0.28 59.92 0.28 59.92 0.765 59.22 0.765 59.22 0.28 58.54 0.28 58.54 0.765 57.84 0.765 57.84 0.28 40.6 0.28 40.6 0.765 39.9 0.765 39.9 0.28 30.48 0.28 30.48 0.765 29.78 0.765 29.78 0.28 26.8 0.28 26.8 0.765 26.1 0.765 26.1 0.28 25.42 0.28 25.42 0.765 24.72 0.765 24.72 0.28 24.5 0.28 24.5 0.765 23.8 0.765 23.8 0.28 23.58 0.28 23.58 0.765 22.88 0.765 22.88 0.28 18.52 0.28 18.52 0.765 17.82 0.765 17.82 0.28 13.46 0.28 13.46 0.765 12.76 0.765 12.76 0.28 12.54 0.28 12.54 0.765 11.84 0.765 11.84 0.28 11.62 0.28 11.62 0.765 10.92 0.765 10.92 0.28 10.7 0.28 10.7 0.765 10 0.765 10 0.28 9.78 0.28 9.78 0.765 9.08 0.765 9.08 0.28 8.4 0.28 8.4 0.765 7.7 0.765 7.7 0.28 7.48 0.28 7.48 0.765 6.78 0.765 6.78 0.28 6.1 0.28 6.1 0.765 5.4 0.765 5.4 0.28 5.18 0.28 5.18 0.765 4.48 0.765 4.48 0.28 3.8 0.28 3.8 0.765 3.1 0.765 3.1 0.28 0.28 0.28 0.28 86.76 12.76 86.76 12.76 86.275 13.46 86.275 13.46 86.76 15.98 86.76 15.98 86.275 16.68 86.275 16.68 86.76 24.26 86.76 24.26 86.275 24.96 86.275 24.96 86.76 29.78 86.76 29.78 86.275 30.48 86.275 30.48 86.76 57.38 86.76 57.38 86.275 58.08 86.275 58.08 86.76 61.52 86.76 61.52 86.275 62.22 86.275 62.22 86.76 ;
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|
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@ -1518,11 +1519,16 @@ MACRO cbx_1__1_
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POLYGON 64.64 85.44 64.64 77.32 61.44 77.32 61.44 70.92 64.64 70.92 64.64 56.92 61.44 56.92 61.44 50.52 64.64 50.52 64.64 36.52 61.44 36.52 61.44 30.12 64.64 30.12 64.64 16.12 61.44 16.12 61.44 9.72 64.64 9.72 64.64 1.6 1.6 1.6 1.6 9.72 4.8 9.72 4.8 16.12 1.6 16.12 1.6 30.12 4.8 30.12 4.8 36.52 1.6 36.52 1.6 50.52 4.8 50.52 4.8 56.92 1.6 56.92 1.6 70.92 4.8 70.92 4.8 77.32 1.6 77.32 1.6 85.44 ;
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LAYER met1 ;
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RECT 45.68 86.8 46.32 87.28 ;
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POLYGON 13.27 86.66 13.27 86.6 26.52 86.6 26.52 86.12 26.38 86.12 26.38 86.46 13.27 86.46 13.27 86.4 12.95 86.4 12.95 86.66 ;
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POLYGON 35.72 0.92 35.72 0.58 37.805 0.58 37.805 0.625 38.095 0.625 38.095 0.395 37.805 0.395 37.805 0.44 35.58 0.44 35.58 0.92 ;
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POLYGON 29.28 0.92 29.28 0.44 26.61 0.44 26.61 0.38 26.29 0.38 26.29 0.64 26.61 0.64 26.61 0.58 29.14 0.58 29.14 0.92 ;
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POLYGON 59.73 0.64 59.73 0.38 59.41 0.38 59.41 0.44 50.605 0.44 50.605 0.395 50.315 0.395 50.315 0.625 50.605 0.625 50.605 0.58 59.41 0.58 59.41 0.64 ;
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POLYGON 25.23 0.64 25.23 0.58 25.755 0.58 25.755 0.625 26.045 0.625 26.045 0.395 25.755 0.395 25.755 0.44 25.23 0.44 25.23 0.38 24.91 0.38 24.91 0.64 ;
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RECT 45.68 -0.24 46.32 0.24 ;
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POLYGON 46.32 86.76 46.32 86.52 65.96 86.52 65.96 84.84 65.48 84.84 65.48 83.8 65.96 83.8 65.96 82.12 65.48 82.12 65.48 81.08 65.96 81.08 65.96 79.4 65.48 79.4 65.48 78.36 65.96 78.36 65.96 76.68 65.48 76.68 65.48 75.64 65.96 75.64 65.96 73.96 65.48 73.96 65.48 72.92 65.96 72.92 65.96 71.24 65.48 71.24 65.48 70.2 65.96 70.2 65.96 68.52 65.48 68.52 65.48 67.48 65.96 67.48 65.96 65.8 65.48 65.8 65.48 64.76 65.96 64.76 65.96 63.08 65.48 63.08 65.48 62.04 65.96 62.04 65.96 60.36 65.48 60.36 65.48 59.32 65.96 59.32 65.96 57.64 65.48 57.64 65.48 56.6 65.96 56.6 65.96 54.92 65.48 54.92 65.48 53.88 65.96 53.88 65.96 52.2 65.48 52.2 65.48 51.16 65.96 51.16 65.96 49.48 65.48 49.48 65.48 48.44 65.96 48.44 65.96 46.76 65.48 46.76 65.48 45.72 65.96 45.72 65.96 44.04 65.48 44.04 65.48 43 65.96 43 65.96 41.32 65.48 41.32 65.48 40.28 65.96 40.28 65.96 38.6 65.48 38.6 65.48 37.56 65.96 37.56 65.96 35.88 65.48 35.88 65.48 34.84 65.96 34.84 65.96 33.16 65.48 33.16 65.48 32.12 65.96 32.12 65.96 30.44 65.48 30.44 65.48 29.4 65.96 29.4 65.96 27.72 65.48 27.72 65.48 26.68 65.96 26.68 65.96 25 65.48 25 65.48 23.96 65.96 23.96 65.96 22.28 65.48 22.28 65.48 21.24 65.96 21.24 65.96 19.56 65.48 19.56 65.48 18.52 65.96 18.52 65.96 16.84 65.48 16.84 65.48 15.8 65.96 15.8 65.96 14.12 65.48 14.12 65.48 13.08 65.96 13.08 65.96 11.4 65.48 11.4 65.48 10.36 65.96 10.36 65.96 8.68 65.48 8.68 65.48 7.64 65.96 7.64 65.96 5.96 65.48 5.96 65.48 4.92 65.96 4.92 65.96 3.24 65.48 3.24 65.48 2.2 65.96 2.2 65.96 0.52 46.32 0.52 46.32 0.28 45.68 0.28 45.68 0.52 0.28 0.52 0.28 2.2 0.76 2.2 0.76 3.24 0.28 3.24 0.28 4.92 0.76 4.92 0.76 5.96 0.28 5.96 0.28 7.64 0.76 7.64 0.76 8.68 0.28 8.68 0.28 10.36 0.76 10.36 0.76 11.4 0.28 11.4 0.28 13.08 0.76 13.08 0.76 14.12 0.28 14.12 0.28 15.8 0.76 15.8 0.76 16.84 0.28 16.84 0.28 18.52 0.76 18.52 0.76 19.56 0.28 19.56 0.28 21.24 0.76 21.24 0.76 22.28 0.28 22.28 0.28 23.96 0.76 23.96 0.76 25 0.28 25 0.28 26.68 0.76 26.68 0.76 27.72 0.28 27.72 0.28 29.4 0.76 29.4 0.76 30.44 0.28 30.44 0.28 32.12 0.76 32.12 0.76 33.16 0.28 33.16 0.28 34.84 0.76 34.84 0.76 35.88 0.28 35.88 0.28 37.56 0.76 37.56 0.76 38.6 0.28 38.6 0.28 40.28 0.76 40.28 0.76 41.32 0.28 41.32 0.28 43 0.76 43 0.76 44.04 0.28 44.04 0.28 45.72 0.76 45.72 0.76 46.76 0.28 46.76 0.28 48.44 0.76 48.44 0.76 49.48 0.28 49.48 0.28 51.16 0.76 51.16 0.76 52.2 0.28 52.2 0.28 53.88 0.76 53.88 0.76 54.92 0.28 54.92 0.28 56.6 0.76 56.6 0.76 57.64 0.28 57.64 0.28 59.32 0.76 59.32 0.76 60.36 0.28 60.36 0.28 62.04 0.76 62.04 0.76 63.08 0.28 63.08 0.28 64.76 0.76 64.76 0.76 65.8 0.28 65.8 0.28 67.48 0.76 67.48 0.76 68.52 0.28 68.52 0.28 70.2 0.76 70.2 0.76 71.24 0.28 71.24 0.28 72.92 0.76 72.92 0.76 73.96 0.28 73.96 0.28 75.64 0.76 75.64 0.76 76.68 0.28 76.68 0.28 78.36 0.76 78.36 0.76 79.4 0.28 79.4 0.28 81.08 0.76 81.08 0.76 82.12 0.28 82.12 0.28 83.8 0.76 83.8 0.76 84.84 0.28 84.84 0.28 86.52 45.68 86.52 45.68 86.76 ;
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LAYER li1 ;
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RECT 0 86.955 66.24 87.125 ;
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RECT 62.56 84.235 66.24 84.405 ;
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RECT 65.32 84.235 66.24 84.405 ;
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RECT 0 84.235 3.68 84.405 ;
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RECT 65.32 81.515 66.24 81.685 ;
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RECT 0 81.515 3.68 81.685 ;
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||||
|
|
@ -1532,30 +1538,30 @@ MACRO cbx_1__1_
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RECT 0 76.075 3.68 76.245 ;
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RECT 65.32 73.355 66.24 73.525 ;
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RECT 0 73.355 1.84 73.525 ;
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RECT 64.4 70.635 66.24 70.805 ;
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RECT 65.32 70.635 66.24 70.805 ;
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RECT 0 70.635 1.84 70.805 ;
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RECT 64.4 67.915 66.24 68.085 ;
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RECT 65.32 67.915 66.24 68.085 ;
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RECT 0 67.915 3.68 68.085 ;
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RECT 65.32 65.195 66.24 65.365 ;
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RECT 0 65.195 3.68 65.365 ;
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RECT 65.32 62.475 66.24 62.645 ;
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RECT 0 62.475 1.84 62.645 ;
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||||
RECT 0 62.475 3.68 62.645 ;
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||||
RECT 65.32 59.755 66.24 59.925 ;
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RECT 0 59.755 1.84 59.925 ;
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RECT 0 59.755 3.68 59.925 ;
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RECT 65.32 57.035 66.24 57.205 ;
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RECT 0 57.035 1.84 57.205 ;
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RECT 64.4 54.315 66.24 54.485 ;
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RECT 0 54.315 1.84 54.485 ;
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RECT 64.4 51.595 66.24 51.765 ;
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RECT 0 51.595 1.84 51.765 ;
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RECT 0 57.035 3.68 57.205 ;
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RECT 65.32 54.315 66.24 54.485 ;
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RECT 0 54.315 3.68 54.485 ;
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RECT 65.32 51.595 66.24 51.765 ;
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RECT 0 51.595 3.68 51.765 ;
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RECT 65.32 48.875 66.24 49.045 ;
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RECT 0 48.875 3.68 49.045 ;
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RECT 65.32 46.155 66.24 46.325 ;
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RECT 0 46.155 3.68 46.325 ;
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RECT 65.32 43.435 66.24 43.605 ;
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RECT 0 43.435 1.84 43.605 ;
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RECT 0 43.435 3.68 43.605 ;
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RECT 65.32 40.715 66.24 40.885 ;
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RECT 0 40.715 1.84 40.885 ;
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RECT 0 40.715 3.68 40.885 ;
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RECT 65.32 37.995 66.24 38.165 ;
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RECT 0 37.995 3.68 38.165 ;
|
||||
RECT 65.32 35.275 66.24 35.445 ;
|
||||
|
|
@ -1565,37 +1571,46 @@ MACRO cbx_1__1_
|
|||
RECT 65.32 29.835 66.24 30.005 ;
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RECT 0 29.835 3.68 30.005 ;
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RECT 65.32 27.115 66.24 27.285 ;
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RECT 0 27.115 1.84 27.285 ;
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||||
RECT 0 27.115 3.68 27.285 ;
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||||
RECT 65.32 24.395 66.24 24.565 ;
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RECT 0 24.395 1.84 24.565 ;
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RECT 65.32 21.675 66.24 21.845 ;
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RECT 0 21.675 3.68 21.845 ;
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RECT 0 21.675 1.84 21.845 ;
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RECT 65.32 18.955 66.24 19.125 ;
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RECT 0 18.955 3.68 19.125 ;
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RECT 65.32 16.235 66.24 16.405 ;
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RECT 0 16.235 3.68 16.405 ;
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RECT 62.56 13.515 66.24 13.685 ;
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RECT 0 13.515 3.68 13.685 ;
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RECT 62.56 10.795 66.24 10.965 ;
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RECT 65.32 13.515 66.24 13.685 ;
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||||
RECT 0 13.515 1.84 13.685 ;
|
||||
RECT 65.32 10.795 66.24 10.965 ;
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||||
RECT 0 10.795 3.68 10.965 ;
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RECT 65.32 8.075 66.24 8.245 ;
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RECT 0 8.075 3.68 8.245 ;
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RECT 65.32 5.355 66.24 5.525 ;
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RECT 0 5.355 3.68 5.525 ;
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RECT 62.56 2.635 66.24 2.805 ;
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RECT 0 2.635 3.68 2.805 ;
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RECT 0 -0.085 66.24 0.085 ;
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RECT 0 5.355 1.84 5.525 ;
|
||||
RECT 65.32 2.635 66.24 2.805 ;
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||||
RECT 0 2.635 1.84 2.805 ;
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||||
POLYGON 59.245 0.885 59.245 0.085 59.425 0.085 59.425 0.81 59.715 0.81 59.715 0.085 66.24 0.085 66.24 -0.085 0 -0.085 0 0.085 2.855 0.085 2.855 0.885 3.185 0.885 3.185 0.085 3.695 0.085 3.695 0.565 4.025 0.565 4.025 0.085 4.535 0.085 4.535 0.565 4.865 0.565 4.865 0.085 5.455 0.085 5.455 0.565 5.625 0.565 5.625 0.085 6.295 0.085 6.295 0.565 6.465 0.565 6.465 0.085 7.445 0.085 7.445 0.81 7.735 0.81 7.735 0.085 7.915 0.085 7.915 0.885 8.245 0.885 8.245 0.085 8.755 0.085 8.755 0.565 9.085 0.565 9.085 0.085 9.595 0.085 9.595 0.565 9.925 0.565 9.925 0.085 10.515 0.085 10.515 0.565 10.685 0.565 10.685 0.085 11.355 0.085 11.355 0.565 11.525 0.565 11.525 0.085 12.055 0.085 12.055 0.885 12.385 0.885 12.385 0.085 12.895 0.085 12.895 0.565 13.225 0.565 13.225 0.085 13.735 0.085 13.735 0.565 14.065 0.565 14.065 0.085 14.655 0.085 14.655 0.565 14.825 0.565 14.825 0.085 15.495 0.085 15.495 0.565 15.665 0.565 15.665 0.085 18.035 0.085 18.035 0.885 18.365 0.885 18.365 0.085 18.875 0.085 18.875 0.565 19.205 0.565 19.205 0.085 19.715 0.085 19.715 0.565 20.045 0.565 20.045 0.085 20.635 0.085 20.635 0.565 20.805 0.565 20.805 0.085 21.475 0.085 21.475 0.565 21.645 0.565 21.645 0.085 22.165 0.085 22.165 0.81 22.455 0.81 22.455 0.085 24.475 0.085 24.475 0.885 24.805 0.885 24.805 0.085 25.315 0.085 25.315 0.565 25.645 0.565 25.645 0.085 26.155 0.085 26.155 0.565 26.485 0.565 26.485 0.085 27.075 0.085 27.075 0.565 27.245 0.565 27.245 0.085 27.915 0.085 27.915 0.565 28.085 0.565 28.085 0.085 28.615 0.085 28.615 0.885 28.945 0.885 28.945 0.085 29.455 0.085 29.455 0.565 29.785 0.565 29.785 0.085 30.295 0.085 30.295 0.565 30.625 0.565 30.625 0.085 31.215 0.085 31.215 0.565 31.385 0.565 31.385 0.085 32.055 0.085 32.055 0.565 32.225 0.565 32.225 0.085 32.755 0.085 32.755 0.885 33.085 0.885 33.085 0.085 33.595 0.085 33.595 0.565 33.925 0.565 33.925 0.085 34.435 0.085 34.435 0.565 34.765 0.565 34.765 0.085 35.355 0.085 35.355 0.565 35.525 0.565 35.525 0.085 36.195 0.085 36.195 0.565 36.365 0.565 36.365 0.085 37.345 0.085 37.345 0.81 37.635 0.81 37.635 0.085 38.235 0.085 38.235 0.485 38.565 0.485 38.565 0.085 40.525 0.085 40.525 0.62 41.035 0.62 41.035 0.085 42.385 0.085 42.385 0.465 42.715 0.465 42.715 0.085 43.335 0.085 43.335 0.885 43.665 0.885 43.665 0.085 44.175 0.085 44.175 0.565 44.505 0.565 44.505 0.085 45.015 0.085 45.015 0.565 45.345 0.565 45.345 0.085 45.935 0.085 45.935 0.565 46.105 0.565 46.105 0.085 46.775 0.085 46.775 0.565 46.945 0.565 46.945 0.085 48.275 0.085 48.275 0.565 48.445 0.565 48.445 0.085 49.115 0.085 49.115 0.565 49.285 0.565 49.285 0.085 49.875 0.085 49.875 0.565 50.205 0.565 50.205 0.085 50.715 0.085 50.715 0.565 51.045 0.565 51.045 0.085 51.555 0.085 51.555 0.885 51.885 0.885 51.885 0.085 52.065 0.085 52.065 0.81 52.355 0.81 52.355 0.085 55.635 0.085 55.635 0.565 55.805 0.565 55.805 0.085 56.475 0.085 56.475 0.565 56.645 0.565 56.645 0.085 57.235 0.085 57.235 0.565 57.565 0.565 57.565 0.085 58.075 0.085 58.075 0.565 58.405 0.565 58.405 0.085 58.915 0.085 58.915 0.885 ;
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||||
RECT 0.17 0.17 66.07 86.87 ;
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LAYER mcon ;
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RECT 50.375 0.425 50.545 0.595 ;
|
||||
RECT 37.865 0.425 38.035 0.595 ;
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RECT 25.815 0.425 25.985 0.595 ;
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||||
LAYER via ;
|
||||
RECT 55.125 86.965 55.275 87.115 ;
|
||||
RECT 25.685 86.965 25.835 87.115 ;
|
||||
RECT 13.035 86.455 13.185 86.605 ;
|
||||
RECT 59.495 0.435 59.645 0.585 ;
|
||||
RECT 26.375 0.435 26.525 0.585 ;
|
||||
RECT 24.995 0.435 25.145 0.585 ;
|
||||
RECT 55.125 -0.075 55.275 0.075 ;
|
||||
RECT 25.685 -0.075 25.835 0.075 ;
|
||||
LAYER via2 ;
|
||||
RECT 55.1 86.94 55.3 87.14 ;
|
||||
RECT 25.66 86.94 25.86 87.14 ;
|
||||
RECT 1.05 66.2 1.25 66.4 ;
|
||||
RECT 1.05 55.32 1.25 55.52 ;
|
||||
RECT 64.99 44.44 65.19 44.64 ;
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RECT 1.05 41.72 1.25 41.92 ;
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||||
RECT 1.05 36.28 1.25 36.48 ;
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||||
RECT 55.1 -0.1 55.3 0.1 ;
|
||||
RECT 25.66 -0.1 25.86 0.1 ;
|
||||
LAYER via3 ;
|
||||
|
|
|
|||
|
|
@ -1358,13 +1358,15 @@ MACRO cbx_1__2_
|
|||
LAYER met3 ;
|
||||
POLYGON 55.365 87.205 55.365 87.2 55.58 87.2 55.58 86.88 55.365 86.88 55.365 86.875 55.035 86.875 55.035 86.88 54.82 86.88 54.82 87.2 55.035 87.2 55.035 87.205 ;
|
||||
POLYGON 25.925 87.205 25.925 87.2 26.14 87.2 26.14 86.88 25.925 86.88 25.925 86.875 25.595 86.875 25.595 86.88 25.38 86.88 25.38 87.2 25.595 87.2 25.595 87.205 ;
|
||||
POLYGON 65.04 48.09 65.04 48.07 65.59 48.07 65.59 47.79 49.07 47.79 49.07 48.09 ;
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||||
POLYGON 55.365 0.165 55.365 0.16 55.58 0.16 55.58 -0.16 55.365 -0.16 55.365 -0.165 55.035 -0.165 55.035 -0.16 54.82 -0.16 54.82 0.16 55.035 0.16 55.035 0.165 ;
|
||||
POLYGON 25.925 0.165 25.925 0.16 26.14 0.16 26.14 -0.16 25.925 -0.16 25.925 -0.165 25.595 -0.165 25.595 -0.16 25.38 -0.16 25.38 0.16 25.595 0.16 25.595 0.165 ;
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||||
POLYGON 65.84 86.64 65.84 80.45 65.04 80.45 65.04 79.35 65.84 79.35 65.84 66.85 65.04 66.85 65.04 65.75 65.84 65.75 65.84 65.49 65.04 65.49 65.04 64.39 65.84 64.39 65.84 64.13 65.04 64.13 65.04 63.03 65.84 63.03 65.84 62.77 65.04 62.77 65.04 61.67 65.84 61.67 65.84 61.41 65.04 61.41 65.04 60.31 65.84 60.31 65.84 59.37 65.04 59.37 65.04 58.27 65.84 58.27 65.84 58.01 65.04 58.01 65.04 56.91 65.84 56.91 65.84 56.65 65.04 56.65 65.04 55.55 65.84 55.55 65.84 55.29 65.04 55.29 65.04 54.19 65.84 54.19 65.84 53.93 65.04 53.93 65.04 52.83 65.84 52.83 65.84 52.57 65.04 52.57 65.04 51.47 65.84 51.47 65.84 50.53 65.04 50.53 65.04 49.43 65.84 49.43 65.84 49.17 65.04 49.17 65.04 48.07 65.84 48.07 65.84 47.81 65.04 47.81 65.04 46.71 65.84 46.71 65.84 46.45 65.04 46.45 65.04 45.35 65.84 45.35 65.84 45.09 65.04 45.09 65.04 43.99 65.84 43.99 65.84 43.73 65.04 43.73 65.04 42.63 65.84 42.63 65.84 42.37 65.04 42.37 65.04 41.27 65.84 41.27 65.84 41.01 65.04 41.01 65.04 39.91 65.84 39.91 65.84 39.65 65.04 39.65 65.04 38.55 65.84 38.55 65.84 38.29 65.04 38.29 65.04 37.19 65.84 37.19 65.84 36.93 65.04 36.93 65.04 35.83 65.84 35.83 65.84 35.57 65.04 35.57 65.04 34.47 65.84 34.47 65.84 34.21 65.04 34.21 65.04 33.11 65.84 33.11 65.84 32.85 65.04 32.85 65.04 31.75 65.84 31.75 65.84 31.49 65.04 31.49 65.04 30.39 65.84 30.39 65.84 30.13 65.04 30.13 65.04 29.03 65.84 29.03 65.84 28.77 65.04 28.77 65.04 27.67 65.84 27.67 65.84 27.41 65.04 27.41 65.04 26.31 65.84 26.31 65.84 25.37 65.04 25.37 65.04 24.27 65.84 24.27 65.84 24.01 65.04 24.01 65.04 22.91 65.84 22.91 65.84 22.65 65.04 22.65 65.04 21.55 65.84 21.55 65.84 21.29 65.04 21.29 65.04 20.19 65.84 20.19 65.84 19.25 65.04 19.25 65.04 18.15 65.84 18.15 65.84 17.21 65.04 17.21 65.04 16.11 65.84 16.11 65.84 15.85 65.04 15.85 65.04 14.75 65.84 14.75 65.84 14.49 65.04 14.49 65.04 13.39 65.84 13.39 65.84 13.13 65.04 13.13 65.04 12.03 65.84 12.03 65.84 11.77 65.04 11.77 65.04 10.67 65.84 10.67 65.84 10.41 65.04 10.41 65.04 9.31 65.84 9.31 65.84 8.37 65.04 8.37 65.04 7.27 65.84 7.27 65.84 7.01 65.04 7.01 65.04 5.91 65.84 5.91 65.84 5.65 65.04 5.65 65.04 4.55 65.84 4.55 65.84 4.29 65.04 4.29 65.04 3.19 65.84 3.19 65.84 0.4 0.4 0.4 0.4 3.19 1.2 3.19 1.2 4.29 0.4 4.29 0.4 4.55 1.2 4.55 1.2 5.65 0.4 5.65 0.4 6.59 1.2 6.59 1.2 7.69 0.4 7.69 0.4 7.95 1.2 7.95 1.2 9.05 0.4 9.05 0.4 9.31 1.2 9.31 1.2 10.41 0.4 10.41 0.4 11.35 1.2 11.35 1.2 12.45 0.4 12.45 0.4 12.71 1.2 12.71 1.2 13.81 0.4 13.81 0.4 14.07 1.2 14.07 1.2 15.17 0.4 15.17 0.4 15.43 1.2 15.43 1.2 16.53 0.4 16.53 0.4 16.79 1.2 16.79 1.2 17.89 0.4 17.89 0.4 18.15 1.2 18.15 1.2 19.25 0.4 19.25 0.4 19.51 1.2 19.51 1.2 20.61 0.4 20.61 0.4 20.87 1.2 20.87 1.2 21.97 0.4 21.97 0.4 22.23 1.2 22.23 1.2 23.33 0.4 23.33 0.4 24.27 1.2 24.27 1.2 25.37 0.4 25.37 0.4 25.63 1.2 25.63 1.2 26.73 0.4 26.73 0.4 26.99 1.2 26.99 1.2 28.09 0.4 28.09 0.4 28.35 1.2 28.35 1.2 29.45 0.4 29.45 0.4 29.71 1.2 29.71 1.2 30.81 0.4 30.81 0.4 31.07 1.2 31.07 1.2 32.17 0.4 32.17 0.4 32.43 1.2 32.43 1.2 33.53 0.4 33.53 0.4 33.79 1.2 33.79 1.2 34.89 0.4 34.89 0.4 35.15 1.2 35.15 1.2 36.25 0.4 36.25 0.4 36.51 1.2 36.51 1.2 37.61 0.4 37.61 0.4 38.55 1.2 38.55 1.2 39.65 0.4 39.65 0.4 39.91 1.2 39.91 1.2 41.01 0.4 41.01 0.4 41.95 1.2 41.95 1.2 43.05 0.4 43.05 0.4 43.31 1.2 43.31 1.2 44.41 0.4 44.41 0.4 44.67 1.2 44.67 1.2 45.77 0.4 45.77 0.4 46.03 1.2 46.03 1.2 47.13 0.4 47.13 0.4 47.39 1.2 47.39 1.2 48.49 0.4 48.49 0.4 48.75 1.2 48.75 1.2 49.85 0.4 49.85 0.4 50.11 1.2 50.11 1.2 51.21 0.4 51.21 0.4 51.47 1.2 51.47 1.2 52.57 0.4 52.57 0.4 52.83 1.2 52.83 1.2 53.93 0.4 53.93 0.4 54.19 1.2 54.19 1.2 55.29 0.4 55.29 0.4 55.55 1.2 55.55 1.2 56.65 0.4 56.65 0.4 56.91 1.2 56.91 1.2 58.01 0.4 58.01 0.4 58.27 1.2 58.27 1.2 59.37 0.4 59.37 0.4 59.63 1.2 59.63 1.2 60.73 0.4 60.73 0.4 60.99 1.2 60.99 1.2 62.09 0.4 62.09 0.4 62.35 1.2 62.35 1.2 63.45 0.4 63.45 0.4 63.71 1.2 63.71 1.2 64.81 0.4 64.81 0.4 65.07 1.2 65.07 1.2 66.17 0.4 66.17 0.4 79.35 1.2 79.35 1.2 80.45 0.4 80.45 0.4 86.64 ;
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LAYER met2 ;
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RECT 55.06 86.855 55.34 87.225 ;
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RECT 25.62 86.855 25.9 87.225 ;
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RECT 28.16 86.03 28.42 86.35 ;
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POLYGON 11.8 6.02 11.8 0.1 11.62 0.1 11.62 0.24 11.66 0.24 11.66 6.02 ;
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POLYGON 4.44 3.3 4.44 0.24 4.48 0.24 4.48 0.1 4.3 0.1 4.3 3.3 ;
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RECT 55.06 -0.185 55.34 0.185 ;
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RECT 25.62 -0.185 25.9 0.185 ;
|
||||
POLYGON 65.96 86.76 65.96 0.28 62.22 0.28 62.22 0.765 61.52 0.765 61.52 0.28 60.84 0.28 60.84 0.765 60.14 0.765 60.14 0.28 59.92 0.28 59.92 0.765 59.22 0.765 59.22 0.28 58.54 0.28 58.54 0.765 57.84 0.765 57.84 0.28 40.6 0.28 40.6 0.765 39.9 0.765 39.9 0.28 26.8 0.28 26.8 0.765 26.1 0.765 26.1 0.28 25.42 0.28 25.42 0.765 24.72 0.765 24.72 0.28 24.5 0.28 24.5 0.765 23.8 0.765 23.8 0.28 23.58 0.28 23.58 0.765 22.88 0.765 22.88 0.28 18.52 0.28 18.52 0.765 17.82 0.765 17.82 0.28 12.54 0.28 12.54 0.765 11.84 0.765 11.84 0.28 11.62 0.28 11.62 0.765 10.92 0.765 10.92 0.28 10.7 0.28 10.7 0.765 10 0.765 10 0.28 8.4 0.28 8.4 0.765 7.7 0.765 7.7 0.28 7.48 0.28 7.48 0.765 6.78 0.765 6.78 0.28 6.1 0.28 6.1 0.765 5.4 0.765 5.4 0.28 5.18 0.28 5.18 0.765 4.48 0.765 4.48 0.28 3.8 0.28 3.8 0.765 3.1 0.765 3.1 0.28 2.88 0.28 2.88 0.765 2.18 0.765 2.18 0.28 0.28 0.28 0.28 86.76 19.2 86.76 19.2 86.275 19.9 86.275 19.9 86.76 24.72 86.76 24.72 86.275 25.42 86.275 25.42 86.76 28.4 86.76 28.4 86.275 29.1 86.275 29.1 86.76 ;
|
||||
|
|
@ -1374,32 +1376,38 @@ MACRO cbx_1__2_
|
|||
POLYGON 64.64 85.44 64.64 77.32 61.44 77.32 61.44 70.92 64.64 70.92 64.64 56.92 61.44 56.92 61.44 50.52 64.64 50.52 64.64 36.52 61.44 36.52 61.44 30.12 64.64 30.12 64.64 16.12 61.44 16.12 61.44 9.72 64.64 9.72 64.64 1.6 1.6 1.6 1.6 9.72 4.8 9.72 4.8 16.12 1.6 16.12 1.6 30.12 4.8 30.12 4.8 36.52 1.6 36.52 1.6 50.52 4.8 50.52 4.8 56.92 1.6 56.92 1.6 70.92 4.8 70.92 4.8 77.32 1.6 77.32 1.6 85.44 ;
|
||||
LAYER met1 ;
|
||||
RECT 45.68 86.8 46.32 87.28 ;
|
||||
RECT 57.57 86.4 57.89 86.66 ;
|
||||
POLYGON 28.91 86.66 28.91 86.6 30.2 86.6 30.2 86.12 30.06 86.12 30.06 86.46 28.91 86.46 28.91 86.4 28.59 86.4 28.59 86.66 ;
|
||||
POLYGON 22.93 86.66 22.93 86.6 27.9 86.6 27.9 86.12 27.76 86.12 27.76 86.46 22.93 86.46 22.93 86.4 22.61 86.4 22.61 86.66 ;
|
||||
RECT 19.39 86.4 19.71 86.66 ;
|
||||
RECT 5.13 86.4 5.45 86.66 ;
|
||||
POLYGON 15.94 1.26 15.94 0.44 5.91 0.44 5.91 0.38 5.59 0.38 5.59 0.64 5.91 0.64 5.91 0.58 15.8 0.58 15.8 1.26 ;
|
||||
RECT 45.68 -0.24 46.32 0.24 ;
|
||||
POLYGON 46.32 86.76 46.32 86.52 65.96 86.52 65.96 84.84 65.48 84.84 65.48 83.8 65.96 83.8 65.96 82.12 65.48 82.12 65.48 81.08 65.96 81.08 65.96 79.4 65.48 79.4 65.48 78.36 65.96 78.36 65.96 76.68 65.48 76.68 65.48 75.64 65.96 75.64 65.96 73.96 65.48 73.96 65.48 72.92 65.96 72.92 65.96 71.24 65.48 71.24 65.48 70.2 65.96 70.2 65.96 68.52 65.48 68.52 65.48 67.48 65.96 67.48 65.96 65.8 65.48 65.8 65.48 64.76 65.96 64.76 65.96 63.08 65.48 63.08 65.48 62.04 65.96 62.04 65.96 60.36 65.48 60.36 65.48 59.32 65.96 59.32 65.96 57.64 65.48 57.64 65.48 56.6 65.96 56.6 65.96 54.92 65.48 54.92 65.48 53.88 65.96 53.88 65.96 52.2 65.48 52.2 65.48 51.16 65.96 51.16 65.96 49.48 65.48 49.48 65.48 48.44 65.96 48.44 65.96 46.76 65.48 46.76 65.48 45.72 65.96 45.72 65.96 44.04 65.48 44.04 65.48 43 65.96 43 65.96 41.32 65.48 41.32 65.48 40.28 65.96 40.28 65.96 38.6 65.48 38.6 65.48 37.56 65.96 37.56 65.96 35.88 65.48 35.88 65.48 34.84 65.96 34.84 65.96 33.16 65.48 33.16 65.48 32.12 65.96 32.12 65.96 30.44 65.48 30.44 65.48 29.4 65.96 29.4 65.96 27.72 65.48 27.72 65.48 26.68 65.96 26.68 65.96 25 65.48 25 65.48 23.96 65.96 23.96 65.96 22.28 65.48 22.28 65.48 21.24 65.96 21.24 65.96 19.56 65.48 19.56 65.48 18.52 65.96 18.52 65.96 16.84 65.48 16.84 65.48 15.8 65.96 15.8 65.96 14.12 65.48 14.12 65.48 13.08 65.96 13.08 65.96 11.4 65.48 11.4 65.48 10.36 65.96 10.36 65.96 8.68 65.48 8.68 65.48 7.64 65.96 7.64 65.96 5.96 65.48 5.96 65.48 4.92 65.96 4.92 65.96 3.24 65.48 3.24 65.48 2.2 65.96 2.2 65.96 0.52 46.32 0.52 46.32 0.28 45.68 0.28 45.68 0.52 0.28 0.52 0.28 2.2 0.76 2.2 0.76 3.24 0.28 3.24 0.28 4.92 0.76 4.92 0.76 5.96 0.28 5.96 0.28 7.64 0.76 7.64 0.76 8.68 0.28 8.68 0.28 10.36 0.76 10.36 0.76 11.4 0.28 11.4 0.28 13.08 0.76 13.08 0.76 14.12 0.28 14.12 0.28 15.8 0.76 15.8 0.76 16.84 0.28 16.84 0.28 18.52 0.76 18.52 0.76 19.56 0.28 19.56 0.28 21.24 0.76 21.24 0.76 22.28 0.28 22.28 0.28 23.96 0.76 23.96 0.76 25 0.28 25 0.28 26.68 0.76 26.68 0.76 27.72 0.28 27.72 0.28 29.4 0.76 29.4 0.76 30.44 0.28 30.44 0.28 32.12 0.76 32.12 0.76 33.16 0.28 33.16 0.28 34.84 0.76 34.84 0.76 35.88 0.28 35.88 0.28 37.56 0.76 37.56 0.76 38.6 0.28 38.6 0.28 40.28 0.76 40.28 0.76 41.32 0.28 41.32 0.28 43 0.76 43 0.76 44.04 0.28 44.04 0.28 45.72 0.76 45.72 0.76 46.76 0.28 46.76 0.28 48.44 0.76 48.44 0.76 49.48 0.28 49.48 0.28 51.16 0.76 51.16 0.76 52.2 0.28 52.2 0.28 53.88 0.76 53.88 0.76 54.92 0.28 54.92 0.28 56.6 0.76 56.6 0.76 57.64 0.28 57.64 0.28 59.32 0.76 59.32 0.76 60.36 0.28 60.36 0.28 62.04 0.76 62.04 0.76 63.08 0.28 63.08 0.28 64.76 0.76 64.76 0.76 65.8 0.28 65.8 0.28 67.48 0.76 67.48 0.76 68.52 0.28 68.52 0.28 70.2 0.76 70.2 0.76 71.24 0.28 71.24 0.28 72.92 0.76 72.92 0.76 73.96 0.28 73.96 0.28 75.64 0.76 75.64 0.76 76.68 0.28 76.68 0.28 78.36 0.76 78.36 0.76 79.4 0.28 79.4 0.28 81.08 0.76 81.08 0.76 82.12 0.28 82.12 0.28 83.8 0.76 83.8 0.76 84.84 0.28 84.84 0.28 86.52 45.68 86.52 45.68 86.76 ;
|
||||
LAYER li1 ;
|
||||
RECT 0 86.955 66.24 87.125 ;
|
||||
RECT 62.56 84.235 66.24 84.405 ;
|
||||
POLYGON 66.24 87.125 66.24 86.955 60.655 86.955 60.655 86.575 60.325 86.575 60.325 86.955 59.715 86.955 59.715 86.23 59.425 86.23 59.425 86.955 58.515 86.955 58.515 86.42 58.005 86.42 58.005 86.955 56.045 86.955 56.045 86.555 55.715 86.555 55.715 86.955 52.355 86.955 52.355 86.23 52.065 86.23 52.065 86.955 50.545 86.955 50.545 86.555 50.215 86.555 50.215 86.955 48.255 86.955 48.255 86.42 47.745 86.42 47.745 86.955 46.235 86.955 46.235 86.48 46.065 86.48 46.065 86.955 45.385 86.955 45.385 86.48 45.215 86.48 45.215 86.955 44.515 86.955 44.515 86.475 44.345 86.475 44.345 86.955 43.515 86.955 43.515 86.425 43.345 86.425 43.345 86.955 41.49 86.955 41.49 86.455 41.12 86.455 41.12 86.955 39.425 86.955 39.425 86.495 39.175 86.495 39.175 86.955 38.565 86.955 38.565 86.575 38.235 86.575 38.235 86.955 37.635 86.955 37.635 86.23 37.345 86.23 37.345 86.955 32.955 86.955 32.955 86.555 32.625 86.555 32.625 86.955 32.115 86.955 32.115 86.555 31.785 86.555 31.785 86.955 30.37 86.955 30.37 86.445 29.955 86.445 29.955 86.955 28.465 86.955 28.465 86.445 28.05 86.445 28.05 86.955 26.635 86.955 26.635 86.555 26.305 86.555 26.305 86.955 25.795 86.955 25.795 86.555 25.465 86.555 25.465 86.955 22.455 86.955 22.455 86.23 22.165 86.23 22.165 86.955 21.825 86.955 21.825 86.495 21.57 86.495 21.57 86.955 20.9 86.955 20.9 86.495 20.73 86.495 20.73 86.955 20.06 86.955 20.06 86.495 19.89 86.495 19.89 86.955 19.22 86.955 19.22 86.495 19.05 86.495 19.05 86.955 18.38 86.955 18.38 86.495 18.075 86.495 18.075 86.955 16.335 86.955 16.335 86.48 16.165 86.48 16.165 86.955 15.485 86.955 15.485 86.48 15.315 86.48 15.315 86.955 14.615 86.955 14.615 86.475 14.445 86.475 14.445 86.955 13.615 86.955 13.615 86.425 13.445 86.425 13.445 86.955 11.59 86.955 11.59 86.455 11.22 86.455 11.22 86.955 9.525 86.955 9.525 86.495 9.275 86.495 9.275 86.955 8.665 86.955 8.665 86.575 8.335 86.575 8.335 86.955 7.735 86.955 7.735 86.23 7.445 86.23 7.445 86.955 6.075 86.955 6.075 86.42 5.565 86.42 5.565 86.955 3.605 86.955 3.605 86.555 3.275 86.555 3.275 86.955 0 86.955 0 87.125 ;
|
||||
RECT 65.32 84.235 66.24 84.405 ;
|
||||
RECT 0 84.235 3.68 84.405 ;
|
||||
RECT 62.56 81.515 66.24 81.685 ;
|
||||
RECT 0 81.515 1.84 81.685 ;
|
||||
RECT 65.32 81.515 66.24 81.685 ;
|
||||
RECT 0 81.515 3.68 81.685 ;
|
||||
RECT 65.32 78.795 66.24 78.965 ;
|
||||
RECT 0 78.795 1.84 78.965 ;
|
||||
RECT 65.32 76.075 66.24 76.245 ;
|
||||
RECT 0 76.075 1.84 76.245 ;
|
||||
RECT 65.32 73.355 66.24 73.525 ;
|
||||
RECT 0 73.355 3.68 73.525 ;
|
||||
RECT 0 73.355 1.84 73.525 ;
|
||||
RECT 65.32 70.635 66.24 70.805 ;
|
||||
RECT 0 70.635 3.68 70.805 ;
|
||||
RECT 65.32 67.915 66.24 68.085 ;
|
||||
RECT 0 67.915 1.84 68.085 ;
|
||||
RECT 0 67.915 3.68 68.085 ;
|
||||
RECT 65.32 65.195 66.24 65.365 ;
|
||||
RECT 0 65.195 3.68 65.365 ;
|
||||
RECT 0 65.195 1.84 65.365 ;
|
||||
RECT 65.32 62.475 66.24 62.645 ;
|
||||
RECT 0 62.475 3.68 62.645 ;
|
||||
RECT 65.32 59.755 66.24 59.925 ;
|
||||
RECT 0 59.755 3.68 59.925 ;
|
||||
RECT 65.32 57.035 66.24 57.205 ;
|
||||
RECT 0 57.035 3.68 57.205 ;
|
||||
RECT 0 57.035 1.84 57.205 ;
|
||||
RECT 65.32 54.315 66.24 54.485 ;
|
||||
RECT 0 54.315 1.84 54.485 ;
|
||||
RECT 65.32 51.595 66.24 51.765 ;
|
||||
|
|
@ -1411,9 +1419,9 @@ MACRO cbx_1__2_
|
|||
RECT 65.32 43.435 66.24 43.605 ;
|
||||
RECT 0 43.435 3.68 43.605 ;
|
||||
RECT 65.32 40.715 66.24 40.885 ;
|
||||
RECT 0 40.715 1.84 40.885 ;
|
||||
RECT 0 40.715 3.68 40.885 ;
|
||||
RECT 65.32 37.995 66.24 38.165 ;
|
||||
RECT 0 37.995 1.84 38.165 ;
|
||||
RECT 0 37.995 3.68 38.165 ;
|
||||
RECT 65.32 35.275 66.24 35.445 ;
|
||||
RECT 0 35.275 3.68 35.445 ;
|
||||
RECT 65.32 32.555 66.24 32.725 ;
|
||||
|
|
@ -1423,34 +1431,46 @@ MACRO cbx_1__2_
|
|||
RECT 65.32 27.115 66.24 27.285 ;
|
||||
RECT 0 27.115 3.68 27.285 ;
|
||||
RECT 65.32 24.395 66.24 24.565 ;
|
||||
RECT 0 24.395 1.84 24.565 ;
|
||||
RECT 0 24.395 3.68 24.565 ;
|
||||
RECT 65.32 21.675 66.24 21.845 ;
|
||||
RECT 0 21.675 1.84 21.845 ;
|
||||
RECT 0 21.675 3.68 21.845 ;
|
||||
RECT 65.32 18.955 66.24 19.125 ;
|
||||
RECT 0 18.955 3.68 19.125 ;
|
||||
RECT 65.32 16.235 66.24 16.405 ;
|
||||
RECT 0 16.235 3.68 16.405 ;
|
||||
RECT 65.32 13.515 66.24 13.685 ;
|
||||
RECT 0 13.515 1.84 13.685 ;
|
||||
RECT 0 13.515 3.68 13.685 ;
|
||||
RECT 65.32 10.795 66.24 10.965 ;
|
||||
RECT 0 10.795 3.68 10.965 ;
|
||||
RECT 65.32 8.075 66.24 8.245 ;
|
||||
RECT 0 8.075 3.68 8.245 ;
|
||||
RECT 65.78 5.355 66.24 5.525 ;
|
||||
RECT 0 5.355 1.84 5.525 ;
|
||||
RECT 62.56 2.635 66.24 2.805 ;
|
||||
RECT 65.32 5.355 66.24 5.525 ;
|
||||
RECT 0 5.355 3.68 5.525 ;
|
||||
RECT 65.32 2.635 66.24 2.805 ;
|
||||
RECT 0 2.635 3.68 2.805 ;
|
||||
RECT 0 -0.085 66.24 0.085 ;
|
||||
POLYGON 57.865 0.885 57.865 0.085 59.425 0.085 59.425 0.81 59.715 0.81 59.715 0.085 66.24 0.085 66.24 -0.085 0 -0.085 0 0.085 7.445 0.085 7.445 0.81 7.735 0.81 7.735 0.085 9.295 0.085 9.295 0.885 9.625 0.885 9.625 0.085 10.135 0.085 10.135 0.565 10.465 0.565 10.465 0.085 10.975 0.085 10.975 0.565 11.305 0.565 11.305 0.085 11.895 0.085 11.895 0.565 12.065 0.565 12.065 0.085 12.735 0.085 12.735 0.565 12.905 0.565 12.905 0.085 14.815 0.085 14.815 0.885 15.145 0.885 15.145 0.085 15.655 0.085 15.655 0.565 15.985 0.565 15.985 0.085 16.495 0.085 16.495 0.565 16.825 0.565 16.825 0.085 17.415 0.085 17.415 0.565 17.585 0.565 17.585 0.085 18.255 0.085 18.255 0.565 18.425 0.565 18.425 0.085 22.165 0.085 22.165 0.81 22.455 0.81 22.455 0.085 22.975 0.085 22.975 0.565 23.145 0.565 23.145 0.085 23.815 0.085 23.815 0.565 23.985 0.565 23.985 0.085 24.575 0.085 24.575 0.565 24.905 0.565 24.905 0.085 25.415 0.085 25.415 0.565 25.745 0.565 25.745 0.085 26.255 0.085 26.255 0.885 26.585 0.885 26.585 0.085 29.535 0.085 29.535 0.885 29.865 0.885 29.865 0.085 30.375 0.085 30.375 0.565 30.705 0.565 30.705 0.085 31.215 0.085 31.215 0.565 31.545 0.565 31.545 0.085 32.135 0.085 32.135 0.565 32.305 0.565 32.305 0.085 32.975 0.085 32.975 0.565 33.145 0.565 33.145 0.085 37.345 0.085 37.345 0.81 37.635 0.81 37.635 0.085 37.975 0.085 37.975 0.545 38.23 0.545 38.23 0.085 38.9 0.085 38.9 0.545 39.07 0.545 39.07 0.085 39.74 0.085 39.74 0.545 39.91 0.545 39.91 0.085 40.58 0.085 40.58 0.545 40.75 0.545 40.75 0.085 41.42 0.085 41.42 0.545 41.725 0.545 41.725 0.085 41.955 0.085 41.955 0.885 42.285 0.885 42.285 0.085 42.795 0.085 42.795 0.565 43.125 0.565 43.125 0.085 43.635 0.085 43.635 0.565 43.965 0.565 43.965 0.085 44.555 0.085 44.555 0.565 44.725 0.565 44.725 0.085 45.395 0.085 45.395 0.565 45.565 0.565 45.565 0.085 47.475 0.085 47.475 0.885 47.805 0.885 47.805 0.085 48.315 0.085 48.315 0.565 48.645 0.565 48.645 0.085 49.155 0.085 49.155 0.565 49.485 0.565 49.485 0.085 50.075 0.085 50.075 0.565 50.245 0.565 50.245 0.085 50.915 0.085 50.915 0.565 51.085 0.565 51.085 0.085 52.065 0.085 52.065 0.81 52.355 0.81 52.355 0.085 54.255 0.085 54.255 0.565 54.425 0.565 54.425 0.085 55.095 0.085 55.095 0.565 55.265 0.565 55.265 0.085 55.855 0.085 55.855 0.565 56.185 0.565 56.185 0.085 56.695 0.085 56.695 0.565 57.025 0.565 57.025 0.085 57.535 0.085 57.535 0.885 ;
|
||||
RECT 0.17 0.17 66.07 86.87 ;
|
||||
LAYER mcon ;
|
||||
RECT 57.645 86.445 57.815 86.615 ;
|
||||
RECT 19.465 86.445 19.635 86.615 ;
|
||||
RECT 5.205 86.445 5.375 86.615 ;
|
||||
LAYER via ;
|
||||
RECT 55.125 86.965 55.275 87.115 ;
|
||||
RECT 25.685 86.965 25.835 87.115 ;
|
||||
RECT 57.655 86.455 57.805 86.605 ;
|
||||
RECT 28.675 86.455 28.825 86.605 ;
|
||||
RECT 22.695 86.455 22.845 86.605 ;
|
||||
RECT 19.475 86.455 19.625 86.605 ;
|
||||
RECT 5.215 86.455 5.365 86.605 ;
|
||||
RECT 5.675 0.435 5.825 0.585 ;
|
||||
RECT 55.125 -0.075 55.275 0.075 ;
|
||||
RECT 25.685 -0.075 25.835 0.075 ;
|
||||
LAYER via2 ;
|
||||
RECT 55.1 86.94 55.3 87.14 ;
|
||||
RECT 25.66 86.94 25.86 87.14 ;
|
||||
RECT 64.99 43.08 65.19 43.28 ;
|
||||
RECT 64.99 62.12 65.19 62.32 ;
|
||||
RECT 1.05 56 1.25 56.2 ;
|
||||
RECT 64.99 36.28 65.19 36.48 ;
|
||||
RECT 55.1 -0.1 55.3 0.1 ;
|
||||
RECT 25.66 -0.1 25.86 0.1 ;
|
||||
LAYER via3 ;
|
||||
|
|
|
|||
|
|
@ -1182,6 +1182,10 @@ MACRO cby_0__1_
|
|||
LAYER met2 ;
|
||||
RECT 55.06 75.975 55.34 76.345 ;
|
||||
RECT 25.62 75.975 25.9 76.345 ;
|
||||
POLYGON 39.9 76.06 39.9 75.92 39.86 75.92 39.86 71.84 39.72 71.84 39.72 76.06 ;
|
||||
POLYGON 11.8 76.06 11.8 47.7 11.66 47.7 11.66 75.92 11.62 75.92 11.62 76.06 ;
|
||||
RECT 36.9 75.15 37.16 75.47 ;
|
||||
POLYGON 39.86 6.7 39.86 0.24 39.9 0.24 39.9 0.1 39.72 0.1 39.72 6.7 ;
|
||||
RECT 55.06 -0.185 55.34 0.185 ;
|
||||
RECT 25.62 -0.185 25.9 0.185 ;
|
||||
POLYGON 65.96 75.88 65.96 0.28 64.06 0.28 64.06 0.765 63.36 0.765 63.36 0.28 63.14 0.28 63.14 0.765 62.44 0.765 62.44 0.28 62.22 0.28 62.22 0.765 61.52 0.765 61.52 0.28 61.3 0.28 61.3 0.765 60.6 0.765 60.6 0.28 60.38 0.28 60.38 0.765 59.68 0.765 59.68 0.28 59.46 0.28 59.46 0.765 58.76 0.765 58.76 0.28 58.54 0.28 58.54 0.765 57.84 0.765 57.84 0.28 57.62 0.28 57.62 0.765 56.92 0.765 56.92 0.28 56.7 0.28 56.7 0.765 56 0.765 56 0.28 54.86 0.28 54.86 0.765 54.16 0.765 54.16 0.28 53.94 0.28 53.94 0.765 53.24 0.765 53.24 0.28 53.02 0.28 53.02 0.765 52.32 0.765 52.32 0.28 52.1 0.28 52.1 0.765 51.4 0.765 51.4 0.28 51.18 0.28 51.18 0.765 50.48 0.765 50.48 0.28 50.26 0.28 50.26 0.765 49.56 0.765 49.56 0.28 49.34 0.28 49.34 0.765 48.64 0.765 48.64 0.28 48.42 0.28 48.42 0.765 47.72 0.765 47.72 0.28 47.5 0.28 47.5 0.765 46.8 0.765 46.8 0.28 43.36 0.28 43.36 0.765 42.66 0.765 42.66 0.28 42.44 0.28 42.44 0.765 41.74 0.765 41.74 0.28 41.52 0.28 41.52 0.765 40.82 0.765 40.82 0.28 40.6 0.28 40.6 0.765 39.9 0.765 39.9 0.28 39.68 0.28 39.68 0.765 38.98 0.765 38.98 0.28 38.76 0.28 38.76 0.765 38.06 0.765 38.06 0.28 37.84 0.28 37.84 0.765 37.14 0.765 37.14 0.28 36.92 0.28 36.92 0.765 36.22 0.765 36.22 0.28 36 0.28 36 0.765 35.3 0.765 35.3 0.28 35.08 0.28 35.08 0.765 34.38 0.765 34.38 0.28 34.16 0.28 34.16 0.765 33.46 0.765 33.46 0.28 33.24 0.28 33.24 0.765 32.54 0.765 32.54 0.28 32.32 0.28 32.32 0.765 31.62 0.765 31.62 0.28 31.4 0.28 31.4 0.765 30.7 0.765 30.7 0.28 26.8 0.28 26.8 0.765 26.1 0.765 26.1 0.28 25.42 0.28 25.42 0.765 24.72 0.765 24.72 0.28 18.98 0.28 18.98 0.765 18.28 0.765 18.28 0.28 18.06 0.28 18.06 0.765 17.36 0.765 17.36 0.28 17.14 0.28 17.14 0.765 16.44 0.765 16.44 0.28 16.22 0.28 16.22 0.765 15.52 0.765 15.52 0.28 15.3 0.28 15.3 0.765 14.6 0.765 14.6 0.28 14.38 0.28 14.38 0.765 13.68 0.765 13.68 0.28 13.46 0.28 13.46 0.765 12.76 0.765 12.76 0.28 0.28 0.28 0.28 75.88 2.18 75.88 2.18 75.395 2.88 75.395 2.88 75.88 8.16 75.88 8.16 75.395 8.86 75.395 8.86 75.88 9.08 75.88 9.08 75.395 9.78 75.395 9.78 75.88 10 75.88 10 75.395 10.7 75.395 10.7 75.88 10.92 75.88 10.92 75.395 11.62 75.395 11.62 75.88 11.84 75.88 11.84 75.395 12.54 75.395 12.54 75.88 12.76 75.88 12.76 75.395 13.46 75.395 13.46 75.88 13.68 75.88 13.68 75.395 14.38 75.395 14.38 75.88 14.6 75.88 14.6 75.395 15.3 75.395 15.3 75.88 15.52 75.88 15.52 75.395 16.22 75.395 16.22 75.88 16.44 75.88 16.44 75.395 17.14 75.395 17.14 75.88 17.36 75.88 17.36 75.395 18.06 75.395 18.06 75.88 18.28 75.88 18.28 75.395 18.98 75.395 18.98 75.88 19.2 75.88 19.2 75.395 19.9 75.395 19.9 75.88 20.12 75.88 20.12 75.395 20.82 75.395 20.82 75.88 21.04 75.88 21.04 75.395 21.74 75.395 21.74 75.88 26.1 75.88 26.1 75.395 26.8 75.395 26.8 75.88 32.54 75.88 32.54 75.395 33.24 75.395 33.24 75.88 33.46 75.88 33.46 75.395 34.16 75.395 34.16 75.88 34.38 75.88 34.38 75.395 35.08 75.395 35.08 75.88 35.3 75.88 35.3 75.395 36 75.395 36 75.88 36.22 75.88 36.22 75.395 36.92 75.395 36.92 75.88 37.14 75.88 37.14 75.395 37.84 75.395 37.84 75.88 38.06 75.88 38.06 75.395 38.76 75.395 38.76 75.88 38.98 75.88 38.98 75.395 39.68 75.395 39.68 75.88 39.9 75.88 39.9 75.395 40.6 75.395 40.6 75.88 40.82 75.88 40.82 75.395 41.52 75.395 41.52 75.88 49.56 75.88 49.56 75.395 50.26 75.395 50.26 75.88 50.48 75.88 50.48 75.395 51.18 75.395 51.18 75.88 51.4 75.88 51.4 75.395 52.1 75.395 52.1 75.88 52.32 75.88 52.32 75.395 53.02 75.395 53.02 75.88 53.24 75.88 53.24 75.395 53.94 75.395 53.94 75.88 54.16 75.88 54.16 75.395 54.86 75.395 54.86 75.88 56 75.88 56 75.395 56.7 75.395 56.7 75.88 56.92 75.88 56.92 75.395 57.62 75.395 57.62 75.88 57.84 75.88 57.84 75.395 58.54 75.395 58.54 75.88 58.76 75.88 58.76 75.395 59.46 75.395 59.46 75.88 59.68 75.88 59.68 75.395 60.38 75.395 60.38 75.88 60.6 75.88 60.6 75.395 61.3 75.395 61.3 75.88 61.52 75.88 61.52 75.395 62.22 75.395 62.22 75.88 62.44 75.88 62.44 75.395 63.14 75.395 63.14 75.88 63.36 75.88 63.36 75.395 64.06 75.395 64.06 75.88 ;
|
||||
|
|
@ -1200,42 +1204,42 @@ MACRO cby_0__1_
|
|||
RECT 45.68 -0.24 46.32 0.24 ;
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POLYGON 46.32 75.88 46.32 75.64 65.96 75.64 65.96 73.96 65.48 73.96 65.48 72.92 65.96 72.92 65.96 71.24 65.48 71.24 65.48 70.2 65.96 70.2 65.96 68.52 65.48 68.52 65.48 67.48 65.96 67.48 65.96 65.8 65.48 65.8 65.48 64.76 65.96 64.76 65.96 63.08 65.48 63.08 65.48 62.04 65.96 62.04 65.96 60.36 65.48 60.36 65.48 59.32 65.96 59.32 65.96 57.64 65.48 57.64 65.48 56.6 65.96 56.6 65.96 54.92 65.48 54.92 65.48 53.88 65.96 53.88 65.96 52.2 65.48 52.2 65.48 51.16 65.96 51.16 65.96 49.48 65.48 49.48 65.48 48.44 65.96 48.44 65.96 46.76 65.48 46.76 65.48 45.72 65.96 45.72 65.96 44.04 65.48 44.04 65.48 43 65.96 43 65.96 41.32 65.48 41.32 65.48 40.28 65.96 40.28 65.96 38.6 65.48 38.6 65.48 37.56 65.96 37.56 65.96 35.88 65.48 35.88 65.48 34.84 65.96 34.84 65.96 33.16 65.48 33.16 65.48 32.12 65.96 32.12 65.96 30.44 65.48 30.44 65.48 29.4 65.96 29.4 65.96 27.72 65.48 27.72 65.48 26.68 65.96 26.68 65.96 25 65.48 25 65.48 23.96 65.96 23.96 65.96 22.28 65.48 22.28 65.48 21.24 65.96 21.24 65.96 19.56 65.48 19.56 65.48 18.52 65.96 18.52 65.96 16.84 65.48 16.84 65.48 15.8 65.96 15.8 65.96 14.12 65.48 14.12 65.48 13.08 65.96 13.08 65.96 11.4 65.48 11.4 65.48 10.36 65.96 10.36 65.96 8.68 65.48 8.68 65.48 7.64 65.96 7.64 65.96 5.96 65.48 5.96 65.48 4.92 65.96 4.92 65.96 3.24 65.48 3.24 65.48 2.2 65.96 2.2 65.96 0.52 46.32 0.52 46.32 0.28 45.68 0.28 45.68 0.52 0.28 0.52 0.28 2.2 0.76 2.2 0.76 3.24 0.28 3.24 0.28 4.92 0.76 4.92 0.76 5.96 0.28 5.96 0.28 7.64 0.76 7.64 0.76 8.68 0.28 8.68 0.28 10.36 0.76 10.36 0.76 11.4 0.28 11.4 0.28 13.08 0.76 13.08 0.76 14.12 0.28 14.12 0.28 15.8 0.76 15.8 0.76 16.84 0.28 16.84 0.28 18.52 0.76 18.52 0.76 19.56 0.28 19.56 0.28 21.24 0.76 21.24 0.76 22.28 0.28 22.28 0.28 23.96 0.76 23.96 0.76 25 0.28 25 0.28 26.68 0.76 26.68 0.76 27.72 0.28 27.72 0.28 29.4 0.76 29.4 0.76 30.44 0.28 30.44 0.28 32.12 0.76 32.12 0.76 33.16 0.28 33.16 0.28 34.84 0.76 34.84 0.76 35.88 0.28 35.88 0.28 37.56 0.76 37.56 0.76 38.6 0.28 38.6 0.28 40.28 0.76 40.28 0.76 41.32 0.28 41.32 0.28 43 0.76 43 0.76 44.04 0.28 44.04 0.28 45.72 0.76 45.72 0.76 46.76 0.28 46.76 0.28 48.44 0.76 48.44 0.76 49.48 0.28 49.48 0.28 51.16 0.76 51.16 0.76 52.2 0.28 52.2 0.28 53.88 0.76 53.88 0.76 54.92 0.28 54.92 0.28 56.6 0.76 56.6 0.76 57.64 0.28 57.64 0.28 59.32 0.76 59.32 0.76 60.36 0.28 60.36 0.28 62.04 0.76 62.04 0.76 63.08 0.28 63.08 0.28 64.76 0.76 64.76 0.76 65.8 0.28 65.8 0.28 67.48 0.76 67.48 0.76 68.52 0.28 68.52 0.28 70.2 0.76 70.2 0.76 71.24 0.28 71.24 0.28 72.92 0.76 72.92 0.76 73.96 0.28 73.96 0.28 75.64 45.68 75.64 45.68 75.88 ;
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||||
LAYER li1 ;
|
||||
RECT 0 76.075 66.24 76.245 ;
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RECT 62.56 73.355 66.24 73.525 ;
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||||
POLYGON 66.24 76.245 66.24 76.075 59.715 76.075 59.715 75.35 59.425 75.35 59.425 76.075 52.355 76.075 52.355 75.35 52.065 75.35 52.065 76.075 37.635 76.075 37.635 75.35 37.345 75.35 37.345 76.075 22.455 76.075 22.455 75.35 22.165 75.35 22.165 76.075 16.005 76.075 16.005 75.275 15.675 75.275 15.675 76.075 15.165 76.075 15.165 75.595 14.835 75.595 14.835 76.075 14.325 76.075 14.325 75.595 13.995 75.595 13.995 76.075 13.405 76.075 13.405 75.595 13.235 75.595 13.235 76.075 12.565 76.075 12.565 75.595 12.395 75.595 12.395 76.075 7.735 76.075 7.735 75.35 7.445 75.35 7.445 76.075 0 76.075 0 76.245 ;
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||||
RECT 65.32 73.355 66.24 73.525 ;
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||||
RECT 0 73.355 3.68 73.525 ;
|
||||
RECT 65.78 70.635 66.24 70.805 ;
|
||||
RECT 65.32 70.635 66.24 70.805 ;
|
||||
RECT 0 70.635 3.68 70.805 ;
|
||||
RECT 65.78 67.915 66.24 68.085 ;
|
||||
RECT 65.32 67.915 66.24 68.085 ;
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||||
RECT 0 67.915 3.68 68.085 ;
|
||||
RECT 64.4 65.195 66.24 65.365 ;
|
||||
RECT 65.32 65.195 66.24 65.365 ;
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||||
RECT 0 65.195 3.68 65.365 ;
|
||||
RECT 64.4 62.475 66.24 62.645 ;
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||||
RECT 65.32 62.475 66.24 62.645 ;
|
||||
RECT 0 62.475 3.68 62.645 ;
|
||||
RECT 65.32 59.755 66.24 59.925 ;
|
||||
RECT 0 59.755 3.68 59.925 ;
|
||||
RECT 64.4 57.035 66.24 57.205 ;
|
||||
RECT 65.32 57.035 66.24 57.205 ;
|
||||
RECT 0 57.035 3.68 57.205 ;
|
||||
RECT 64.4 54.315 66.24 54.485 ;
|
||||
RECT 65.32 54.315 66.24 54.485 ;
|
||||
RECT 0 54.315 3.68 54.485 ;
|
||||
RECT 65.78 51.595 66.24 51.765 ;
|
||||
RECT 65.32 51.595 66.24 51.765 ;
|
||||
RECT 0 51.595 3.68 51.765 ;
|
||||
RECT 65.78 48.875 66.24 49.045 ;
|
||||
RECT 65.32 48.875 66.24 49.045 ;
|
||||
RECT 0 48.875 3.68 49.045 ;
|
||||
RECT 65.78 46.155 66.24 46.325 ;
|
||||
RECT 65.32 46.155 66.24 46.325 ;
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||||
RECT 0 46.155 3.68 46.325 ;
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||||
RECT 62.56 43.435 66.24 43.605 ;
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||||
RECT 65.32 43.435 66.24 43.605 ;
|
||||
RECT 0 43.435 3.68 43.605 ;
|
||||
RECT 62.56 40.715 66.24 40.885 ;
|
||||
RECT 65.32 40.715 66.24 40.885 ;
|
||||
RECT 0 40.715 3.68 40.885 ;
|
||||
RECT 64.4 37.995 66.24 38.165 ;
|
||||
RECT 65.32 37.995 66.24 38.165 ;
|
||||
RECT 0 37.995 3.68 38.165 ;
|
||||
RECT 62.56 35.275 66.24 35.445 ;
|
||||
RECT 65.32 35.275 66.24 35.445 ;
|
||||
RECT 0 35.275 3.68 35.445 ;
|
||||
RECT 62.56 32.555 66.24 32.725 ;
|
||||
RECT 65.32 32.555 66.24 32.725 ;
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||||
RECT 0 32.555 3.68 32.725 ;
|
||||
RECT 62.56 29.835 66.24 30.005 ;
|
||||
RECT 65.32 29.835 66.24 30.005 ;
|
||||
RECT 0 29.835 3.68 30.005 ;
|
||||
RECT 62.56 27.115 66.24 27.285 ;
|
||||
RECT 65.32 27.115 66.24 27.285 ;
|
||||
RECT 0 27.115 3.68 27.285 ;
|
||||
RECT 65.32 24.395 66.24 24.565 ;
|
||||
RECT 0 24.395 3.68 24.565 ;
|
||||
|
|
@ -1243,7 +1247,7 @@ MACRO cby_0__1_
|
|||
RECT 0 21.675 3.68 21.845 ;
|
||||
RECT 65.32 18.955 66.24 19.125 ;
|
||||
RECT 0 18.955 3.68 19.125 ;
|
||||
RECT 65.78 16.235 66.24 16.405 ;
|
||||
RECT 65.32 16.235 66.24 16.405 ;
|
||||
RECT 0 16.235 3.68 16.405 ;
|
||||
RECT 65.32 13.515 66.24 13.685 ;
|
||||
RECT 0 13.515 3.68 13.685 ;
|
||||
|
|
@ -1253,9 +1257,9 @@ MACRO cby_0__1_
|
|||
RECT 0 8.075 3.68 8.245 ;
|
||||
RECT 65.32 5.355 66.24 5.525 ;
|
||||
RECT 0 5.355 3.68 5.525 ;
|
||||
RECT 62.56 2.635 66.24 2.805 ;
|
||||
RECT 65.32 2.635 66.24 2.805 ;
|
||||
RECT 0 2.635 3.68 2.805 ;
|
||||
RECT 0 -0.085 66.24 0.085 ;
|
||||
POLYGON 57.865 0.885 57.865 0.085 59.425 0.085 59.425 0.81 59.715 0.81 59.715 0.085 66.24 0.085 66.24 -0.085 0 -0.085 0 0.085 7.445 0.085 7.445 0.81 7.735 0.81 7.735 0.085 22.165 0.085 22.165 0.81 22.455 0.81 22.455 0.085 22.975 0.085 22.975 0.565 23.145 0.565 23.145 0.085 23.815 0.085 23.815 0.565 23.985 0.565 23.985 0.085 24.575 0.085 24.575 0.565 24.905 0.565 24.905 0.085 25.415 0.085 25.415 0.565 25.745 0.565 25.745 0.085 26.255 0.085 26.255 0.885 26.585 0.885 26.585 0.085 31.715 0.085 31.715 0.565 31.885 0.565 31.885 0.085 32.555 0.085 32.555 0.565 32.725 0.565 32.725 0.085 33.315 0.085 33.315 0.565 33.645 0.565 33.645 0.085 34.155 0.085 34.155 0.565 34.485 0.565 34.485 0.085 34.995 0.085 34.995 0.885 35.325 0.885 35.325 0.085 37.345 0.085 37.345 0.81 37.635 0.81 37.635 0.085 38.155 0.085 38.155 0.565 38.325 0.565 38.325 0.085 38.995 0.085 38.995 0.565 39.165 0.565 39.165 0.085 39.755 0.085 39.755 0.565 40.085 0.565 40.085 0.085 40.595 0.085 40.595 0.565 40.925 0.565 40.925 0.085 41.435 0.085 41.435 0.885 41.765 0.885 41.765 0.085 46.935 0.085 46.935 0.885 47.265 0.885 47.265 0.085 47.775 0.085 47.775 0.565 48.105 0.565 48.105 0.085 48.615 0.085 48.615 0.565 48.945 0.565 48.945 0.085 49.455 0.085 49.455 0.565 49.785 0.565 49.785 0.085 50.295 0.085 50.295 0.565 50.625 0.565 50.625 0.085 51.135 0.085 51.135 0.565 51.465 0.565 51.465 0.085 52.065 0.085 52.065 0.81 52.355 0.81 52.355 0.085 54.255 0.085 54.255 0.565 54.425 0.565 54.425 0.085 55.095 0.085 55.095 0.565 55.265 0.565 55.265 0.085 55.855 0.085 55.855 0.565 56.185 0.565 56.185 0.085 56.695 0.085 56.695 0.565 57.025 0.565 57.025 0.085 57.535 0.085 57.535 0.885 ;
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||||
RECT 0.17 0.17 66.07 75.99 ;
|
||||
LAYER via ;
|
||||
RECT 55.125 76.085 55.275 76.235 ;
|
||||
|
|
|
|||
|
|
@ -1438,13 +1438,21 @@ MACRO cby_1__1_
|
|||
LAYER met2 ;
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||||
RECT 55.06 75.975 55.34 76.345 ;
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||||
RECT 25.62 75.975 25.9 76.345 ;
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||||
POLYGON 10.46 76.06 10.46 75.92 10.42 75.92 10.42 72.35 10.28 72.35 10.28 76.06 ;
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||||
RECT 9.3 75.49 9.56 75.81 ;
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||||
RECT 49.78 75.15 50.04 75.47 ;
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||||
RECT 42.42 75.15 42.68 75.47 ;
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||||
POLYGON 28.36 7.38 28.36 0.1 27.72 0.1 27.72 0.24 28.22 0.24 28.22 7.38 ;
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||||
RECT 60.82 0.35 61.08 0.67 ;
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||||
RECT 39.2 0.35 39.46 0.67 ;
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||||
RECT 14.35 0.155 14.63 0.525 ;
|
||||
RECT 55.06 -0.185 55.34 0.185 ;
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||||
RECT 25.62 -0.185 25.9 0.185 ;
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POLYGON 25.925 76.325 25.925 76.32 26.14 76.32 26.14 76 25.925 76 25.925 75.995 25.595 75.995 25.595 76 25.38 76 25.38 76.32 25.595 76.32 25.595 76.325 ;
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POLYGON 53.28 75.97 53.28 74.31 52.98 74.31 52.98 75.67 36.49 75.67 36.49 74.31 36.19 74.31 36.19 75.97 ;
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POLYGON 14.655 0.505 14.655 0.175 14.325 0.175 14.325 0.19 12.815 0.19 12.815 0.175 12.485 0.175 12.485 0.505 12.815 0.505 12.815 0.49 14.325 0.49 14.325 0.505 ;
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POLYGON 25.925 0.165 25.925 0.16 26.14 0.16 26.14 -0.16 25.925 -0.16 25.925 -0.165 25.595 -0.165 25.595 -0.16 25.38 -0.16 25.38 0.16 25.595 0.16 25.595 0.165 ;
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POLYGON 65.84 75.76 65.84 38.97 65.04 38.97 65.04 37.87 65.84 37.87 65.84 35.57 65.04 35.57 65.04 34.47 65.84 34.47 65.84 24.69 65.04 24.69 65.04 23.59 65.84 23.59 65.84 0.4 0.4 0.4 0.4 3.19 1.2 3.19 1.2 4.29 0.4 4.29 0.4 4.55 1.2 4.55 1.2 5.65 0.4 5.65 0.4 5.91 1.2 5.91 1.2 7.01 0.4 7.01 0.4 7.27 1.2 7.27 1.2 8.37 0.4 8.37 0.4 8.63 1.2 8.63 1.2 9.73 0.4 9.73 0.4 9.99 1.2 9.99 1.2 11.09 0.4 11.09 0.4 18.83 1.2 18.83 1.2 19.93 0.4 19.93 0.4 20.19 1.2 20.19 1.2 21.29 0.4 21.29 0.4 21.55 1.2 21.55 1.2 22.65 0.4 22.65 0.4 22.91 1.2 22.91 1.2 24.01 0.4 24.01 0.4 24.27 1.2 24.27 1.2 25.37 0.4 25.37 0.4 25.63 1.2 25.63 1.2 26.73 0.4 26.73 0.4 33.11 1.2 33.11 1.2 34.21 0.4 34.21 0.4 34.47 1.2 34.47 1.2 35.57 0.4 35.57 0.4 42.63 1.2 42.63 1.2 43.73 0.4 43.73 0.4 43.99 1.2 43.99 1.2 45.09 0.4 45.09 0.4 45.35 1.2 45.35 1.2 46.45 0.4 46.45 0.4 46.71 1.2 46.71 1.2 47.81 0.4 47.81 0.4 48.07 1.2 48.07 1.2 49.17 0.4 49.17 0.4 49.43 1.2 49.43 1.2 50.53 0.4 50.53 0.4 75.76 ;
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|
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@ -1454,12 +1462,21 @@ MACRO cby_1__1_
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POLYGON 64.64 74.56 64.64 71.88 61.44 71.88 61.44 65.48 64.64 65.48 64.64 51.48 61.44 51.48 61.44 45.08 64.64 45.08 64.64 31.08 61.44 31.08 61.44 24.68 64.64 24.68 64.64 10.68 61.44 10.68 61.44 4.28 64.64 4.28 64.64 1.6 1.6 1.6 1.6 4.28 4.8 4.28 4.8 10.68 1.6 10.68 1.6 24.68 4.8 24.68 4.8 31.08 1.6 31.08 1.6 45.08 4.8 45.08 4.8 51.48 1.6 51.48 1.6 65.48 4.8 65.48 4.8 71.88 1.6 71.88 1.6 74.56 ;
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LAYER met1 ;
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RECT 45.68 75.92 46.32 76.4 ;
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POLYGON 38.57 75.78 38.57 75.72 53.2 75.72 53.2 74.9 53.06 74.9 53.06 75.58 38.57 75.58 38.57 75.52 38.25 75.52 38.25 75.78 ;
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POLYGON 12.81 75.78 12.81 75.52 12.72 75.52 12.72 74.9 12.58 74.9 12.58 75.52 12.49 75.52 12.49 75.78 ;
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POLYGON 9.59 75.78 9.59 75.52 9.27 75.52 9.27 75.58 8.41 75.58 8.41 75.535 8.12 75.535 8.12 75.765 8.41 75.765 8.41 75.72 9.27 75.72 9.27 75.78 ;
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POLYGON 43.54 1.26 43.54 0.64 43.63 0.64 43.63 0.38 43.31 0.38 43.31 0.64 43.4 0.64 43.4 1.26 ;
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RECT 14.33 0.51 14.65 0.83 ;
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RECT 4.21 0.44 4.53 0.76 ;
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POLYGON 61.11 0.64 61.11 0.38 60.79 0.38 60.79 0.44 52.815 0.44 52.815 0.395 52.525 0.395 52.525 0.625 52.815 0.625 52.815 0.58 60.79 0.58 60.79 0.64 ;
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POLYGON 40.87 0.64 40.87 0.38 40.55 0.38 40.55 0.44 39.49 0.44 39.49 0.38 39.17 0.38 39.17 0.64 39.49 0.64 39.49 0.58 40.55 0.58 40.55 0.64 ;
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POLYGON 10.51 0.64 10.51 0.38 10.19 0.38 10.19 0.395 9.805 0.395 9.805 0.625 10.19 0.625 10.19 0.64 ;
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RECT 45.68 -0.24 46.32 0.24 ;
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LAYER li1 ;
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RECT 0 76.075 66.24 76.245 ;
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RECT 0 73.355 3.68 73.525 ;
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RECT 65.32 73.355 66.24 73.525 ;
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RECT 0 73.355 1.84 73.525 ;
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RECT 65.32 70.635 66.24 70.805 ;
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RECT 0 70.635 1.84 70.805 ;
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RECT 65.32 67.915 66.24 68.085 ;
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|
|
@ -1471,58 +1488,73 @@ MACRO cby_1__1_
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RECT 65.32 59.755 66.24 59.925 ;
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RECT 0 59.755 1.84 59.925 ;
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RECT 65.32 57.035 66.24 57.205 ;
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RECT 0 57.035 3.68 57.205 ;
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RECT 0 57.035 1.84 57.205 ;
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RECT 65.32 54.315 66.24 54.485 ;
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RECT 0 54.315 3.68 54.485 ;
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RECT 0 54.315 1.84 54.485 ;
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RECT 65.32 51.595 66.24 51.765 ;
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RECT 0 51.595 3.68 51.765 ;
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RECT 0 51.595 1.84 51.765 ;
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RECT 65.32 48.875 66.24 49.045 ;
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RECT 0 48.875 1.84 49.045 ;
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RECT 65.32 46.155 66.24 46.325 ;
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RECT 0 46.155 3.68 46.325 ;
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RECT 0 46.155 1.84 46.325 ;
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RECT 65.32 43.435 66.24 43.605 ;
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RECT 0 43.435 3.68 43.605 ;
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RECT 65.32 40.715 66.24 40.885 ;
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RECT 0 40.715 1.84 40.885 ;
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RECT 0 40.715 3.68 40.885 ;
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RECT 65.32 37.995 66.24 38.165 ;
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RECT 0 37.995 1.84 38.165 ;
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RECT 65.32 35.275 66.24 35.445 ;
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RECT 0 35.275 1.84 35.445 ;
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RECT 62.56 32.555 66.24 32.725 ;
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RECT 65.32 32.555 66.24 32.725 ;
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RECT 0 32.555 1.84 32.725 ;
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RECT 62.56 29.835 66.24 30.005 ;
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RECT 0 29.835 3.68 30.005 ;
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RECT 65.32 29.835 66.24 30.005 ;
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RECT 0 29.835 1.84 30.005 ;
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RECT 65.32 27.115 66.24 27.285 ;
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RECT 0 27.115 3.68 27.285 ;
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RECT 0 27.115 1.84 27.285 ;
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RECT 65.32 24.395 66.24 24.565 ;
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RECT 0 24.395 3.68 24.565 ;
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RECT 0 24.395 1.84 24.565 ;
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RECT 65.32 21.675 66.24 21.845 ;
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RECT 0 21.675 3.68 21.845 ;
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RECT 0 21.675 1.84 21.845 ;
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RECT 65.32 18.955 66.24 19.125 ;
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RECT 0 18.955 1.84 19.125 ;
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RECT 65.32 16.235 66.24 16.405 ;
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RECT 0 16.235 1.84 16.405 ;
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RECT 65.32 13.515 66.24 13.685 ;
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RECT 0 13.515 1.84 13.685 ;
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RECT 62.56 10.795 66.24 10.965 ;
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RECT 0 10.795 1.84 10.965 ;
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RECT 0 46.155 1.84 46.325 ;
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@ -1373,19 +1380,19 @@ MACRO cby_2__1_
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RECT 0 40.715 1.84 40.885 ;
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RECT 0 18.955 1.84 19.125 ;
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@ -1395,28 +1402,31 @@ MACRO cby_2__1_
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LAYER OVERLAP ;
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@ -1216,44 +1216,48 @@ MACRO sb_0__0_
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RECT 25.66 97.82 25.86 98.02 ;
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LAYER OVERLAP ;
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@ -1544,12 +1544,18 @@ MACRO sb_0__1_
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LAYER met2 ;
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RECT 25.62 108.615 25.9 108.985 ;
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POLYGON 74.915 97.745 74.915 97.415 74.585 97.415 74.585 97.43 57.58 97.43 57.58 97.73 74.585 97.73 74.585 97.745 ;
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@ -1559,47 +1565,54 @@ MACRO sb_0__1_
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POLYGON 64.64 107.2 64.64 96.32 90.4 96.32 90.4 88.2 87.2 88.2 87.2 81.8 90.4 81.8 90.4 67.8 87.2 67.8 87.2 61.4 90.4 61.4 90.4 47.4 87.2 47.4 87.2 41 90.4 41 90.4 27 87.2 27 87.2 20.6 90.4 20.6 90.4 12.48 64.64 12.48 64.64 1.6 1.6 1.6 1.6 20.6 4.8 20.6 4.8 27 1.6 27 1.6 41 4.8 41 4.8 47.4 1.6 47.4 1.6 61.4 4.8 61.4 4.8 67.8 1.6 67.8 1.6 81.8 4.8 81.8 4.8 88.2 1.6 88.2 1.6 107.2 ;
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LAYER met1 ;
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POLYGON 47.22 98.84 47.22 98.545 47.295 98.545 47.295 98.315 47.005 98.315 47.005 98.545 47.08 98.545 47.08 98.84 ;
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POLYGON 58.81 98.56 58.81 98.5 62.4 98.5 62.4 98.545 62.69 98.545 62.69 98.315 62.4 98.315 62.4 98.36 58.81 98.36 58.81 98.3 58.49 98.3 58.49 98.56 ;
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POLYGON 47.755 10.485 47.755 10.255 47.68 10.255 47.68 9.96 47.54 9.96 47.54 10.255 47.465 10.255 47.465 10.485 ;
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RECT 74.59 97.28 74.91 97.54 ;
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POLYGON 59.27 97.54 59.27 97.48 62.08 97.48 62.08 97.525 62.37 97.525 62.37 97.295 62.08 97.295 62.08 97.34 59.27 97.34 59.27 97.28 58.95 97.28 58.95 97.54 ;
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RECT 49.29 97.28 49.61 97.54 ;
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POLYGON 47.7 97.525 47.7 97.295 47.41 97.295 47.41 97.34 44.32 97.34 44.32 97.48 47.41 97.48 47.41 97.525 ;
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POLYGON 80.34 12.14 80.34 11.32 67.075 11.32 67.075 11.275 66.785 11.275 66.785 11.505 67.075 11.505 67.075 11.46 80.2 11.46 80.2 12.14 ;
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POLYGON 63.41 10.5 63.41 10.24 63.09 10.24 63.09 10.3 37.88 10.3 37.88 10.44 63.09 10.44 63.09 10.5 ;
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POLYGON 33.97 0.64 33.97 0.58 34.215 0.58 34.215 0.625 34.505 0.625 34.505 0.395 34.215 0.395 34.215 0.44 33.97 0.44 33.97 0.38 33.65 0.38 33.65 0.64 ;
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RECT 45.68 -0.24 46.32 0.24 ;
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POLYGON 46.32 108.52 46.32 108.28 65.96 108.28 65.96 106.6 65.48 106.6 65.48 105.56 65.96 105.56 65.96 103.88 65.48 103.88 65.48 102.84 65.96 102.84 65.96 101.16 65.48 101.16 65.48 100.12 65.96 100.12 65.96 98.44 46.32 98.44 46.32 97.4 91.72 97.4 91.72 95.72 91.24 95.72 91.24 94.68 91.72 94.68 91.72 93 91.24 93 91.24 91.96 91.72 91.96 91.72 90.28 91.24 90.28 91.24 89.24 91.72 89.24 91.72 87.56 91.24 87.56 91.24 86.52 91.72 86.52 91.72 84.84 91.24 84.84 91.24 83.8 91.72 83.8 91.72 82.12 91.24 82.12 91.24 81.08 91.72 81.08 91.72 79.4 91.24 79.4 91.24 78.36 91.72 78.36 91.72 76.68 91.24 76.68 91.24 75.64 91.72 75.64 91.72 73.96 91.24 73.96 91.24 72.92 91.72 72.92 91.72 71.24 91.24 71.24 91.24 70.2 91.72 70.2 91.72 68.52 91.24 68.52 91.24 67.48 91.72 67.48 91.72 65.8 91.24 65.8 91.24 64.76 91.72 64.76 91.72 63.08 91.24 63.08 91.24 62.04 91.72 62.04 91.72 60.36 91.24 60.36 91.24 59.32 91.72 59.32 91.72 57.64 91.24 57.64 91.24 56.6 91.72 56.6 91.72 54.92 91.24 54.92 91.24 53.88 91.72 53.88 91.72 52.2 91.24 52.2 91.24 51.16 91.72 51.16 91.72 49.48 91.24 49.48 91.24 48.44 91.72 48.44 91.72 46.76 91.24 46.76 91.24 45.72 91.72 45.72 91.72 44.04 91.24 44.04 91.24 43 91.72 43 91.72 41.32 91.24 41.32 91.24 40.28 91.72 40.28 91.72 38.6 91.24 38.6 91.24 37.56 91.72 37.56 91.72 35.88 91.24 35.88 91.24 34.84 91.72 34.84 91.72 33.16 91.24 33.16 91.24 32.12 91.72 32.12 91.72 30.44 91.24 30.44 91.24 29.4 91.72 29.4 91.72 27.72 91.24 27.72 91.24 26.68 91.72 26.68 91.72 25 91.24 25 91.24 23.96 91.72 23.96 91.72 22.28 91.24 22.28 91.24 21.24 91.72 21.24 91.72 19.56 91.24 19.56 91.24 18.52 91.72 18.52 91.72 16.84 91.24 16.84 91.24 15.8 91.72 15.8 91.72 14.12 91.24 14.12 91.24 13.08 91.72 13.08 91.72 11.4 46.32 11.4 46.32 10.36 65.96 10.36 65.96 8.68 65.48 8.68 65.48 7.64 65.96 7.64 65.96 5.96 65.48 5.96 65.48 4.92 65.96 4.92 65.96 3.24 65.48 3.24 65.48 2.2 65.96 2.2 65.96 0.52 46.32 0.52 46.32 0.28 45.68 0.28 45.68 0.52 0.28 0.52 0.28 2.2 0.76 2.2 0.76 3.24 0.28 3.24 0.28 4.92 0.76 4.92 0.76 5.96 0.28 5.96 0.28 7.64 0.76 7.64 0.76 8.68 0.28 8.68 0.28 10.36 0.76 10.36 0.76 11.4 0.28 11.4 0.28 13.08 0.76 13.08 0.76 14.12 0.28 14.12 0.28 15.8 0.76 15.8 0.76 16.84 0.28 16.84 0.28 18.52 0.76 18.52 0.76 19.56 0.28 19.56 0.28 21.24 0.76 21.24 0.76 22.28 0.28 22.28 0.28 23.96 0.76 23.96 0.76 25 0.28 25 0.28 26.68 0.76 26.68 0.76 27.72 0.28 27.72 0.28 29.4 0.76 29.4 0.76 30.44 0.28 30.44 0.28 32.12 0.76 32.12 0.76 33.16 0.28 33.16 0.28 34.84 0.76 34.84 0.76 35.88 0.28 35.88 0.28 37.56 0.76 37.56 0.76 38.6 0.28 38.6 0.28 40.28 0.76 40.28 0.76 41.32 0.28 41.32 0.28 43 0.76 43 0.76 44.04 0.28 44.04 0.28 45.72 0.76 45.72 0.76 46.76 0.28 46.76 0.28 48.44 0.76 48.44 0.76 49.48 0.28 49.48 0.28 51.16 0.76 51.16 0.76 52.2 0.28 52.2 0.28 53.88 0.76 53.88 0.76 54.92 0.28 54.92 0.28 56.6 0.76 56.6 0.76 57.64 0.28 57.64 0.28 59.32 0.76 59.32 0.76 60.36 0.28 60.36 0.28 62.04 0.76 62.04 0.76 63.08 0.28 63.08 0.28 64.76 0.76 64.76 0.76 65.8 0.28 65.8 0.28 67.48 0.76 67.48 0.76 68.52 0.28 68.52 0.28 70.2 0.76 70.2 0.76 71.24 0.28 71.24 0.28 72.92 0.76 72.92 0.76 73.96 0.28 73.96 0.28 75.64 0.76 75.64 0.76 76.68 0.28 76.68 0.28 78.36 0.76 78.36 0.76 79.4 0.28 79.4 0.28 81.08 0.76 81.08 0.76 82.12 0.28 82.12 0.28 83.8 0.76 83.8 0.76 84.84 0.28 84.84 0.28 86.52 0.76 86.52 0.76 87.56 0.28 87.56 0.28 89.24 0.76 89.24 0.76 90.28 0.28 90.28 0.28 91.96 0.76 91.96 0.76 93 0.28 93 0.28 94.68 0.76 94.68 0.76 95.72 0.28 95.72 0.28 97.4 0.76 97.4 0.76 98.44 0.28 98.44 0.28 100.12 0.76 100.12 0.76 101.16 0.28 101.16 0.28 102.84 0.76 102.84 0.76 103.88 0.28 103.88 0.28 105.56 0.76 105.56 0.76 106.6 0.28 106.6 0.28 108.28 45.68 108.28 45.68 108.52 ;
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POLYGON 50.505 0.885 50.505 0.085 52.065 0.085 52.065 0.81 52.355 0.81 52.355 0.085 56.025 0.085 56.025 0.62 56.535 0.62 56.535 0.085 58.495 0.085 58.495 0.485 58.825 0.485 58.825 0.085 59.425 0.085 59.425 0.81 59.715 0.81 59.715 0.085 66.24 0.085 66.24 -0.085 0 -0.085 0 0.085 3.315 0.085 3.315 0.885 3.645 0.885 3.645 0.085 4.155 0.085 4.155 0.565 4.485 0.565 4.485 0.085 4.995 0.085 4.995 0.565 5.325 0.565 5.325 0.085 5.915 0.085 5.915 0.565 6.085 0.565 6.085 0.085 6.755 0.085 6.755 0.565 6.925 0.565 6.925 0.085 7.445 0.085 7.445 0.81 7.735 0.81 7.735 0.085 13.855 0.085 13.855 0.465 14.185 0.465 14.185 0.085 14.795 0.085 14.795 0.545 15.045 0.545 15.045 0.085 16.74 0.085 16.74 0.585 17.11 0.585 17.11 0.085 18.965 0.085 18.965 0.615 19.135 0.615 19.135 0.085 19.965 0.085 19.965 0.565 20.135 0.565 20.135 0.085 20.835 0.085 20.835 0.56 21.005 0.56 21.005 0.085 21.685 0.085 21.685 0.56 21.855 0.56 21.855 0.085 22.165 0.085 22.165 0.81 22.455 0.81 22.455 0.085 22.975 0.085 22.975 0.565 23.145 0.565 23.145 0.085 23.815 0.085 23.815 0.565 23.985 0.565 23.985 0.085 24.575 0.085 24.575 0.565 24.905 0.565 24.905 0.085 25.415 0.085 25.415 0.565 25.745 0.565 25.745 0.085 26.255 0.085 26.255 0.885 26.585 0.885 26.585 0.085 29.875 0.085 29.875 0.565 30.045 0.565 30.045 0.085 30.715 0.085 30.715 0.565 30.885 0.565 30.885 0.085 31.475 0.085 31.475 0.565 31.805 0.565 31.805 0.085 32.315 0.085 32.315 0.565 32.645 0.565 32.645 0.085 33.155 0.085 33.155 0.885 33.485 0.885 33.485 0.085 37.345 0.085 37.345 0.81 37.635 0.81 37.635 0.085 38.155 0.085 38.155 0.565 38.325 0.565 38.325 0.085 38.995 0.085 38.995 0.565 39.165 0.565 39.165 0.085 39.755 0.085 39.755 0.565 40.085 0.565 40.085 0.085 40.595 0.085 40.595 0.565 40.925 0.565 40.925 0.085 41.435 0.085 41.435 0.885 41.765 0.885 41.765 0.085 42.685 0.085 42.685 0.62 43.195 0.62 43.195 0.085 45.155 0.085 45.155 0.485 45.485 0.485 45.485 0.085 46.895 0.085 46.895 0.565 47.065 0.565 47.065 0.085 47.735 0.085 47.735 0.565 47.905 0.565 47.905 0.085 48.495 0.085 48.495 0.565 48.825 0.565 48.825 0.085 49.335 0.085 49.335 0.565 49.665 0.565 49.665 0.085 50.175 0.085 50.175 0.885 ;
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POLYGON 91.83 97.75 91.83 11.05 66.07 11.05 66.07 0.17 0.17 0.17 0.17 97.75 ;
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LAYER mcon ;
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RECT 50.745 11.305 50.915 11.475 ;
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RECT 47.47 11.305 47.64 11.475 ;
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RECT 63.165 10.285 63.335 10.455 ;
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RECT 57.26 10.285 57.43 10.455 ;
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RECT 55.345 10.285 55.515 10.455 ;
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RECT 79.785 11.305 79.955 11.475 ;
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RECT 62.705 11.305 62.875 11.475 ;
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RECT 56.785 11.305 56.955 11.475 ;
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RECT 54.885 11.305 55.055 11.475 ;
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RECT 51.205 11.305 51.375 11.475 ;
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RECT 55.805 10.285 55.975 10.455 ;
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RECT 51.665 10.285 51.835 10.455 ;
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RECT 49.365 10.285 49.535 10.455 ;
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RECT 59.025 0.425 59.195 0.595 ;
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RECT 56.725 0.425 56.895 0.595 ;
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RECT 48.995 0.425 49.165 0.595 ;
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RECT 43.385 0.425 43.555 0.595 ;
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LAYER via ;
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RECT 55.125 97.845 55.275 97.995 ;
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RECT 25.685 97.845 25.835 97.995 ;
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RECT 61.335 11.315 61.485 11.465 ;
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RECT 60.415 11.315 60.565 11.465 ;
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RECT 50.295 11.315 50.445 11.465 ;
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RECT 82.035 11.315 82.185 11.465 ;
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RECT 76.055 11.315 76.205 11.465 ;
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RECT 65.475 11.315 65.625 11.465 ;
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RECT 56.735 11.315 56.885 11.465 ;
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RECT 55.815 11.315 55.965 11.465 ;
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RECT 52.135 11.315 52.285 11.465 ;
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RECT 55.125 10.805 55.275 10.955 ;
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RECT 63.175 10.295 63.325 10.445 ;
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RECT 58.575 10.295 58.725 10.445 ;
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RECT 56.735 10.295 56.885 10.445 ;
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RECT 55.815 10.295 55.965 10.445 ;
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RECT 52.135 10.295 52.285 10.445 ;
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RECT 50.755 10.295 50.905 10.445 ;
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RECT 64.095 0.435 64.245 0.585 ;
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RECT 58.115 0.435 58.265 0.585 ;
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RECT 50.755 0.435 50.905 0.585 ;
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RECT 38.335 0.435 38.485 0.585 ;
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RECT 55.125 -0.075 55.275 0.075 ;
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RECT 25.685 -0.075 25.835 0.075 ;
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LAYER via2 ;
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RECT 55.1 97.82 55.3 98.02 ;
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RECT 25.66 97.82 25.86 98.02 ;
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RECT 65.91 11.12 66.11 11.32 ;
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RECT 90.75 64.16 90.95 64.36 ;
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RECT 74.65 11.12 74.85 11.32 ;
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RECT 55.1 -0.1 55.3 0.1 ;
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RECT 25.66 -0.1 25.86 0.1 ;
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LAYER via3 ;
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|
|
|
|||
|
|
@ -1733,8 +1733,12 @@ MACRO sb_1__0_
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|||
LAYER met2 ;
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RECT 80.82 97.735 81.1 98.105 ;
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RECT 51.38 97.735 51.66 98.105 ;
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POLYGON 91.84 95.78 91.84 74.9 91.7 74.9 91.7 95.64 90.78 95.64 90.78 95.78 ;
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POLYGON 88.62 97.82 88.62 94.62 88.48 94.62 88.48 97.68 88.44 97.68 88.44 97.82 ;
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POLYGON 74.36 97.82 74.36 76.94 74.22 76.94 74.22 97.68 74.18 97.68 74.18 97.82 ;
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POLYGON 73.05 97.765 73.05 97.395 72.98 97.395 72.98 96.32 72.84 96.32 72.84 97.395 72.77 97.395 72.77 97.765 ;
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RECT 10.9 86.855 11.18 87.225 ;
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POLYGON 19.69 86.885 19.69 86.515 19.62 86.515 19.62 84.76 19.48 84.76 19.48 86.515 19.41 86.515 19.41 86.885 ;
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RECT 7.46 86.37 7.72 86.69 ;
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RECT 80.82 -0.185 81.1 0.185 ;
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RECT 51.38 -0.185 51.66 0.185 ;
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RECT 10.9 -0.185 11.18 0.185 ;
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|
|
@ -1742,9 +1746,9 @@ MACRO sb_1__0_
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LAYER met3 ;
|
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POLYGON 81.125 98.085 81.125 98.08 81.34 98.08 81.34 97.76 81.125 97.76 81.125 97.755 80.795 97.755 80.795 97.76 80.58 97.76 80.58 98.08 80.795 98.08 80.795 98.085 ;
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POLYGON 51.685 98.085 51.685 98.08 51.9 98.08 51.9 97.76 51.685 97.76 51.685 97.755 51.355 97.755 51.355 97.76 51.14 97.76 51.14 98.08 51.355 98.08 51.355 98.085 ;
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POLYGON 73.075 97.745 73.075 97.415 72.745 97.415 72.745 97.43 69.395 97.43 69.395 97.415 69.065 97.415 69.065 97.745 69.395 97.745 69.395 97.73 72.745 97.73 72.745 97.745 ;
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POLYGON 11.205 87.205 11.205 87.2 11.42 87.2 11.42 86.88 11.205 86.88 11.205 86.875 10.875 86.875 10.875 86.88 10.66 86.88 10.66 87.2 10.875 87.2 10.875 87.205 ;
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POLYGON 116.56 61.69 116.56 61.67 117.11 61.67 117.11 61.39 104.27 61.39 104.27 61.69 ;
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POLYGON 116.56 45.37 116.56 45.35 117.11 45.35 117.11 45.07 87.94 45.07 87.94 45.37 ;
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POLYGON 19.715 86.865 19.715 86.85 29.36 86.85 29.36 86.55 19.715 86.55 19.715 86.535 19.385 86.535 19.385 86.865 ;
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POLYGON 81.125 0.165 81.125 0.16 81.34 0.16 81.34 -0.16 81.125 -0.16 81.125 -0.165 80.795 -0.165 80.795 -0.16 80.58 -0.16 80.58 0.16 80.795 0.16 80.795 0.165 ;
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POLYGON 51.685 0.165 51.685 0.16 51.9 0.16 51.9 -0.16 51.685 -0.16 51.685 -0.165 51.355 -0.165 51.355 -0.16 51.14 -0.16 51.14 0.16 51.355 0.16 51.355 0.165 ;
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POLYGON 11.205 0.165 11.205 0.16 11.42 0.16 11.42 -0.16 11.205 -0.16 11.205 -0.165 10.875 -0.165 10.875 -0.16 10.66 -0.16 10.66 0.16 10.875 0.16 10.875 0.165 ;
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|
|
@ -1753,118 +1757,137 @@ MACRO sb_1__0_
|
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POLYGON 90.4 96.32 90.4 85.44 116.16 85.44 116.16 77.32 112.96 77.32 112.96 70.92 116.16 70.92 116.16 56.92 112.96 56.92 112.96 50.52 116.16 50.52 116.16 36.52 112.96 36.52 112.96 30.12 116.16 30.12 116.16 16.12 112.96 16.12 112.96 9.72 116.16 9.72 116.16 1.6 1.6 1.6 1.6 9.72 4.8 9.72 4.8 16.12 1.6 16.12 1.6 30.12 4.8 30.12 4.8 36.52 1.6 36.52 1.6 50.52 4.8 50.52 4.8 56.92 1.6 56.92 1.6 70.92 4.8 70.92 4.8 77.32 1.6 77.32 1.6 85.44 27.36 85.44 27.36 96.32 ;
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LAYER met1 ;
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RECT 45.68 97.68 46.32 98.16 ;
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POLYGON 81.26 88.3 81.26 87.48 71.69 87.48 71.69 87.42 71.37 87.42 71.37 87.68 71.69 87.68 71.69 87.62 81.12 87.62 81.12 88.3 ;
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POLYGON 88.16 87.96 88.16 87.48 87.33 87.48 87.33 87.42 87.01 87.42 87.01 87.68 87.33 87.68 87.33 87.62 88.02 87.62 88.02 87.96 ;
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RECT 62.63 87.42 62.95 87.68 ;
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POLYGON 63.87 86.66 63.87 86.4 63.55 86.4 63.55 86.46 62.72 86.46 62.72 86.415 62.43 86.415 62.43 86.645 62.72 86.645 62.72 86.6 63.55 86.6 63.55 86.66 ;
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POLYGON 59.27 86.66 59.27 86.645 59.635 86.645 59.635 86.415 59.27 86.415 59.27 86.4 58.95 86.4 58.95 86.66 ;
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POLYGON 50.53 86.66 50.53 86.4 50.21 86.4 50.21 86.46 48.69 86.46 48.69 86.4 48.37 86.4 48.37 86.66 48.69 86.66 48.69 86.6 50.21 86.6 50.21 86.66 ;
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POLYGON 37.19 86.66 37.19 86.6 37.345 86.6 37.345 86.645 37.635 86.645 37.635 86.415 37.345 86.415 37.345 86.46 37.19 86.46 37.19 86.4 36.87 86.4 36.87 86.66 ;
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POLYGON 61.555 86.645 61.555 86.415 61.48 86.415 61.48 85.78 61.34 85.78 61.34 86.415 61.265 86.415 61.265 86.645 ;
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POLYGON 79.51 97.54 79.51 97.28 79.42 97.28 79.42 97 79.28 97 79.28 97.28 79.19 97.28 79.19 97.54 ;
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POLYGON 71.23 97.54 71.23 97.28 70.91 97.28 70.91 97.34 62.86 97.34 62.86 97 62.72 97 62.72 97.48 70.91 97.48 70.91 97.54 ;
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POLYGON 54.67 97.54 54.67 97.48 54.825 97.48 54.825 97.525 55.115 97.525 55.115 97.295 54.825 97.295 54.825 97.34 54.67 97.34 54.67 97.28 54.35 97.28 54.35 97.54 ;
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POLYGON 53.2 97.48 53.2 97 53.06 97 53.06 97.34 43.08 97.34 43.08 96.66 42.94 96.66 42.94 97.48 ;
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POLYGON 89.17 87.68 89.17 87.42 88.85 87.42 88.85 87.48 88.695 87.48 88.695 87.435 88.405 87.435 88.405 87.665 88.695 87.665 88.695 87.62 88.85 87.62 88.85 87.68 ;
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POLYGON 82.73 87.68 82.73 87.62 85.645 87.62 85.645 87.665 85.935 87.665 85.935 87.435 85.645 87.435 85.645 87.48 82.73 87.48 82.73 87.42 82.41 87.42 82.41 87.68 ;
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POLYGON 72.15 87.68 72.15 87.62 76.905 87.62 76.905 87.665 77.195 87.665 77.195 87.435 76.905 87.435 76.905 87.48 72.15 87.48 72.15 87.42 71.83 87.42 71.83 87.68 ;
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RECT 62.17 87.42 62.49 87.68 ;
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POLYGON 44.09 87.68 44.09 87.42 43.77 87.42 43.77 87.48 42.64 87.48 42.64 87.435 42.35 87.435 42.35 87.665 42.64 87.665 42.64 87.62 43.77 87.62 43.77 87.68 ;
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POLYGON 115.39 86.66 115.39 86.4 115.07 86.4 115.07 86.46 78.5 86.46 78.5 86.12 78.36 86.12 78.36 86.6 115.07 86.6 115.07 86.66 ;
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POLYGON 77.21 86.66 77.21 86.6 77.58 86.6 77.58 86.645 77.87 86.645 77.87 86.415 77.58 86.415 77.58 86.46 77.21 86.46 77.21 86.4 76.89 86.4 76.89 86.66 ;
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POLYGON 76.29 86.66 76.29 86.4 75.97 86.4 75.97 86.46 75.14 86.46 75.14 86.415 74.85 86.415 74.85 86.645 75.14 86.645 75.14 86.6 75.97 86.6 75.97 86.66 ;
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POLYGON 16.03 86.66 16.03 86.6 67.92 86.6 67.92 86.12 67.78 86.12 67.78 86.46 16.03 86.46 16.03 86.4 15.71 86.4 15.71 86.66 ;
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POLYGON 7.75 86.66 7.75 86.6 15.48 86.6 15.48 86.12 15.34 86.12 15.34 86.46 7.75 86.46 7.75 86.4 7.43 86.4 7.43 86.66 ;
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RECT 45.68 -0.24 96 0.24 ;
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POLYGON 46.32 97.64 46.32 97.4 91.72 97.4 91.72 95.72 91.24 95.72 91.24 94.68 91.72 94.68 91.72 93 91.24 93 91.24 91.96 91.72 91.96 91.72 90.28 91.24 90.28 91.24 89.24 91.72 89.24 91.72 87.56 46.32 87.56 46.32 86.52 95.36 86.52 95.36 86.76 96 86.76 96 86.52 117.48 86.52 117.48 84.84 117 84.84 117 83.8 117.48 83.8 117.48 82.12 117 82.12 117 81.08 117.48 81.08 117.48 79.4 117 79.4 117 78.36 117.48 78.36 117.48 76.68 117 76.68 117 75.64 117.48 75.64 117.48 73.96 117 73.96 117 72.92 117.48 72.92 117.48 71.24 117 71.24 117 70.2 117.48 70.2 117.48 68.52 117 68.52 117 67.48 117.48 67.48 117.48 65.8 117 65.8 117 64.76 117.48 64.76 117.48 63.08 117 63.08 117 62.04 117.48 62.04 117.48 60.36 117 60.36 117 59.32 117.48 59.32 117.48 57.64 117 57.64 117 56.6 117.48 56.6 117.48 54.92 117 54.92 117 53.88 117.48 53.88 117.48 52.2 117 52.2 117 51.16 117.48 51.16 117.48 49.48 117 49.48 117 48.44 117.48 48.44 117.48 46.76 117 46.76 117 45.72 117.48 45.72 117.48 44.04 117 44.04 117 43 117.48 43 117.48 41.32 117 41.32 117 40.28 117.48 40.28 117.48 38.6 117 38.6 117 37.56 117.48 37.56 117.48 35.88 117 35.88 117 34.84 117.48 34.84 117.48 33.16 117 33.16 117 32.12 117.48 32.12 117.48 30.44 117 30.44 117 29.4 117.48 29.4 117.48 27.72 117 27.72 117 26.68 117.48 26.68 117.48 25 117 25 117 23.96 117.48 23.96 117.48 22.28 117 22.28 117 21.24 117.48 21.24 117.48 19.56 117 19.56 117 18.52 117.48 18.52 117.48 16.84 117 16.84 117 15.8 117.48 15.8 117.48 14.12 117 14.12 117 13.08 117.48 13.08 117.48 11.4 117 11.4 117 10.36 117.48 10.36 117.48 8.68 117 8.68 117 7.64 117.48 7.64 117.48 5.96 117 5.96 117 4.92 117.48 4.92 117.48 3.24 117 3.24 117 2.2 117.48 2.2 117.48 0.52 96 0.52 96 0.28 45.68 0.28 45.68 0.52 0.28 0.52 0.28 2.2 0.76 2.2 0.76 3.24 0.28 3.24 0.28 4.92 0.76 4.92 0.76 5.96 0.28 5.96 0.28 7.64 0.76 7.64 0.76 8.68 0.28 8.68 0.28 10.36 0.76 10.36 0.76 11.4 0.28 11.4 0.28 13.08 0.76 13.08 0.76 14.12 0.28 14.12 0.28 15.8 0.76 15.8 0.76 16.84 0.28 16.84 0.28 18.52 0.76 18.52 0.76 19.56 0.28 19.56 0.28 21.24 0.76 21.24 0.76 22.28 0.28 22.28 0.28 23.96 0.76 23.96 0.76 25 0.28 25 0.28 26.68 0.76 26.68 0.76 27.72 0.28 27.72 0.28 29.4 0.76 29.4 0.76 30.44 0.28 30.44 0.28 32.12 0.76 32.12 0.76 33.16 0.28 33.16 0.28 34.84 0.76 34.84 0.76 35.88 0.28 35.88 0.28 37.56 0.76 37.56 0.76 38.6 0.28 38.6 0.28 40.28 0.76 40.28 0.76 41.32 0.28 41.32 0.28 43 0.76 43 0.76 44.04 0.28 44.04 0.28 45.72 0.76 45.72 0.76 46.76 0.28 46.76 0.28 48.44 0.76 48.44 0.76 49.48 0.28 49.48 0.28 51.16 0.76 51.16 0.76 52.2 0.28 52.2 0.28 53.88 0.76 53.88 0.76 54.92 0.28 54.92 0.28 56.6 0.76 56.6 0.76 57.64 0.28 57.64 0.28 59.32 0.76 59.32 0.76 60.36 0.28 60.36 0.28 62.04 0.76 62.04 0.76 63.08 0.28 63.08 0.28 64.76 0.76 64.76 0.76 65.8 0.28 65.8 0.28 67.48 0.76 67.48 0.76 68.52 0.28 68.52 0.28 70.2 0.76 70.2 0.76 71.24 0.28 71.24 0.28 72.92 0.76 72.92 0.76 73.96 0.28 73.96 0.28 75.64 0.76 75.64 0.76 76.68 0.28 76.68 0.28 78.36 0.76 78.36 0.76 79.4 0.28 79.4 0.28 81.08 0.76 81.08 0.76 82.12 0.28 82.12 0.28 83.8 0.76 83.8 0.76 84.84 0.28 84.84 0.28 86.52 45.68 86.52 45.68 87.56 26.04 87.56 26.04 89.24 26.52 89.24 26.52 90.28 26.04 90.28 26.04 91.96 26.52 91.96 26.52 93 26.04 93 26.04 94.68 26.52 94.68 26.52 95.72 26.04 95.72 26.04 97.4 45.68 97.4 45.68 97.64 ;
|
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LAYER li1 ;
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RECT 25.76 97.835 92 98.005 ;
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RECT 88.32 95.115 92 95.285 ;
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POLYGON 91.93 11.52 91.93 11.26 91.61 11.26 91.61 11.32 87.79 11.32 87.79 11.26 87.47 11.26 87.47 11.52 87.79 11.52 87.79 11.46 91.61 11.46 91.61 11.52 ;
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POLYGON 71.69 11.52 71.69 11.26 71.37 11.26 71.37 11.275 71.015 11.275 71.015 11.505 71.37 11.505 71.37 11.52 ;
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POLYGON 82.73 10.5 82.73 10.485 82.775 10.485 82.775 10.255 82.73 10.255 82.73 10.24 82.41 10.24 82.41 10.5 ;
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POLYGON 76.75 10.5 76.75 10.44 77.365 10.44 77.365 10.485 77.655 10.485 77.655 10.255 77.365 10.255 77.365 10.3 76.75 10.3 76.75 10.24 76.43 10.24 76.43 10.5 ;
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POLYGON 69.39 10.5 69.39 10.24 69.07 10.24 69.07 10.3 55.04 10.3 55.04 9.96 54.9 9.96 54.9 10.44 69.07 10.44 69.07 10.5 ;
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POLYGON 48.69 10.5 48.69 10.44 49.305 10.44 49.305 10.485 49.595 10.485 49.595 10.255 49.305 10.255 49.305 10.3 48.69 10.3 48.69 10.24 48.37 10.24 48.37 10.5 ;
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POLYGON 88.62 11.8 88.62 11.505 88.695 11.505 88.695 11.275 88.405 11.275 88.405 11.505 88.48 11.505 88.48 11.8 ;
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RECT 98.51 11.26 98.83 11.52 ;
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POLYGON 48.23 10.5 48.23 10.24 47.91 10.24 47.91 10.3 45.76 10.3 45.76 10.44 47.91 10.44 47.91 10.5 ;
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RECT 34.6 0.69 34.86 1.01 ;
|
||||
RECT 30.92 0.69 31.18 1.01 ;
|
||||
RECT 80.82 -0.185 81.1 0.185 ;
|
||||
RECT 51.38 -0.185 51.66 0.185 ;
|
||||
POLYGON 91.72 97.64 91.72 0.28 82.92 0.28 82.92 0.765 82.22 0.765 82.22 0.28 82 0.28 82 0.765 81.3 0.765 81.3 0.28 80.62 0.28 80.62 0.765 79.92 0.765 79.92 0.28 79.7 0.28 79.7 0.765 79 0.765 79 0.28 78.78 0.28 78.78 0.765 78.08 0.765 78.08 0.28 77.86 0.28 77.86 0.765 77.16 0.765 77.16 0.28 76.94 0.28 76.94 0.765 76.24 0.765 76.24 0.28 76.02 0.28 76.02 0.765 75.32 0.765 75.32 0.28 75.1 0.28 75.1 0.765 74.4 0.765 74.4 0.28 74.18 0.28 74.18 0.765 73.48 0.765 73.48 0.28 73.26 0.28 73.26 0.765 72.56 0.765 72.56 0.28 72.34 0.28 72.34 0.765 71.64 0.765 71.64 0.28 71.42 0.28 71.42 0.765 70.72 0.765 70.72 0.28 70.5 0.28 70.5 0.765 69.8 0.765 69.8 0.28 69.58 0.28 69.58 0.765 68.88 0.765 68.88 0.28 68.66 0.28 68.66 0.765 67.96 0.765 67.96 0.28 67.74 0.28 67.74 0.765 67.04 0.765 67.04 0.28 66.82 0.28 66.82 0.765 66.12 0.765 66.12 0.28 65.9 0.28 65.9 0.765 65.2 0.765 65.2 0.28 64.98 0.28 64.98 0.765 64.28 0.765 64.28 0.28 64.06 0.28 64.06 0.765 63.36 0.765 63.36 0.28 62.68 0.28 62.68 0.765 61.98 0.765 61.98 0.28 61.76 0.28 61.76 0.765 61.06 0.765 61.06 0.28 60.38 0.28 60.38 0.765 59.68 0.765 59.68 0.28 59.46 0.28 59.46 0.765 58.76 0.765 58.76 0.28 58.54 0.28 58.54 0.765 57.84 0.765 57.84 0.28 57.62 0.28 57.62 0.765 56.92 0.765 56.92 0.28 56.7 0.28 56.7 0.765 56 0.765 56 0.28 55.78 0.28 55.78 0.765 55.08 0.765 55.08 0.28 54.86 0.28 54.86 0.765 54.16 0.765 54.16 0.28 53.48 0.28 53.48 0.765 52.78 0.765 52.78 0.28 52.56 0.28 52.56 0.765 51.86 0.765 51.86 0.28 50.72 0.28 50.72 0.765 50.02 0.765 50.02 0.28 49.8 0.28 49.8 0.765 49.1 0.765 49.1 0.28 48.42 0.28 48.42 0.765 47.72 0.765 47.72 0.28 47.5 0.28 47.5 0.765 46.8 0.765 46.8 0.28 39.68 0.28 39.68 0.765 38.98 0.765 38.98 0.28 38.76 0.28 38.76 0.765 38.06 0.765 38.06 0.28 35.54 0.28 35.54 0.765 34.84 0.765 34.84 0.28 34.16 0.28 34.16 0.765 33.46 0.765 33.46 0.28 32.78 0.28 32.78 0.765 32.08 0.765 32.08 0.28 31.86 0.28 31.86 0.765 31.16 0.765 31.16 0.28 28.64 0.28 28.64 0.765 27.94 0.765 27.94 0.28 26.04 0.28 26.04 11.16 23.58 11.16 23.58 11.645 22.88 11.645 22.88 11.16 15.76 11.16 15.76 11.645 15.06 11.645 15.06 11.16 14.84 11.16 14.84 11.645 14.14 11.645 14.14 11.16 13.92 11.16 13.92 11.645 13.22 11.645 13.22 11.16 13 11.16 13 11.645 12.3 11.645 12.3 11.16 12.08 11.16 12.08 11.645 11.38 11.645 11.38 11.16 10.7 11.16 10.7 11.645 10 11.645 10 11.16 9.32 11.16 9.32 11.645 8.62 11.645 8.62 11.16 8.4 11.16 8.4 11.645 7.7 11.645 7.7 11.16 7.48 11.16 7.48 11.645 6.78 11.645 6.78 11.16 6.56 11.16 6.56 11.645 5.86 11.645 5.86 11.16 5.64 11.16 5.64 11.645 4.94 11.645 4.94 11.16 4.72 11.16 4.72 11.645 4.02 11.645 4.02 11.16 3.34 11.16 3.34 11.645 2.64 11.645 2.64 11.16 0.28 11.16 0.28 97.64 ;
|
||||
|
|
@ -1305,8 +1310,6 @@ MACRO sb_2__2_
|
|||
POLYGON 81.125 98.085 81.125 98.08 81.34 98.08 81.34 97.76 81.125 97.76 81.125 97.755 80.795 97.755 80.795 97.76 80.58 97.76 80.58 98.08 80.795 98.08 80.795 98.085 ;
|
||||
POLYGON 51.685 98.085 51.685 98.08 51.9 98.08 51.9 97.76 51.685 97.76 51.685 97.755 51.355 97.755 51.355 97.76 51.14 97.76 51.14 98.08 51.355 98.08 51.355 98.085 ;
|
||||
POLYGON 11.205 98.085 11.205 98.08 11.42 98.08 11.42 97.76 11.205 97.76 11.205 97.755 10.875 97.755 10.875 97.76 10.66 97.76 10.66 98.08 10.875 98.08 10.875 98.085 ;
|
||||
POLYGON 17.17 58.97 17.17 58.67 0.65 58.67 0.65 58.95 1.2 58.95 1.2 58.97 ;
|
||||
POLYGON 15.1 39.93 15.1 39.63 1.2 39.63 1.2 39.65 0.65 39.65 0.65 39.93 ;
|
||||
POLYGON 11.205 11.045 11.205 11.04 11.42 11.04 11.42 10.72 11.205 10.72 11.205 10.715 10.875 10.715 10.875 10.72 10.66 10.72 10.66 11.04 10.875 11.04 10.875 11.045 ;
|
||||
POLYGON 81.125 0.165 81.125 0.16 81.34 0.16 81.34 -0.16 81.125 -0.16 81.125 -0.165 80.795 -0.165 80.795 -0.16 80.58 -0.16 80.58 0.16 80.795 0.16 80.795 0.165 ;
|
||||
POLYGON 51.685 0.165 51.685 0.16 51.9 0.16 51.9 -0.16 51.685 -0.16 51.685 -0.165 51.355 -0.165 51.355 -0.16 51.14 -0.16 51.14 0.16 51.355 0.16 51.355 0.165 ;
|
||||
|
|
@ -1315,20 +1318,26 @@ MACRO sb_2__2_
|
|||
POLYGON 91.6 97.52 91.6 0.4 81.66 0.4 81.66 1 80.26 1 80.26 0.4 66.94 0.4 66.94 1 65.54 1 65.54 0.4 52.22 0.4 52.22 1 50.82 1 50.82 0.4 37.5 0.4 37.5 1 36.1 1 36.1 0.4 26.16 0.4 26.16 11.28 11.74 11.28 11.74 11.88 10.34 11.88 10.34 11.28 9.29 11.28 9.29 12.08 8.19 12.08 8.19 11.28 7.45 11.28 7.45 12.08 6.35 12.08 6.35 11.28 0.4 11.28 0.4 97.52 10.34 97.52 10.34 96.92 11.74 96.92 11.74 97.52 36.1 97.52 36.1 96.92 37.5 96.92 37.5 97.52 50.82 97.52 50.82 96.92 52.22 96.92 52.22 97.52 65.54 97.52 65.54 96.92 66.94 96.92 66.94 97.52 80.26 97.52 80.26 96.92 81.66 96.92 81.66 97.52 ;
|
||||
LAYER met1 ;
|
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RECT 45.68 97.68 46.32 98.16 ;
|
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POLYGON 37.65 11.52 37.65 11.26 37.33 11.26 37.33 11.32 36.715 11.32 36.715 11.275 36.425 11.275 36.425 11.505 36.715 11.505 36.715 11.46 37.33 11.46 37.33 11.52 ;
|
||||
POLYGON 39.4 12.14 39.4 11.46 50.44 11.46 50.44 11.32 39.26 11.32 39.26 12.14 ;
|
||||
POLYGON 34.89 11.52 34.89 11.26 34.57 11.26 34.57 11.32 33.955 11.32 33.955 11.275 33.665 11.275 33.665 11.505 33.955 11.505 33.955 11.46 34.57 11.46 34.57 11.52 ;
|
||||
POLYGON 23.39 11.52 23.39 11.26 23.07 11.26 23.07 11.32 11.505 11.32 11.505 11.275 11.215 11.275 11.215 11.505 11.505 11.505 11.505 11.46 23.07 11.46 23.07 11.52 ;
|
||||
POLYGON 45.47 10.5 45.47 10.44 46.3 10.44 46.3 10.3 45.47 10.3 45.47 10.24 45.15 10.24 45.15 10.5 ;
|
||||
POLYGON 36.73 10.5 36.73 10.24 36.41 10.24 36.41 10.255 36.025 10.255 36.025 10.485 36.41 10.485 36.41 10.5 ;
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||||
RECT 31.81 10.24 32.13 10.5 ;
|
||||
POLYGON 34.415 10.485 34.415 10.255 34.125 10.255 34.125 10.3 32.96 10.3 32.96 9.96 32.82 9.96 32.82 10.44 34.125 10.44 34.125 10.485 ;
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RECT 45.68 -0.24 46.32 0.24 ;
|
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POLYGON 46.32 97.64 46.32 97.4 91.72 97.4 91.72 95.72 91.24 95.72 91.24 94.68 91.72 94.68 91.72 93 91.24 93 91.24 91.96 91.72 91.96 91.72 90.28 91.24 90.28 91.24 89.24 91.72 89.24 91.72 87.56 91.24 87.56 91.24 86.52 91.72 86.52 91.72 84.84 91.24 84.84 91.24 83.8 91.72 83.8 91.72 82.12 91.24 82.12 91.24 81.08 91.72 81.08 91.72 79.4 91.24 79.4 91.24 78.36 91.72 78.36 91.72 76.68 91.24 76.68 91.24 75.64 91.72 75.64 91.72 73.96 91.24 73.96 91.24 72.92 91.72 72.92 91.72 71.24 91.24 71.24 91.24 70.2 91.72 70.2 91.72 68.52 91.24 68.52 91.24 67.48 91.72 67.48 91.72 65.8 91.24 65.8 91.24 64.76 91.72 64.76 91.72 63.08 91.24 63.08 91.24 62.04 91.72 62.04 91.72 60.36 91.24 60.36 91.24 59.32 91.72 59.32 91.72 57.64 91.24 57.64 91.24 56.6 91.72 56.6 91.72 54.92 91.24 54.92 91.24 53.88 91.72 53.88 91.72 52.2 91.24 52.2 91.24 51.16 91.72 51.16 91.72 49.48 91.24 49.48 91.24 48.44 91.72 48.44 91.72 46.76 91.24 46.76 91.24 45.72 91.72 45.72 91.72 44.04 91.24 44.04 91.24 43 91.72 43 91.72 41.32 91.24 41.32 91.24 40.28 91.72 40.28 91.72 38.6 91.24 38.6 91.24 37.56 91.72 37.56 91.72 35.88 91.24 35.88 91.24 34.84 91.72 34.84 91.72 33.16 91.24 33.16 91.24 32.12 91.72 32.12 91.72 30.44 91.24 30.44 91.24 29.4 91.72 29.4 91.72 27.72 91.24 27.72 91.24 26.68 91.72 26.68 91.72 25 91.24 25 91.24 23.96 91.72 23.96 91.72 22.28 91.24 22.28 91.24 21.24 91.72 21.24 91.72 19.56 91.24 19.56 91.24 18.52 91.72 18.52 91.72 16.84 91.24 16.84 91.24 15.8 91.72 15.8 91.72 14.12 91.24 14.12 91.24 13.08 91.72 13.08 91.72 11.4 91.24 11.4 91.24 10.36 91.72 10.36 91.72 8.68 91.24 8.68 91.24 7.64 91.72 7.64 91.72 5.96 91.24 5.96 91.24 4.92 91.72 4.92 91.72 3.24 91.24 3.24 91.24 2.2 91.72 2.2 91.72 0.52 46.32 0.52 46.32 0.28 45.68 0.28 45.68 0.52 26.04 0.52 26.04 2.2 26.52 2.2 26.52 3.24 26.04 3.24 26.04 4.92 26.52 4.92 26.52 5.96 26.04 5.96 26.04 7.64 26.52 7.64 26.52 8.68 26.04 8.68 26.04 10.36 45.68 10.36 45.68 11.4 0.28 11.4 0.28 13.08 0.76 13.08 0.76 14.12 0.28 14.12 0.28 15.8 0.76 15.8 0.76 16.84 0.28 16.84 0.28 18.52 0.76 18.52 0.76 19.56 0.28 19.56 0.28 21.24 0.76 21.24 0.76 22.28 0.28 22.28 0.28 23.96 0.76 23.96 0.76 25 0.28 25 0.28 26.68 0.76 26.68 0.76 27.72 0.28 27.72 0.28 29.4 0.76 29.4 0.76 30.44 0.28 30.44 0.28 32.12 0.76 32.12 0.76 33.16 0.28 33.16 0.28 34.84 0.76 34.84 0.76 35.88 0.28 35.88 0.28 37.56 0.76 37.56 0.76 38.6 0.28 38.6 0.28 40.28 0.76 40.28 0.76 41.32 0.28 41.32 0.28 43 0.76 43 0.76 44.04 0.28 44.04 0.28 45.72 0.76 45.72 0.76 46.76 0.28 46.76 0.28 48.44 0.76 48.44 0.76 49.48 0.28 49.48 0.28 51.16 0.76 51.16 0.76 52.2 0.28 52.2 0.28 53.88 0.76 53.88 0.76 54.92 0.28 54.92 0.28 56.6 0.76 56.6 0.76 57.64 0.28 57.64 0.28 59.32 0.76 59.32 0.76 60.36 0.28 60.36 0.28 62.04 0.76 62.04 0.76 63.08 0.28 63.08 0.28 64.76 0.76 64.76 0.76 65.8 0.28 65.8 0.28 67.48 0.76 67.48 0.76 68.52 0.28 68.52 0.28 70.2 0.76 70.2 0.76 71.24 0.28 71.24 0.28 72.92 0.76 72.92 0.76 73.96 0.28 73.96 0.28 75.64 0.76 75.64 0.76 76.68 0.28 76.68 0.28 78.36 0.76 78.36 0.76 79.4 0.28 79.4 0.28 81.08 0.76 81.08 0.76 82.12 0.28 82.12 0.28 83.8 0.76 83.8 0.76 84.84 0.28 84.84 0.28 86.52 0.76 86.52 0.76 87.56 0.28 87.56 0.28 89.24 0.76 89.24 0.76 90.28 0.28 90.28 0.28 91.96 0.76 91.96 0.76 93 0.28 93 0.28 94.68 0.76 94.68 0.76 95.72 0.28 95.72 0.28 97.4 45.68 97.4 45.68 97.64 ;
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LAYER met5 ;
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POLYGON 90.4 96.32 90.4 88.2 87.2 88.2 87.2 81.8 90.4 81.8 90.4 67.8 87.2 67.8 87.2 61.4 90.4 61.4 90.4 47.4 87.2 47.4 87.2 41 90.4 41 90.4 27 87.2 27 87.2 20.6 90.4 20.6 90.4 1.6 27.36 1.6 27.36 12.48 1.6 12.48 1.6 20.6 4.8 20.6 4.8 27 1.6 27 1.6 41 4.8 41 4.8 47.4 1.6 47.4 1.6 61.4 4.8 61.4 4.8 67.8 1.6 67.8 1.6 81.8 4.8 81.8 4.8 88.2 1.6 88.2 1.6 96.32 ;
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LAYER li1 ;
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RECT 0 97.835 92 98.005 ;
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RECT 88.32 95.115 92 95.285 ;
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POLYGON 92 98.005 92 97.835 89.615 97.835 89.615 97.11 89.325 97.11 89.325 97.835 82.255 97.835 82.255 97.11 81.965 97.11 81.965 97.835 67.535 97.835 67.535 97.11 67.245 97.11 67.245 97.835 52.355 97.835 52.355 97.11 52.065 97.11 52.065 97.835 37.635 97.835 37.635 97.11 37.345 97.11 37.345 97.835 22.455 97.835 22.455 97.11 22.165 97.11 22.165 97.835 7.735 97.835 7.735 97.11 7.445 97.11 7.445 97.835 0 97.835 0 98.005 ;
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RECT 91.54 95.115 92 95.285 ;
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RECT 0 95.115 3.68 95.285 ;
|
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RECT 88.32 92.395 92 92.565 ;
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RECT 91.54 92.395 92 92.565 ;
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RECT 0 92.395 3.68 92.565 ;
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RECT 88.32 89.675 92 89.845 ;
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RECT 91.54 89.675 92 89.845 ;
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RECT 0 89.675 3.68 89.845 ;
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RECT 88.32 86.955 92 87.125 ;
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RECT 91.54 86.955 92 87.125 ;
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RECT 0 86.955 3.68 87.125 ;
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RECT 91.54 84.235 92 84.405 ;
|
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RECT 0 84.235 3.68 84.405 ;
|
||||
|
|
@ -1336,78 +1345,87 @@ MACRO sb_2__2_
|
|||
RECT 0 81.515 3.68 81.685 ;
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RECT 91.54 78.795 92 78.965 ;
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RECT 0 78.795 3.68 78.965 ;
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RECT 90.16 76.075 92 76.245 ;
|
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RECT 91.54 76.075 92 76.245 ;
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RECT 0 76.075 3.68 76.245 ;
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RECT 90.16 73.355 92 73.525 ;
|
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RECT 91.54 73.355 92 73.525 ;
|
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RECT 0 73.355 3.68 73.525 ;
|
||||
RECT 88.32 70.635 92 70.805 ;
|
||||
RECT 91.54 70.635 92 70.805 ;
|
||||
RECT 0 70.635 3.68 70.805 ;
|
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RECT 88.32 67.915 92 68.085 ;
|
||||
RECT 91.54 67.915 92 68.085 ;
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RECT 0 67.915 3.68 68.085 ;
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RECT 90.16 65.195 92 65.365 ;
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RECT 0 65.195 1.84 65.365 ;
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RECT 0 65.195 3.68 65.365 ;
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RECT 90.16 62.475 92 62.645 ;
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RECT 0 62.475 3.68 62.645 ;
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RECT 0 62.475 1.84 62.645 ;
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RECT 90.16 59.755 92 59.925 ;
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RECT 0 59.755 3.68 59.925 ;
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RECT 88.32 57.035 92 57.205 ;
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RECT 90.16 57.035 92 57.205 ;
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RECT 0 57.035 3.68 57.205 ;
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RECT 88.32 54.315 92 54.485 ;
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RECT 91.54 54.315 92 54.485 ;
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RECT 0 54.315 3.68 54.485 ;
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RECT 91.08 51.595 92 51.765 ;
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RECT 91.54 51.595 92 51.765 ;
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RECT 0 51.595 3.68 51.765 ;
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RECT 91.08 48.875 92 49.045 ;
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RECT 91.54 48.875 92 49.045 ;
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RECT 0 48.875 3.68 49.045 ;
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RECT 91.08 46.155 92 46.325 ;
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RECT 91.54 46.155 92 46.325 ;
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RECT 0 46.155 1.84 46.325 ;
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RECT 91.08 43.435 92 43.605 ;
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RECT 91.54 43.435 92 43.605 ;
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RECT 0 43.435 3.68 43.605 ;
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RECT 88.32 40.715 92 40.885 ;
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RECT 91.54 40.715 92 40.885 ;
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RECT 0 40.715 3.68 40.885 ;
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RECT 88.32 37.995 92 38.165 ;
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RECT 90.16 37.995 92 38.165 ;
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RECT 0 37.995 3.68 38.165 ;
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RECT 90.16 35.275 92 35.445 ;
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RECT 0 35.275 3.68 35.445 ;
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RECT 88.32 32.555 92 32.725 ;
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RECT 91.54 32.555 92 32.725 ;
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RECT 0 32.555 3.68 32.725 ;
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RECT 88.32 29.835 92 30.005 ;
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RECT 91.54 29.835 92 30.005 ;
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RECT 0 29.835 3.68 30.005 ;
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RECT 91.08 27.115 92 27.285 ;
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RECT 0 27.115 1.84 27.285 ;
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RECT 91.08 24.395 92 24.565 ;
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RECT 90.16 27.115 92 27.285 ;
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RECT 0 27.115 3.68 27.285 ;
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RECT 90.16 24.395 92 24.565 ;
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RECT 0 24.395 3.68 24.565 ;
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RECT 91.08 21.675 92 21.845 ;
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RECT 88.32 21.675 92 21.845 ;
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RECT 0 21.675 3.68 21.845 ;
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RECT 91.08 18.955 92 19.125 ;
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RECT 88.32 18.955 92 19.125 ;
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RECT 0 18.955 3.68 19.125 ;
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RECT 91.54 16.235 92 16.405 ;
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RECT 88.32 16.235 92 16.405 ;
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RECT 0 16.235 3.68 16.405 ;
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RECT 91.08 13.515 92 13.685 ;
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RECT 88.32 13.515 92 13.685 ;
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RECT 0 13.515 3.68 13.685 ;
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RECT 91.08 10.795 92 10.965 ;
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RECT 0 10.795 29.44 10.965 ;
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POLYGON 17.445 11.765 17.445 10.965 17.955 10.965 17.955 11.445 18.285 11.445 18.285 10.965 18.795 10.965 18.795 11.445 19.125 11.445 19.125 10.965 19.715 10.965 19.715 11.445 19.885 11.445 19.885 10.965 20.555 10.965 20.555 11.445 20.725 11.445 20.725 10.965 22.165 10.965 22.165 11.69 22.455 11.69 22.455 10.965 29.44 10.965 29.44 10.795 0 10.795 0 10.965 3.315 10.965 3.315 11.765 3.645 11.765 3.645 10.965 4.155 10.965 4.155 11.445 4.485 11.445 4.485 10.965 4.995 10.965 4.995 11.445 5.325 11.445 5.325 10.965 5.915 10.965 5.915 11.445 6.085 11.445 6.085 10.965 6.755 10.965 6.755 11.445 6.925 11.445 6.925 10.965 7.445 10.965 7.445 11.69 7.735 11.69 7.735 10.965 9.175 10.965 9.175 11.445 9.345 11.445 9.345 10.965 10.015 10.965 10.015 11.445 10.185 11.445 10.185 10.965 10.775 10.965 10.775 11.445 11.105 11.445 11.105 10.965 11.615 10.965 11.615 11.445 11.945 11.445 11.945 10.965 12.455 10.965 12.455 11.765 12.785 11.765 12.785 10.965 17.115 10.965 17.115 11.765 ;
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RECT 91.54 10.795 92 10.965 ;
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RECT 91.54 8.075 92 8.245 ;
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RECT 25.76 8.075 29.44 8.245 ;
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RECT 91.08 5.355 92 5.525 ;
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RECT 91.54 5.355 92 5.525 ;
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RECT 25.76 5.355 29.44 5.525 ;
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RECT 88.32 2.635 92 2.805 ;
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RECT 91.54 2.635 92 2.805 ;
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RECT 25.76 2.635 29.44 2.805 ;
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RECT 25.76 -0.085 92 0.085 ;
|
||||
POLYGON 87.305 0.885 87.305 0.085 89.325 0.085 89.325 0.81 89.615 0.81 89.615 0.085 92 0.085 92 -0.085 25.76 -0.085 25.76 0.085 29.525 0.085 29.525 0.81 29.815 0.81 29.815 0.085 37.345 0.085 37.345 0.81 37.635 0.81 37.635 0.085 38.235 0.085 38.235 0.465 38.565 0.465 38.565 0.085 39.175 0.085 39.175 0.545 39.425 0.545 39.425 0.085 41.12 0.085 41.12 0.585 41.49 0.585 41.49 0.085 43.345 0.085 43.345 0.615 43.515 0.615 43.515 0.085 44.345 0.085 44.345 0.565 44.515 0.565 44.515 0.085 45.215 0.085 45.215 0.56 45.385 0.56 45.385 0.085 46.065 0.085 46.065 0.56 46.235 0.56 46.235 0.085 47.355 0.085 47.355 0.565 47.525 0.565 47.525 0.085 48.195 0.085 48.195 0.565 48.365 0.565 48.365 0.085 48.955 0.085 48.955 0.565 49.285 0.565 49.285 0.085 49.795 0.085 49.795 0.565 50.125 0.565 50.125 0.085 50.635 0.085 50.635 0.885 50.965 0.885 50.965 0.085 52.065 0.085 52.065 0.81 52.355 0.81 52.355 0.085 52.575 0.085 52.575 0.545 52.88 0.545 52.88 0.085 53.55 0.085 53.55 0.545 53.72 0.545 53.72 0.085 54.39 0.085 54.39 0.545 54.56 0.545 54.56 0.085 55.23 0.085 55.23 0.545 55.4 0.545 55.4 0.085 56.07 0.085 56.07 0.545 56.325 0.545 56.325 0.085 61.315 0.085 61.315 0.545 61.62 0.545 61.62 0.085 62.29 0.085 62.29 0.545 62.46 0.545 62.46 0.085 63.13 0.085 63.13 0.545 63.3 0.545 63.3 0.085 63.97 0.085 63.97 0.545 64.14 0.545 64.14 0.085 64.81 0.085 64.81 0.545 65.065 0.545 65.065 0.085 67.245 0.085 67.245 0.81 67.535 0.81 67.535 0.085 72.275 0.085 72.275 0.465 72.605 0.465 72.605 0.085 73.215 0.085 73.215 0.545 73.465 0.545 73.465 0.085 75.16 0.085 75.16 0.585 75.53 0.585 75.53 0.085 77.385 0.085 77.385 0.615 77.555 0.615 77.555 0.085 78.385 0.085 78.385 0.565 78.555 0.565 78.555 0.085 79.255 0.085 79.255 0.56 79.425 0.56 79.425 0.085 80.105 0.085 80.105 0.56 80.275 0.56 80.275 0.085 81.965 0.085 81.965 0.81 82.255 0.81 82.255 0.085 83.695 0.085 83.695 0.565 83.865 0.565 83.865 0.085 84.535 0.085 84.535 0.565 84.705 0.565 84.705 0.085 85.295 0.085 85.295 0.565 85.625 0.565 85.625 0.085 86.135 0.085 86.135 0.565 86.465 0.565 86.465 0.085 86.975 0.085 86.975 0.885 ;
|
||||
POLYGON 91.83 97.75 91.83 0.17 25.93 0.17 25.93 11.05 0.17 11.05 0.17 97.75 ;
|
||||
LAYER mcon ;
|
||||
RECT 36.485 11.305 36.655 11.475 ;
|
||||
RECT 33.725 11.305 33.895 11.475 ;
|
||||
RECT 11.275 11.305 11.445 11.475 ;
|
||||
RECT 36.085 10.285 36.255 10.455 ;
|
||||
RECT 34.185 10.285 34.355 10.455 ;
|
||||
RECT 31.89 10.285 32.06 10.455 ;
|
||||
LAYER via ;
|
||||
RECT 80.885 97.845 81.035 97.995 ;
|
||||
RECT 51.445 97.845 51.595 97.995 ;
|
||||
RECT 10.965 97.845 11.115 97.995 ;
|
||||
RECT 37.415 11.315 37.565 11.465 ;
|
||||
RECT 34.655 11.315 34.805 11.465 ;
|
||||
RECT 23.155 11.315 23.305 11.465 ;
|
||||
RECT 10.965 10.805 11.115 10.955 ;
|
||||
RECT 45.235 10.295 45.385 10.445 ;
|
||||
RECT 36.495 10.295 36.645 10.445 ;
|
||||
RECT 31.895 10.295 32.045 10.445 ;
|
||||
RECT 80.885 -0.075 81.035 0.075 ;
|
||||
RECT 51.445 -0.075 51.595 0.075 ;
|
||||
LAYER via2 ;
|
||||
RECT 80.86 97.82 81.06 98.02 ;
|
||||
RECT 51.42 97.82 51.62 98.02 ;
|
||||
RECT 10.94 97.82 11.14 98.02 ;
|
||||
RECT 1.05 45.8 1.25 46 ;
|
||||
RECT 10.94 10.78 11.14 10.98 ;
|
||||
RECT 80.86 -0.1 81.06 0.1 ;
|
||||
RECT 51.42 -0.1 51.62 0.1 ;
|
||||
|
|
|
|||
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@ -11,23 +11,21 @@ input [0:0] ccff_head ;
|
|||
output [0:0] ccff_tail ;
|
||||
output [0:0] mem_out ;
|
||||
|
||||
wire copt_net_124 ;
|
||||
wire copt_net_122 ;
|
||||
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ccff_head[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( copt_net_124 ) ) ;
|
||||
.CLK ( prog_clk[0] ) , .Q ( copt_net_122 ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 FTB_18__17 ( .A ( mem_out[0] ) , .X ( ccff_tail[0] ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1351 ( .A ( copt_net_119 ) ,
|
||||
.X ( copt_net_118 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1352 ( .A ( copt_net_124 ) ,
|
||||
.X ( copt_net_119 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1353 ( .A ( copt_net_118 ) ,
|
||||
.X ( copt_net_120 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1354 ( .A ( copt_net_122 ) ,
|
||||
sky130_fd_sc_hd__dlygate4sd1_1 copt_h_inst_1346 ( .A ( copt_net_124 ) ,
|
||||
.X ( mem_out[0] ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1355 ( .A ( copt_net_123 ) ,
|
||||
.X ( copt_net_122 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1356 ( .A ( copt_net_120 ) ,
|
||||
.X ( copt_net_123 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1347 ( .A ( copt_net_125 ) ,
|
||||
.X ( copt_net_124 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1348 ( .A ( copt_net_126 ) ,
|
||||
.X ( copt_net_125 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1349 ( .A ( copt_net_127 ) ,
|
||||
.X ( copt_net_126 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1350 ( .A ( copt_net_122 ) ,
|
||||
.X ( copt_net_127 ) ) ;
|
||||
endmodule
|
||||
|
||||
|
||||
|
|
@ -42,17 +40,17 @@ input FPGA_DIR ;
|
|||
input IO_ISOL_N ;
|
||||
|
||||
sky130_fd_sc_hd__nand2b_1 ISOL_EN_GATE ( .A_N ( FPGA_DIR ) ,
|
||||
.B ( IO_ISOL_N ) , .Y ( aps_rename_511_ ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 INV_SOC_DIR ( .A ( aps_rename_511_ ) ,
|
||||
.B ( IO_ISOL_N ) , .Y ( aps_rename_510_ ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 INV_SOC_DIR ( .A ( aps_rename_510_ ) ,
|
||||
.Y ( SOC_DIR_N ) ) ;
|
||||
sky130_fd_sc_hd__ebufn_4 IN_PROTECT_GATE ( .A ( SOC_IN ) ,
|
||||
.TE_B ( SOC_DIR_N ) , .Z ( FPGA_IN ) ) ;
|
||||
sky130_fd_sc_hd__ebufn_4 OUT_PROTECT_GATE ( .A ( FPGA_OUT ) ,
|
||||
.TE_B ( BUF_net_88 ) , .Z ( SOC_OUT ) ) ;
|
||||
sky130_fd_sc_hd__inv_4 BINV_R_88 ( .A ( BUF_net_90 ) , .Y ( BUF_net_88 ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 BINV_R_90 ( .A ( aps_rename_511_ ) ,
|
||||
.Y ( BUF_net_90 ) ) ;
|
||||
sky130_fd_sc_hd__inv_6 BINV_R_112 ( .A ( BUF_net_90 ) , .Y ( SOC_DIR ) ) ;
|
||||
.TE_B ( BUF_net_90 ) , .Z ( SOC_OUT ) ) ;
|
||||
sky130_fd_sc_hd__inv_4 BINV_R_90 ( .A ( BUF_net_92 ) , .Y ( BUF_net_90 ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 BINV_R_92 ( .A ( aps_rename_510_ ) ,
|
||||
.Y ( BUF_net_92 ) ) ;
|
||||
sky130_fd_sc_hd__inv_6 BINV_R_110 ( .A ( BUF_net_92 ) , .Y ( SOC_DIR ) ) ;
|
||||
endmodule
|
||||
|
||||
|
||||
|
|
@ -132,16 +130,13 @@ input FPGA_DIR ;
|
|||
input IO_ISOL_N ;
|
||||
|
||||
sky130_fd_sc_hd__nand2b_1 ISOL_EN_GATE ( .A_N ( FPGA_DIR ) ,
|
||||
.B ( IO_ISOL_N ) , .Y ( aps_rename_510_ ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 INV_SOC_DIR ( .A ( BUF_net_85 ) , .Y ( SOC_DIR_N ) ) ;
|
||||
.B ( IO_ISOL_N ) , .Y ( net_net_89 ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 INV_SOC_DIR ( .A ( SOC_DIR ) , .Y ( SOC_DIR_N ) ) ;
|
||||
sky130_fd_sc_hd__ebufn_4 IN_PROTECT_GATE ( .A ( SOC_IN ) ,
|
||||
.TE_B ( SOC_DIR_N ) , .Z ( FPGA_IN ) ) ;
|
||||
sky130_fd_sc_hd__ebufn_4 OUT_PROTECT_GATE ( .A ( FPGA_OUT ) ,
|
||||
.TE_B ( BUF_net_85 ) , .Z ( SOC_OUT ) ) ;
|
||||
sky130_fd_sc_hd__inv_4 BINV_R_85 ( .A ( BUF_net_87 ) , .Y ( BUF_net_85 ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 BINV_R_87 ( .A ( aps_rename_510_ ) ,
|
||||
.Y ( BUF_net_87 ) ) ;
|
||||
sky130_fd_sc_hd__inv_6 BINV_R_108 ( .A ( BUF_net_87 ) , .Y ( SOC_DIR ) ) ;
|
||||
.TE_B ( SOC_DIR ) , .Z ( SOC_OUT ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 BUFT_RR_89 ( .A ( net_net_89 ) , .X ( SOC_DIR ) ) ;
|
||||
endmodule
|
||||
|
||||
|
||||
|
|
@ -222,15 +217,16 @@ input IO_ISOL_N ;
|
|||
|
||||
sky130_fd_sc_hd__nand2b_1 ISOL_EN_GATE ( .A_N ( FPGA_DIR ) ,
|
||||
.B ( IO_ISOL_N ) , .Y ( aps_rename_509_ ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 INV_SOC_DIR ( .A ( BUF_net_82 ) , .Y ( SOC_DIR_N ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 INV_SOC_DIR ( .A ( BUF_net_87 ) , .Y ( SOC_DIR_N ) ) ;
|
||||
sky130_fd_sc_hd__ebufn_4 IN_PROTECT_GATE ( .A ( SOC_IN ) ,
|
||||
.TE_B ( SOC_DIR_N ) , .Z ( FPGA_IN ) ) ;
|
||||
sky130_fd_sc_hd__ebufn_4 OUT_PROTECT_GATE ( .A ( FPGA_OUT ) ,
|
||||
.TE_B ( BUF_net_82 ) , .Z ( SOC_OUT ) ) ;
|
||||
sky130_fd_sc_hd__inv_4 BINV_R_82 ( .A ( BUF_net_84 ) , .Y ( BUF_net_82 ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 BINV_R_84 ( .A ( aps_rename_509_ ) ,
|
||||
.Y ( BUF_net_84 ) ) ;
|
||||
sky130_fd_sc_hd__inv_6 BINV_R_106 ( .A ( BUF_net_84 ) , .Y ( SOC_DIR ) ) ;
|
||||
.TE_B ( BUF_net_86 ) , .Z ( SOC_OUT ) ) ;
|
||||
sky130_fd_sc_hd__inv_4 BINV_R_86 ( .A ( BUF_net_88 ) , .Y ( BUF_net_86 ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 BINV_R_87 ( .A ( BUF_net_88 ) , .Y ( BUF_net_87 ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 BINV_R_88 ( .A ( aps_rename_509_ ) ,
|
||||
.Y ( BUF_net_88 ) ) ;
|
||||
sky130_fd_sc_hd__inv_6 BINV_R_108 ( .A ( BUF_net_88 ) , .Y ( SOC_DIR ) ) ;
|
||||
endmodule
|
||||
|
||||
|
||||
|
|
@ -311,16 +307,14 @@ input IO_ISOL_N ;
|
|||
|
||||
sky130_fd_sc_hd__nand2b_1 ISOL_EN_GATE ( .A_N ( FPGA_DIR ) ,
|
||||
.B ( IO_ISOL_N ) , .Y ( aps_rename_508_ ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 INV_SOC_DIR ( .A ( aps_rename_508_ ) ,
|
||||
.Y ( SOC_DIR_N ) ) ;
|
||||
sky130_fd_sc_hd__ebufn_4 IN_PROTECT_GATE ( .A ( SOC_IN ) ,
|
||||
.TE_B ( SOC_DIR_N ) , .Z ( FPGA_IN ) ) ;
|
||||
.TE_B ( BUF_net_84 ) , .Z ( FPGA_IN ) ) ;
|
||||
sky130_fd_sc_hd__ebufn_4 OUT_PROTECT_GATE ( .A ( FPGA_OUT ) ,
|
||||
.TE_B ( BUF_net_79 ) , .Z ( SOC_OUT ) ) ;
|
||||
sky130_fd_sc_hd__inv_4 BINV_R_79 ( .A ( BUF_net_81 ) , .Y ( BUF_net_79 ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 BINV_R_81 ( .A ( aps_rename_508_ ) ,
|
||||
.Y ( BUF_net_81 ) ) ;
|
||||
sky130_fd_sc_hd__inv_6 BINV_R_110 ( .A ( BUF_net_81 ) , .Y ( SOC_DIR ) ) ;
|
||||
.TE_B ( BUF_net_81 ) , .Z ( SOC_OUT ) ) ;
|
||||
sky130_fd_sc_hd__inv_4 BINV_R_81 ( .A ( BUF_net_84 ) , .Y ( BUF_net_81 ) ) ;
|
||||
sky130_fd_sc_hd__inv_8 BINV_R_83 ( .A ( BUF_net_84 ) , .Y ( SOC_DIR ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 BINV_R_84 ( .A ( aps_rename_508_ ) ,
|
||||
.Y ( BUF_net_84 ) ) ;
|
||||
endmodule
|
||||
|
||||
|
||||
|
|
@ -400,16 +394,13 @@ input FPGA_DIR ;
|
|||
input IO_ISOL_N ;
|
||||
|
||||
sky130_fd_sc_hd__nand2b_1 ISOL_EN_GATE ( .A_N ( FPGA_DIR ) ,
|
||||
.B ( IO_ISOL_N ) , .Y ( aps_rename_507_ ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 INV_SOC_DIR ( .A ( BUF_net_76 ) , .Y ( SOC_DIR_N ) ) ;
|
||||
.B ( IO_ISOL_N ) , .Y ( net_net_80 ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 INV_SOC_DIR ( .A ( SOC_DIR ) , .Y ( SOC_DIR_N ) ) ;
|
||||
sky130_fd_sc_hd__ebufn_4 IN_PROTECT_GATE ( .A ( SOC_IN ) ,
|
||||
.TE_B ( SOC_DIR_N ) , .Z ( FPGA_IN ) ) ;
|
||||
sky130_fd_sc_hd__ebufn_4 OUT_PROTECT_GATE ( .A ( FPGA_OUT ) ,
|
||||
.TE_B ( BUF_net_76 ) , .Z ( SOC_OUT ) ) ;
|
||||
sky130_fd_sc_hd__inv_4 BINV_R_76 ( .A ( BUF_net_78 ) , .Y ( BUF_net_76 ) ) ;
|
||||
sky130_fd_sc_hd__inv_8 BINV_R_77 ( .A ( BUF_net_78 ) , .Y ( SOC_DIR ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 BINV_R_78 ( .A ( aps_rename_507_ ) ,
|
||||
.Y ( BUF_net_78 ) ) ;
|
||||
.TE_B ( SOC_DIR ) , .Z ( SOC_OUT ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 BUFT_RR_80 ( .A ( net_net_80 ) , .X ( SOC_DIR ) ) ;
|
||||
endmodule
|
||||
|
||||
|
||||
|
|
@ -489,16 +480,19 @@ input FPGA_DIR ;
|
|||
input IO_ISOL_N ;
|
||||
|
||||
sky130_fd_sc_hd__nand2b_1 ISOL_EN_GATE ( .A_N ( FPGA_DIR ) ,
|
||||
.B ( IO_ISOL_N ) , .Y ( aps_rename_506_ ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 INV_SOC_DIR ( .A ( BUF_net_73 ) , .Y ( SOC_DIR_N ) ) ;
|
||||
.B ( IO_ISOL_N ) , .Y ( aps_rename_507_ ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 INV_SOC_DIR ( .A ( aps_rename_507_ ) ,
|
||||
.Y ( SOC_DIR_N ) ) ;
|
||||
sky130_fd_sc_hd__ebufn_4 IN_PROTECT_GATE ( .A ( SOC_IN ) ,
|
||||
.TE_B ( SOC_DIR_N ) , .Z ( FPGA_IN ) ) ;
|
||||
sky130_fd_sc_hd__ebufn_4 OUT_PROTECT_GATE ( .A ( FPGA_OUT ) ,
|
||||
.TE_B ( BUF_net_73 ) , .Z ( SOC_OUT ) ) ;
|
||||
sky130_fd_sc_hd__inv_4 BINV_R_73 ( .A ( BUF_net_75 ) , .Y ( BUF_net_73 ) ) ;
|
||||
sky130_fd_sc_hd__inv_8 BINV_R_74 ( .A ( BUF_net_75 ) , .Y ( SOC_DIR ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 BINV_R_75 ( .A ( aps_rename_506_ ) ,
|
||||
.Y ( BUF_net_75 ) ) ;
|
||||
.TE_B ( BUF_net_77 ) , .Z ( SOC_OUT ) ) ;
|
||||
sky130_fd_sc_hd__inv_4 BINV_R_77 ( .A ( BUF_net_79 ) , .Y ( BUF_net_77 ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 BINV_R_78 ( .A ( BUF_net_79 ) , .Y ( BUF_net_78 ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 BINV_R_79 ( .A ( aps_rename_507_ ) ,
|
||||
.Y ( BUF_net_79 ) ) ;
|
||||
sky130_fd_sc_hd__inv_8 BINV_R_106 ( .A ( BUF_net_107 ) , .Y ( SOC_DIR ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 BINV_R_107 ( .A ( BUF_net_78 ) , .Y ( BUF_net_107 ) ) ;
|
||||
endmodule
|
||||
|
||||
|
||||
|
|
@ -568,7 +562,7 @@ endmodule
|
|||
|
||||
|
||||
module cbx_1__0__EMBEDDED_IO_HD_2 ( SOC_IN , SOC_OUT , SOC_DIR , FPGA_IN ,
|
||||
FPGA_OUT , FPGA_DIR , IO_ISOL_N , ZBUF_184_0 ) ;
|
||||
FPGA_OUT , FPGA_DIR , IO_ISOL_N , ZBUF_211_0 ) ;
|
||||
input SOC_IN ;
|
||||
output SOC_OUT ;
|
||||
output SOC_DIR ;
|
||||
|
|
@ -576,22 +570,22 @@ output FPGA_IN ;
|
|||
input FPGA_OUT ;
|
||||
input FPGA_DIR ;
|
||||
input IO_ISOL_N ;
|
||||
input ZBUF_184_0 ;
|
||||
input ZBUF_211_0 ;
|
||||
|
||||
sky130_fd_sc_hd__nand2b_1 ISOL_EN_GATE ( .A_N ( FPGA_DIR ) ,
|
||||
.B ( IO_ISOL_N ) , .Y ( SOC_DIR ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 INV_SOC_DIR ( .A ( SOC_DIR ) , .Y ( SOC_DIR_N ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 INV_SOC_DIR ( .A ( ZBUF_211_0 ) , .Y ( SOC_DIR_N ) ) ;
|
||||
sky130_fd_sc_hd__ebufn_4 IN_PROTECT_GATE ( .A ( SOC_IN ) ,
|
||||
.TE_B ( SOC_DIR_N ) , .Z ( FPGA_IN ) ) ;
|
||||
sky130_fd_sc_hd__ebufn_4 OUT_PROTECT_GATE ( .A ( FPGA_OUT ) ,
|
||||
.TE_B ( ZBUF_184_0 ) , .Z ( SOC_OUT ) ) ;
|
||||
.TE_B ( ZBUF_211_0 ) , .Z ( SOC_OUT ) ) ;
|
||||
endmodule
|
||||
|
||||
|
||||
module cbx_1__0__logical_tile_io_mode_physical__iopad_2 ( IO_ISOL_N ,
|
||||
prog_clk , gfpga_pad_EMBEDDED_IO_HD_SOC_IN ,
|
||||
gfpga_pad_EMBEDDED_IO_HD_SOC_OUT , gfpga_pad_EMBEDDED_IO_HD_SOC_DIR ,
|
||||
iopad_outpad , ccff_head , iopad_inpad , ccff_tail , ZBUF_184_0 ) ;
|
||||
iopad_outpad , ccff_head , iopad_inpad , ccff_tail , ZBUF_211_0 ) ;
|
||||
input [0:0] IO_ISOL_N ;
|
||||
input [0:0] prog_clk ;
|
||||
input [0:0] gfpga_pad_EMBEDDED_IO_HD_SOC_IN ;
|
||||
|
|
@ -601,7 +595,7 @@ input [0:0] iopad_outpad ;
|
|||
input [0:0] ccff_head ;
|
||||
output [0:0] iopad_inpad ;
|
||||
output [0:0] ccff_tail ;
|
||||
input ZBUF_184_0 ;
|
||||
input ZBUF_211_0 ;
|
||||
|
||||
wire [0:0] EMBEDDED_IO_HD_0_en ;
|
||||
|
||||
|
|
@ -611,7 +605,7 @@ cbx_1__0__EMBEDDED_IO_HD_2 EMBEDDED_IO_HD_0_ (
|
|||
.SOC_DIR ( gfpga_pad_EMBEDDED_IO_HD_SOC_DIR[0] ) ,
|
||||
.FPGA_IN ( iopad_inpad[0] ) , .FPGA_OUT ( iopad_outpad[0] ) ,
|
||||
.FPGA_DIR ( EMBEDDED_IO_HD_0_en[0] ) , .IO_ISOL_N ( IO_ISOL_N[0] ) ,
|
||||
.ZBUF_184_0 ( ZBUF_184_0 ) ) ;
|
||||
.ZBUF_211_0 ( ZBUF_211_0 ) ) ;
|
||||
cbx_1__0__EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem_2 EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem (
|
||||
.prog_clk ( prog_clk ) , .ccff_head ( ccff_head ) ,
|
||||
.ccff_tail ( ccff_tail ) , .mem_out ( EMBEDDED_IO_HD_0_en ) ) ;
|
||||
|
|
@ -621,7 +615,7 @@ endmodule
|
|||
module cbx_1__0__logical_tile_io_mode_io__2 ( IO_ISOL_N , prog_clk ,
|
||||
gfpga_pad_EMBEDDED_IO_HD_SOC_IN , gfpga_pad_EMBEDDED_IO_HD_SOC_OUT ,
|
||||
gfpga_pad_EMBEDDED_IO_HD_SOC_DIR , io_outpad , ccff_head , io_inpad ,
|
||||
ccff_tail , ZBUF_184_0 ) ;
|
||||
ccff_tail , ZBUF_211_0 ) ;
|
||||
input [0:0] IO_ISOL_N ;
|
||||
input [0:0] prog_clk ;
|
||||
input [0:0] gfpga_pad_EMBEDDED_IO_HD_SOC_IN ;
|
||||
|
|
@ -631,7 +625,7 @@ input [0:0] io_outpad ;
|
|||
input [0:0] ccff_head ;
|
||||
output [0:0] io_inpad ;
|
||||
output [0:0] ccff_tail ;
|
||||
input ZBUF_184_0 ;
|
||||
input ZBUF_211_0 ;
|
||||
|
||||
cbx_1__0__logical_tile_io_mode_physical__iopad_2 logical_tile_io_mode_physical__iopad_0 (
|
||||
.IO_ISOL_N ( IO_ISOL_N ) , .prog_clk ( prog_clk ) ,
|
||||
|
|
@ -640,7 +634,7 @@ cbx_1__0__logical_tile_io_mode_physical__iopad_2 logical_tile_io_mode_physical__
|
|||
.gfpga_pad_EMBEDDED_IO_HD_SOC_DIR ( gfpga_pad_EMBEDDED_IO_HD_SOC_DIR ) ,
|
||||
.iopad_outpad ( io_outpad ) , .ccff_head ( ccff_head ) ,
|
||||
.iopad_inpad ( io_inpad ) , .ccff_tail ( ccff_tail ) ,
|
||||
.ZBUF_184_0 ( ZBUF_184_0 ) ) ;
|
||||
.ZBUF_211_0 ( ZBUF_211_0 ) ) ;
|
||||
endmodule
|
||||
|
||||
|
||||
|
|
@ -668,16 +662,17 @@ input FPGA_DIR ;
|
|||
input IO_ISOL_N ;
|
||||
|
||||
sky130_fd_sc_hd__nand2b_1 ISOL_EN_GATE ( .A_N ( FPGA_DIR ) ,
|
||||
.B ( IO_ISOL_N ) , .Y ( aps_rename_505_ ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 INV_SOC_DIR ( .A ( BUF_net_70 ) , .Y ( SOC_DIR_N ) ) ;
|
||||
.B ( IO_ISOL_N ) , .Y ( aps_rename_506_ ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 INV_SOC_DIR ( .A ( aps_rename_506_ ) ,
|
||||
.Y ( SOC_DIR_N ) ) ;
|
||||
sky130_fd_sc_hd__ebufn_4 IN_PROTECT_GATE ( .A ( SOC_IN ) ,
|
||||
.TE_B ( SOC_DIR_N ) , .Z ( FPGA_IN ) ) ;
|
||||
sky130_fd_sc_hd__ebufn_4 OUT_PROTECT_GATE ( .A ( FPGA_OUT ) ,
|
||||
.TE_B ( BUF_net_70 ) , .Z ( SOC_OUT ) ) ;
|
||||
sky130_fd_sc_hd__inv_4 BINV_R_70 ( .A ( BUF_net_72 ) , .Y ( BUF_net_70 ) ) ;
|
||||
sky130_fd_sc_hd__inv_8 BINV_R_71 ( .A ( BUF_net_72 ) , .Y ( SOC_DIR ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 BINV_R_72 ( .A ( aps_rename_505_ ) ,
|
||||
.Y ( BUF_net_72 ) ) ;
|
||||
.TE_B ( BUF_net_74 ) , .Z ( SOC_OUT ) ) ;
|
||||
sky130_fd_sc_hd__inv_8 BINV_R_73 ( .A ( BUF_net_76 ) , .Y ( SOC_DIR ) ) ;
|
||||
sky130_fd_sc_hd__inv_4 BINV_R_74 ( .A ( BUF_net_76 ) , .Y ( BUF_net_74 ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 BINV_R_76 ( .A ( aps_rename_506_ ) ,
|
||||
.Y ( BUF_net_76 ) ) ;
|
||||
endmodule
|
||||
|
||||
|
||||
|
|
@ -757,13 +752,17 @@ input FPGA_DIR ;
|
|||
input IO_ISOL_N ;
|
||||
|
||||
sky130_fd_sc_hd__nand2b_1 ISOL_EN_GATE ( .A_N ( FPGA_DIR ) ,
|
||||
.B ( IO_ISOL_N ) , .Y ( net_net_69 ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 INV_SOC_DIR ( .A ( SOC_DIR ) , .Y ( SOC_DIR_N ) ) ;
|
||||
.B ( IO_ISOL_N ) , .Y ( aps_rename_505_ ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 INV_SOC_DIR ( .A ( aps_rename_505_ ) ,
|
||||
.Y ( SOC_DIR_N ) ) ;
|
||||
sky130_fd_sc_hd__ebufn_4 IN_PROTECT_GATE ( .A ( SOC_IN ) ,
|
||||
.TE_B ( SOC_DIR_N ) , .Z ( FPGA_IN ) ) ;
|
||||
sky130_fd_sc_hd__ebufn_4 OUT_PROTECT_GATE ( .A ( FPGA_OUT ) ,
|
||||
.TE_B ( SOC_DIR ) , .Z ( SOC_OUT ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 BUFT_RR_69 ( .A ( net_net_69 ) , .X ( SOC_DIR ) ) ;
|
||||
.TE_B ( BUF_net_70 ) , .Z ( SOC_OUT ) ) ;
|
||||
sky130_fd_sc_hd__inv_8 BINV_R_69 ( .A ( BUF_net_72 ) , .Y ( SOC_DIR ) ) ;
|
||||
sky130_fd_sc_hd__inv_4 BINV_R_70 ( .A ( BUF_net_72 ) , .Y ( BUF_net_70 ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 BINV_R_72 ( .A ( aps_rename_505_ ) ,
|
||||
.Y ( BUF_net_72 ) ) ;
|
||||
endmodule
|
||||
|
||||
|
||||
|
|
@ -978,7 +977,7 @@ input [0:0] ccff_head ;
|
|||
output [0:0] ccff_tail ;
|
||||
output [0:3] mem_out ;
|
||||
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ccff_head[0] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ropt_net_136 ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[0] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_1_ ( .D ( mem_out[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[1] ) ) ;
|
||||
|
|
@ -987,6 +986,20 @@ sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_2_ ( .D ( mem_out[1] ) ,
|
|||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_3_ ( .D ( mem_out[2] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[3] ) ) ;
|
||||
sky130_fd_sc_hd__buf_1 FTB_1__0 ( .A ( mem_out[3] ) , .X ( ccff_tail[0] ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1339 ( .A ( ccff_head[0] ) ,
|
||||
.X ( copt_net_116 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1340 ( .A ( copt_net_116 ) ,
|
||||
.X ( copt_net_117 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1341 ( .A ( copt_net_117 ) ,
|
||||
.X ( copt_net_118 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1342 ( .A ( copt_net_118 ) ,
|
||||
.X ( copt_net_119 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1343 ( .A ( copt_net_119 ) ,
|
||||
.X ( copt_net_120 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1344 ( .A ( copt_net_120 ) ,
|
||||
.X ( copt_net_121 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 ropt_h_inst_1357 ( .A ( copt_net_121 ) ,
|
||||
.X ( ropt_net_136 ) ) ;
|
||||
endmodule
|
||||
|
||||
|
||||
|
|
@ -1147,6 +1160,8 @@ wire [0:0] sky130_fd_sc_hd__mux2_1_9_X ;
|
|||
|
||||
cbx_1__0__const1_6 const1_0_ (
|
||||
.const1 ( { SYNOPSYS_UNCONNECTED_1 } ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 sky130_fd_sc_hd__buf_4_0_ (
|
||||
.A ( sky130_fd_sc_hd__mux2_1_9_X[0] ) , .X ( out[0] ) ) ;
|
||||
sky130_fd_sc_hd__mux2_1 mux_l1_in_0_ ( .A0 ( in[1] ) , .A1 ( in[0] ) ,
|
||||
.S ( sram[0] ) , .X ( sky130_fd_sc_hd__mux2_1_0_X[0] ) ) ;
|
||||
sky130_fd_sc_hd__mux2_1 mux_l1_in_1_ ( .A0 ( in[3] ) , .A1 ( in[2] ) ,
|
||||
|
|
@ -1176,8 +1191,6 @@ sky130_fd_sc_hd__mux2_1 mux_l4_in_0_ (
|
|||
.A0 ( sky130_fd_sc_hd__mux2_1_8_X[0] ) ,
|
||||
.A1 ( sky130_fd_sc_hd__mux2_1_7_X[0] ) , .S ( sram[3] ) ,
|
||||
.X ( sky130_fd_sc_hd__mux2_1_9_X[0] ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 BUFT_RR_101 ( .A ( sky130_fd_sc_hd__mux2_1_9_X[0] ) ,
|
||||
.X ( out[0] ) ) ;
|
||||
endmodule
|
||||
|
||||
|
||||
|
|
@ -1239,9 +1252,9 @@ sky130_fd_sc_hd__mux2_1 mux_l4_in_0_ (
|
|||
.A0 ( sky130_fd_sc_hd__mux2_1_8_X[0] ) ,
|
||||
.A1 ( sky130_fd_sc_hd__mux2_1_7_X[0] ) , .S ( sram[3] ) ,
|
||||
.X ( sky130_fd_sc_hd__mux2_1_9_X[0] ) ) ;
|
||||
sky130_fd_sc_hd__inv_8 BINV_R_99 ( .A ( BUF_net_100 ) , .Y ( out[0] ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 BINV_R_100 ( .A ( sky130_fd_sc_hd__mux2_1_9_X[0] ) ,
|
||||
.Y ( BUF_net_100 ) ) ;
|
||||
sky130_fd_sc_hd__inv_8 BINV_R_100 ( .A ( BUF_net_101 ) , .Y ( out[0] ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 BINV_R_101 ( .A ( sky130_fd_sc_hd__mux2_1_9_X[0] ) ,
|
||||
.Y ( BUF_net_101 ) ) ;
|
||||
endmodule
|
||||
|
||||
|
||||
|
|
@ -1303,7 +1316,7 @@ sky130_fd_sc_hd__mux2_1 mux_l4_in_0_ (
|
|||
.A0 ( sky130_fd_sc_hd__mux2_1_8_X[0] ) ,
|
||||
.A1 ( sky130_fd_sc_hd__mux2_1_7_X[0] ) , .S ( sram[3] ) ,
|
||||
.X ( sky130_fd_sc_hd__mux2_1_9_X[0] ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 BUFT_RR_98 ( .A ( sky130_fd_sc_hd__mux2_1_9_X[0] ) ,
|
||||
sky130_fd_sc_hd__buf_6 BUFT_RR_99 ( .A ( sky130_fd_sc_hd__mux2_1_9_X[0] ) ,
|
||||
.X ( out[0] ) ) ;
|
||||
endmodule
|
||||
|
||||
|
|
@ -1366,9 +1379,9 @@ sky130_fd_sc_hd__mux2_1 mux_l4_in_0_ (
|
|||
.A0 ( sky130_fd_sc_hd__mux2_1_8_X[0] ) ,
|
||||
.A1 ( sky130_fd_sc_hd__mux2_1_7_X[0] ) , .S ( sram[3] ) ,
|
||||
.X ( sky130_fd_sc_hd__mux2_1_9_X[0] ) ) ;
|
||||
sky130_fd_sc_hd__inv_8 BINV_R_96 ( .A ( BUF_net_97 ) , .Y ( out[0] ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 BINV_R_97 ( .A ( sky130_fd_sc_hd__mux2_1_9_X[0] ) ,
|
||||
.Y ( BUF_net_97 ) ) ;
|
||||
sky130_fd_sc_hd__inv_8 BINV_R_97 ( .A ( BUF_net_98 ) , .Y ( out[0] ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 BINV_R_98 ( .A ( sky130_fd_sc_hd__mux2_1_9_X[0] ) ,
|
||||
.Y ( BUF_net_98 ) ) ;
|
||||
endmodule
|
||||
|
||||
|
||||
|
|
@ -1430,9 +1443,9 @@ sky130_fd_sc_hd__mux2_1 mux_l4_in_0_ (
|
|||
.A0 ( sky130_fd_sc_hd__mux2_1_8_X[0] ) ,
|
||||
.A1 ( sky130_fd_sc_hd__mux2_1_7_X[0] ) , .S ( sram[3] ) ,
|
||||
.X ( sky130_fd_sc_hd__mux2_1_9_X[0] ) ) ;
|
||||
sky130_fd_sc_hd__inv_8 BINV_R_94 ( .A ( BUF_net_95 ) , .Y ( out[0] ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 BINV_R_95 ( .A ( sky130_fd_sc_hd__mux2_1_9_X[0] ) ,
|
||||
.Y ( BUF_net_95 ) ) ;
|
||||
sky130_fd_sc_hd__inv_8 BINV_R_95 ( .A ( BUF_net_96 ) , .Y ( out[0] ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 BINV_R_96 ( .A ( sky130_fd_sc_hd__mux2_1_9_X[0] ) ,
|
||||
.Y ( BUF_net_96 ) ) ;
|
||||
endmodule
|
||||
|
||||
|
||||
|
|
@ -1494,9 +1507,8 @@ sky130_fd_sc_hd__mux2_1 mux_l4_in_0_ (
|
|||
.A0 ( sky130_fd_sc_hd__mux2_1_8_X[0] ) ,
|
||||
.A1 ( sky130_fd_sc_hd__mux2_1_7_X[0] ) , .S ( sram[3] ) ,
|
||||
.X ( sky130_fd_sc_hd__mux2_1_9_X[0] ) ) ;
|
||||
sky130_fd_sc_hd__inv_8 BINV_R_92 ( .A ( BUF_net_93 ) , .Y ( out[0] ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 BINV_R_93 ( .A ( sky130_fd_sc_hd__mux2_1_9_X[0] ) ,
|
||||
.Y ( BUF_net_93 ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 BUFT_RR_94 ( .A ( sky130_fd_sc_hd__mux2_1_9_X[0] ) ,
|
||||
.X ( out[0] ) ) ;
|
||||
endmodule
|
||||
|
||||
|
||||
|
|
@ -1558,7 +1570,7 @@ sky130_fd_sc_hd__mux2_1 mux_l4_in_0_ (
|
|||
.A0 ( sky130_fd_sc_hd__mux2_1_8_X[0] ) ,
|
||||
.A1 ( sky130_fd_sc_hd__mux2_1_7_X[0] ) , .S ( sram[3] ) ,
|
||||
.X ( sky130_fd_sc_hd__mux2_1_9_X[0] ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 BUFT_RR_91 ( .A ( sky130_fd_sc_hd__mux2_1_9_X[0] ) ,
|
||||
sky130_fd_sc_hd__buf_6 BUFT_RR_93 ( .A ( sky130_fd_sc_hd__mux2_1_9_X[0] ) ,
|
||||
.X ( out[0] ) ) ;
|
||||
endmodule
|
||||
|
||||
|
|
@ -1676,7 +1688,7 @@ cbx_1__0__mux_tree_tapbuf_size10_0 mux_top_ipin_0 (
|
|||
.sram ( mux_tree_tapbuf_size10_0_sram ) ,
|
||||
.sram_inv ( { SYNOPSYS_UNCONNECTED_1 , SYNOPSYS_UNCONNECTED_2 ,
|
||||
SYNOPSYS_UNCONNECTED_3 , SYNOPSYS_UNCONNECTED_4 } ) ,
|
||||
.out ( bottom_grid_pin_0_ ) , .p0 ( optlc_net_114 ) ) ;
|
||||
.out ( bottom_grid_pin_0_ ) , .p0 ( optlc_net_112 ) ) ;
|
||||
cbx_1__0__mux_tree_tapbuf_size10_1 mux_top_ipin_1 (
|
||||
.in ( { chanx_right_out[1] , chanx_left_out[1] , chanx_right_out[3] ,
|
||||
chanx_left_out[3] , chanx_right_out[5] , chanx_left_out[5] ,
|
||||
|
|
@ -1685,7 +1697,7 @@ cbx_1__0__mux_tree_tapbuf_size10_1 mux_top_ipin_1 (
|
|||
.sram ( mux_tree_tapbuf_size10_1_sram ) ,
|
||||
.sram_inv ( { SYNOPSYS_UNCONNECTED_5 , SYNOPSYS_UNCONNECTED_6 ,
|
||||
SYNOPSYS_UNCONNECTED_7 , SYNOPSYS_UNCONNECTED_8 } ) ,
|
||||
.out ( bottom_grid_pin_2_ ) , .p0 ( optlc_net_114 ) ) ;
|
||||
.out ( bottom_grid_pin_2_ ) , .p0 ( optlc_net_112 ) ) ;
|
||||
cbx_1__0__mux_tree_tapbuf_size10_2 mux_top_ipin_2 (
|
||||
.in ( { chanx_right_out[0] , chanx_left_out[0] , chanx_right_out[2] ,
|
||||
chanx_left_out[2] , chanx_right_out[6] , chanx_left_out[6] ,
|
||||
|
|
@ -1694,7 +1706,7 @@ cbx_1__0__mux_tree_tapbuf_size10_2 mux_top_ipin_2 (
|
|||
.sram ( mux_tree_tapbuf_size10_2_sram ) ,
|
||||
.sram_inv ( { SYNOPSYS_UNCONNECTED_9 , SYNOPSYS_UNCONNECTED_10 ,
|
||||
SYNOPSYS_UNCONNECTED_11 , SYNOPSYS_UNCONNECTED_12 } ) ,
|
||||
.out ( bottom_grid_pin_4_ ) , .p0 ( optlc_net_115 ) ) ;
|
||||
.out ( bottom_grid_pin_4_ ) , .p0 ( optlc_net_113 ) ) ;
|
||||
cbx_1__0__mux_tree_tapbuf_size10_3 mux_top_ipin_3 (
|
||||
.in ( { chanx_right_out[1] , chanx_left_out[1] , chanx_right_out[3] ,
|
||||
chanx_left_out[3] , chanx_right_out[7] , chanx_left_out[7] ,
|
||||
|
|
@ -1703,7 +1715,7 @@ cbx_1__0__mux_tree_tapbuf_size10_3 mux_top_ipin_3 (
|
|||
.sram ( mux_tree_tapbuf_size10_3_sram ) ,
|
||||
.sram_inv ( { SYNOPSYS_UNCONNECTED_13 , SYNOPSYS_UNCONNECTED_14 ,
|
||||
SYNOPSYS_UNCONNECTED_15 , SYNOPSYS_UNCONNECTED_16 } ) ,
|
||||
.out ( bottom_grid_pin_6_ ) , .p0 ( optlc_net_115 ) ) ;
|
||||
.out ( bottom_grid_pin_6_ ) , .p0 ( optlc_net_114 ) ) ;
|
||||
cbx_1__0__mux_tree_tapbuf_size10_4 mux_top_ipin_4 (
|
||||
.in ( { chanx_right_out[0] , chanx_left_out[0] , chanx_right_out[2] ,
|
||||
chanx_left_out[2] , chanx_right_out[4] , chanx_left_out[4] ,
|
||||
|
|
@ -1712,7 +1724,7 @@ cbx_1__0__mux_tree_tapbuf_size10_4 mux_top_ipin_4 (
|
|||
.sram ( mux_tree_tapbuf_size10_4_sram ) ,
|
||||
.sram_inv ( { SYNOPSYS_UNCONNECTED_17 , SYNOPSYS_UNCONNECTED_18 ,
|
||||
SYNOPSYS_UNCONNECTED_19 , SYNOPSYS_UNCONNECTED_20 } ) ,
|
||||
.out ( bottom_grid_pin_8_ ) , .p0 ( optlc_net_116 ) ) ;
|
||||
.out ( bottom_grid_pin_8_ ) , .p0 ( optlc_net_114 ) ) ;
|
||||
cbx_1__0__mux_tree_tapbuf_size10_5 mux_top_ipin_5 (
|
||||
.in ( { chanx_right_out[1] , chanx_left_out[1] , chanx_right_out[3] ,
|
||||
chanx_left_out[3] , chanx_right_out[5] , chanx_left_out[5] ,
|
||||
|
|
@ -1721,7 +1733,7 @@ cbx_1__0__mux_tree_tapbuf_size10_5 mux_top_ipin_5 (
|
|||
.sram ( mux_tree_tapbuf_size10_5_sram ) ,
|
||||
.sram_inv ( { SYNOPSYS_UNCONNECTED_21 , SYNOPSYS_UNCONNECTED_22 ,
|
||||
SYNOPSYS_UNCONNECTED_23 , SYNOPSYS_UNCONNECTED_24 } ) ,
|
||||
.out ( bottom_grid_pin_10_ ) , .p0 ( optlc_net_116 ) ) ;
|
||||
.out ( bottom_grid_pin_10_ ) , .p0 ( optlc_net_114 ) ) ;
|
||||
cbx_1__0__mux_tree_tapbuf_size10_6 mux_top_ipin_6 (
|
||||
.in ( { chanx_right_out[0] , chanx_left_out[0] , chanx_right_out[2] ,
|
||||
chanx_left_out[2] , chanx_right_out[6] , chanx_left_out[6] ,
|
||||
|
|
@ -1730,7 +1742,7 @@ cbx_1__0__mux_tree_tapbuf_size10_6 mux_top_ipin_6 (
|
|||
.sram ( mux_tree_tapbuf_size10_6_sram ) ,
|
||||
.sram_inv ( { SYNOPSYS_UNCONNECTED_25 , SYNOPSYS_UNCONNECTED_26 ,
|
||||
SYNOPSYS_UNCONNECTED_27 , SYNOPSYS_UNCONNECTED_28 } ) ,
|
||||
.out ( bottom_grid_pin_12_ ) , .p0 ( optlc_net_114 ) ) ;
|
||||
.out ( bottom_grid_pin_12_ ) , .p0 ( optlc_net_112 ) ) ;
|
||||
cbx_1__0__mux_tree_tapbuf_size10_7 mux_top_ipin_7 (
|
||||
.in ( { chanx_right_out[1] , chanx_left_out[1] , chanx_right_out[3] ,
|
||||
chanx_left_out[3] , chanx_right_out[7] , chanx_left_out[7] ,
|
||||
|
|
@ -1739,7 +1751,7 @@ cbx_1__0__mux_tree_tapbuf_size10_7 mux_top_ipin_7 (
|
|||
.sram ( mux_tree_tapbuf_size10_7_sram ) ,
|
||||
.sram_inv ( { SYNOPSYS_UNCONNECTED_29 , SYNOPSYS_UNCONNECTED_30 ,
|
||||
SYNOPSYS_UNCONNECTED_31 , SYNOPSYS_UNCONNECTED_32 } ) ,
|
||||
.out ( bottom_grid_pin_14_ ) , .p0 ( optlc_net_114 ) ) ;
|
||||
.out ( bottom_grid_pin_14_ ) , .p0 ( optlc_net_112 ) ) ;
|
||||
cbx_1__0__mux_tree_tapbuf_size10 mux_top_ipin_8 (
|
||||
.in ( { chanx_right_out[0] , chanx_left_out[0] , chanx_right_out[2] ,
|
||||
chanx_left_out[2] , chanx_right_out[8] , chanx_left_out[8] ,
|
||||
|
|
@ -1748,7 +1760,7 @@ cbx_1__0__mux_tree_tapbuf_size10 mux_top_ipin_8 (
|
|||
.sram ( mux_tree_tapbuf_size10_8_sram ) ,
|
||||
.sram_inv ( { SYNOPSYS_UNCONNECTED_33 , SYNOPSYS_UNCONNECTED_34 ,
|
||||
SYNOPSYS_UNCONNECTED_35 , SYNOPSYS_UNCONNECTED_36 } ) ,
|
||||
.out ( bottom_grid_pin_16_ ) , .p0 ( optlc_net_115 ) ) ;
|
||||
.out ( bottom_grid_pin_16_ ) , .p0 ( optlc_net_113 ) ) ;
|
||||
cbx_1__0__mux_tree_tapbuf_size10_mem_0 mem_top_ipin_0 (
|
||||
.prog_clk ( prog_clk ) , .ccff_head ( ccff_head ) ,
|
||||
.ccff_tail ( mux_tree_tapbuf_size10_mem_0_ccff_tail ) ,
|
||||
|
|
@ -1814,12 +1826,12 @@ cbx_1__0__logical_tile_io_mode_io__2 logical_tile_io_mode_io__2 (
|
|||
.IO_ISOL_N ( IO_ISOL_N ) , .prog_clk ( prog_clk ) ,
|
||||
.gfpga_pad_EMBEDDED_IO_HD_SOC_IN ( gfpga_pad_EMBEDDED_IO_HD_SOC_IN[2] ) ,
|
||||
.gfpga_pad_EMBEDDED_IO_HD_SOC_OUT ( gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[2] ) ,
|
||||
.gfpga_pad_EMBEDDED_IO_HD_SOC_DIR ( { aps_rename_512_ } ) ,
|
||||
.gfpga_pad_EMBEDDED_IO_HD_SOC_DIR ( { aps_rename_511_ } ) ,
|
||||
.io_outpad ( top_width_0_height_0__pin_4_ ) ,
|
||||
.ccff_head ( logical_tile_io_mode_io__1_ccff_tail ) ,
|
||||
.io_inpad ( top_width_0_height_0__pin_5_lower ) ,
|
||||
.ccff_tail ( logical_tile_io_mode_io__2_ccff_tail ) ,
|
||||
.ZBUF_184_0 ( gfpga_pad_EMBEDDED_IO_HD_SOC_DIR[2] ) ) ;
|
||||
.ZBUF_211_0 ( gfpga_pad_EMBEDDED_IO_HD_SOC_DIR[2] ) ) ;
|
||||
cbx_1__0__logical_tile_io_mode_io__3 logical_tile_io_mode_io__3 (
|
||||
.IO_ISOL_N ( IO_ISOL_N ) , .prog_clk ( prog_clk ) ,
|
||||
.gfpga_pad_EMBEDDED_IO_HD_SOC_IN ( gfpga_pad_EMBEDDED_IO_HD_SOC_IN[3] ) ,
|
||||
|
|
@ -1874,10 +1886,10 @@ cbx_1__0__logical_tile_io_mode_io_ logical_tile_io_mode_io__8 (
|
|||
.ccff_head ( logical_tile_io_mode_io__7_ccff_tail ) ,
|
||||
.io_inpad ( top_width_0_height_0__pin_17_lower ) ,
|
||||
.ccff_tail ( ccff_tail ) ) ;
|
||||
sky130_fd_sc_hd__buf_16 prog_clk_0_FTB00 ( .A ( prog_clk_0_N_in ) ,
|
||||
sky130_fd_sc_hd__buf_1 prog_clk_0_FTB00 ( .A ( prog_clk_0_N_in ) ,
|
||||
.X ( prog_clk[0] ) ) ;
|
||||
sky130_fd_sc_hd__clkbuf_1 prog_clk_0_W_FTB01 ( .A ( prog_clk_0_N_in ) ,
|
||||
.X ( ctsbuf_net_1117 ) ) ;
|
||||
.X ( ctsbuf_net_1115 ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 FTB_19__18 ( .A ( chanx_left_in[0] ) ,
|
||||
.X ( chanx_right_out[0] ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 FTB_20__19 ( .A ( chanx_left_in[1] ) ,
|
||||
|
|
@ -1987,15 +1999,15 @@ sky130_fd_sc_hd__buf_6 FTB_67__66 (
|
|||
.X ( top_width_0_height_0__pin_17_upper[0] ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 FTB_68__67 ( .A ( SC_IN_TOP ) , .X ( SC_OUT_BOT ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 FTB_69__68 ( .A ( SC_IN_BOT ) , .X ( SC_OUT_TOP ) ) ;
|
||||
sky130_fd_sc_hd__conb_1 optlc_116 ( .LO ( SYNOPSYS_UNCONNECTED_37 ) ,
|
||||
sky130_fd_sc_hd__conb_1 optlc_114 ( .LO ( SYNOPSYS_UNCONNECTED_37 ) ,
|
||||
.HI ( optlc_net_112 ) ) ;
|
||||
sky130_fd_sc_hd__conb_1 optlc_116 ( .LO ( SYNOPSYS_UNCONNECTED_38 ) ,
|
||||
.HI ( optlc_net_113 ) ) ;
|
||||
sky130_fd_sc_hd__conb_1 optlc_118 ( .LO ( SYNOPSYS_UNCONNECTED_39 ) ,
|
||||
.HI ( optlc_net_114 ) ) ;
|
||||
sky130_fd_sc_hd__conb_1 optlc_118 ( .LO ( SYNOPSYS_UNCONNECTED_38 ) ,
|
||||
.HI ( optlc_net_115 ) ) ;
|
||||
sky130_fd_sc_hd__conb_1 optlc_120 ( .LO ( SYNOPSYS_UNCONNECTED_39 ) ,
|
||||
.HI ( optlc_net_116 ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 ZBUF_184_inst_121 ( .A ( aps_rename_512_ ) ,
|
||||
sky130_fd_sc_hd__buf_6 ZBUF_211_inst_119 ( .A ( aps_rename_511_ ) ,
|
||||
.X ( gfpga_pad_EMBEDDED_IO_HD_SOC_DIR[2] ) ) ;
|
||||
sky130_fd_sc_hd__clkbuf_8 cts_buf_3521248 ( .A ( ctsbuf_net_1117 ) ,
|
||||
sky130_fd_sc_hd__clkbuf_8 cts_buf_3521246 ( .A ( ctsbuf_net_1115 ) ,
|
||||
.X ( prog_clk_0_W_out ) ) ;
|
||||
endmodule
|
||||
|
||||
|
|
|
|||
|
|
@ -13,27 +13,25 @@ output [0:0] mem_out ;
|
|||
input VDD ;
|
||||
input VSS ;
|
||||
|
||||
wire copt_net_124 ;
|
||||
wire copt_net_122 ;
|
||||
supply1 VDD ;
|
||||
supply0 VSS ;
|
||||
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ccff_head[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( copt_net_124 ) , .VPWR ( VDD ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( copt_net_122 ) , .VPWR ( VDD ) ,
|
||||
.VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 FTB_18__17 ( .A ( mem_out[0] ) , .X ( ccff_tail[0] ) ,
|
||||
.VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1351 ( .A ( copt_net_119 ) ,
|
||||
.X ( copt_net_118 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1352 ( .A ( copt_net_124 ) ,
|
||||
.X ( copt_net_119 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1353 ( .A ( copt_net_118 ) ,
|
||||
.X ( copt_net_120 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1354 ( .A ( copt_net_122 ) ,
|
||||
sky130_fd_sc_hd__dlygate4sd1_1 copt_h_inst_1346 ( .A ( copt_net_124 ) ,
|
||||
.X ( mem_out[0] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1355 ( .A ( copt_net_123 ) ,
|
||||
.X ( copt_net_122 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1356 ( .A ( copt_net_120 ) ,
|
||||
.X ( copt_net_123 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1347 ( .A ( copt_net_125 ) ,
|
||||
.X ( copt_net_124 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1348 ( .A ( copt_net_126 ) ,
|
||||
.X ( copt_net_125 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1349 ( .A ( copt_net_127 ) ,
|
||||
.X ( copt_net_126 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1350 ( .A ( copt_net_122 ) ,
|
||||
.X ( copt_net_127 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
endmodule
|
||||
|
||||
|
||||
|
|
@ -53,19 +51,19 @@ supply1 VDD ;
|
|||
supply0 VSS ;
|
||||
|
||||
sky130_fd_sc_hd__nand2b_1 ISOL_EN_GATE ( .A_N ( FPGA_DIR ) ,
|
||||
.B ( IO_ISOL_N ) , .Y ( aps_rename_511_ ) , .VPWR ( VDD ) ,
|
||||
.B ( IO_ISOL_N ) , .Y ( aps_rename_510_ ) , .VPWR ( VDD ) ,
|
||||
.VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 INV_SOC_DIR ( .A ( aps_rename_511_ ) ,
|
||||
sky130_fd_sc_hd__inv_1 INV_SOC_DIR ( .A ( aps_rename_510_ ) ,
|
||||
.Y ( SOC_DIR_N ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__ebufn_4 IN_PROTECT_GATE ( .A ( SOC_IN ) ,
|
||||
.TE_B ( SOC_DIR_N ) , .Z ( FPGA_IN ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__ebufn_4 OUT_PROTECT_GATE ( .A ( FPGA_OUT ) ,
|
||||
.TE_B ( BUF_net_88 ) , .Z ( SOC_OUT ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__inv_4 BINV_R_88 ( .A ( BUF_net_90 ) , .Y ( BUF_net_88 ) ,
|
||||
.TE_B ( BUF_net_90 ) , .Z ( SOC_OUT ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__inv_4 BINV_R_90 ( .A ( BUF_net_92 ) , .Y ( BUF_net_90 ) ,
|
||||
.VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 BINV_R_90 ( .A ( aps_rename_511_ ) ,
|
||||
.Y ( BUF_net_90 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__inv_6 BINV_R_112 ( .A ( BUF_net_90 ) , .Y ( SOC_DIR ) ,
|
||||
sky130_fd_sc_hd__inv_1 BINV_R_92 ( .A ( aps_rename_510_ ) ,
|
||||
.Y ( BUF_net_92 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__inv_6 BINV_R_110 ( .A ( BUF_net_92 ) , .Y ( SOC_DIR ) ,
|
||||
.VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
endmodule
|
||||
|
||||
|
|
@ -169,19 +167,14 @@ supply1 VDD ;
|
|||
supply0 VSS ;
|
||||
|
||||
sky130_fd_sc_hd__nand2b_1 ISOL_EN_GATE ( .A_N ( FPGA_DIR ) ,
|
||||
.B ( IO_ISOL_N ) , .Y ( aps_rename_510_ ) , .VPWR ( VDD ) ,
|
||||
.VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 INV_SOC_DIR ( .A ( BUF_net_85 ) , .Y ( SOC_DIR_N ) ,
|
||||
.B ( IO_ISOL_N ) , .Y ( net_net_89 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 INV_SOC_DIR ( .A ( SOC_DIR ) , .Y ( SOC_DIR_N ) ,
|
||||
.VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__ebufn_4 IN_PROTECT_GATE ( .A ( SOC_IN ) ,
|
||||
.TE_B ( SOC_DIR_N ) , .Z ( FPGA_IN ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__ebufn_4 OUT_PROTECT_GATE ( .A ( FPGA_OUT ) ,
|
||||
.TE_B ( BUF_net_85 ) , .Z ( SOC_OUT ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__inv_4 BINV_R_85 ( .A ( BUF_net_87 ) , .Y ( BUF_net_85 ) ,
|
||||
.VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 BINV_R_87 ( .A ( aps_rename_510_ ) ,
|
||||
.Y ( BUF_net_87 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__inv_6 BINV_R_108 ( .A ( BUF_net_87 ) , .Y ( SOC_DIR ) ,
|
||||
.TE_B ( SOC_DIR ) , .Z ( SOC_OUT ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 BUFT_RR_89 ( .A ( net_net_89 ) , .X ( SOC_DIR ) ,
|
||||
.VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
endmodule
|
||||
|
||||
|
|
@ -287,17 +280,19 @@ supply0 VSS ;
|
|||
sky130_fd_sc_hd__nand2b_1 ISOL_EN_GATE ( .A_N ( FPGA_DIR ) ,
|
||||
.B ( IO_ISOL_N ) , .Y ( aps_rename_509_ ) , .VPWR ( VDD ) ,
|
||||
.VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 INV_SOC_DIR ( .A ( BUF_net_82 ) , .Y ( SOC_DIR_N ) ,
|
||||
sky130_fd_sc_hd__inv_1 INV_SOC_DIR ( .A ( BUF_net_87 ) , .Y ( SOC_DIR_N ) ,
|
||||
.VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__ebufn_4 IN_PROTECT_GATE ( .A ( SOC_IN ) ,
|
||||
.TE_B ( SOC_DIR_N ) , .Z ( FPGA_IN ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__ebufn_4 OUT_PROTECT_GATE ( .A ( FPGA_OUT ) ,
|
||||
.TE_B ( BUF_net_82 ) , .Z ( SOC_OUT ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__inv_4 BINV_R_82 ( .A ( BUF_net_84 ) , .Y ( BUF_net_82 ) ,
|
||||
.TE_B ( BUF_net_86 ) , .Z ( SOC_OUT ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__inv_4 BINV_R_86 ( .A ( BUF_net_88 ) , .Y ( BUF_net_86 ) ,
|
||||
.VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 BINV_R_84 ( .A ( aps_rename_509_ ) ,
|
||||
.Y ( BUF_net_84 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__inv_6 BINV_R_106 ( .A ( BUF_net_84 ) , .Y ( SOC_DIR ) ,
|
||||
sky130_fd_sc_hd__inv_1 BINV_R_87 ( .A ( BUF_net_88 ) , .Y ( BUF_net_87 ) ,
|
||||
.VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 BINV_R_88 ( .A ( aps_rename_509_ ) ,
|
||||
.Y ( BUF_net_88 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__inv_6 BINV_R_108 ( .A ( BUF_net_88 ) , .Y ( SOC_DIR ) ,
|
||||
.VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
endmodule
|
||||
|
||||
|
|
@ -403,18 +398,16 @@ supply0 VSS ;
|
|||
sky130_fd_sc_hd__nand2b_1 ISOL_EN_GATE ( .A_N ( FPGA_DIR ) ,
|
||||
.B ( IO_ISOL_N ) , .Y ( aps_rename_508_ ) , .VPWR ( VDD ) ,
|
||||
.VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 INV_SOC_DIR ( .A ( aps_rename_508_ ) ,
|
||||
.Y ( SOC_DIR_N ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__ebufn_4 IN_PROTECT_GATE ( .A ( SOC_IN ) ,
|
||||
.TE_B ( SOC_DIR_N ) , .Z ( FPGA_IN ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
.TE_B ( BUF_net_84 ) , .Z ( FPGA_IN ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__ebufn_4 OUT_PROTECT_GATE ( .A ( FPGA_OUT ) ,
|
||||
.TE_B ( BUF_net_79 ) , .Z ( SOC_OUT ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__inv_4 BINV_R_79 ( .A ( BUF_net_81 ) , .Y ( BUF_net_79 ) ,
|
||||
.TE_B ( BUF_net_81 ) , .Z ( SOC_OUT ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__inv_4 BINV_R_81 ( .A ( BUF_net_84 ) , .Y ( BUF_net_81 ) ,
|
||||
.VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 BINV_R_81 ( .A ( aps_rename_508_ ) ,
|
||||
.Y ( BUF_net_81 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__inv_6 BINV_R_110 ( .A ( BUF_net_81 ) , .Y ( SOC_DIR ) ,
|
||||
sky130_fd_sc_hd__inv_8 BINV_R_83 ( .A ( BUF_net_84 ) , .Y ( SOC_DIR ) ,
|
||||
.VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 BINV_R_84 ( .A ( aps_rename_508_ ) ,
|
||||
.Y ( BUF_net_84 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
endmodule
|
||||
|
||||
|
||||
|
|
@ -517,20 +510,15 @@ supply1 VDD ;
|
|||
supply0 VSS ;
|
||||
|
||||
sky130_fd_sc_hd__nand2b_1 ISOL_EN_GATE ( .A_N ( FPGA_DIR ) ,
|
||||
.B ( IO_ISOL_N ) , .Y ( aps_rename_507_ ) , .VPWR ( VDD ) ,
|
||||
.VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 INV_SOC_DIR ( .A ( BUF_net_76 ) , .Y ( SOC_DIR_N ) ,
|
||||
.B ( IO_ISOL_N ) , .Y ( net_net_80 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 INV_SOC_DIR ( .A ( SOC_DIR ) , .Y ( SOC_DIR_N ) ,
|
||||
.VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__ebufn_4 IN_PROTECT_GATE ( .A ( SOC_IN ) ,
|
||||
.TE_B ( SOC_DIR_N ) , .Z ( FPGA_IN ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__ebufn_4 OUT_PROTECT_GATE ( .A ( FPGA_OUT ) ,
|
||||
.TE_B ( BUF_net_76 ) , .Z ( SOC_OUT ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__inv_4 BINV_R_76 ( .A ( BUF_net_78 ) , .Y ( BUF_net_76 ) ,
|
||||
.TE_B ( SOC_DIR ) , .Z ( SOC_OUT ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 BUFT_RR_80 ( .A ( net_net_80 ) , .X ( SOC_DIR ) ,
|
||||
.VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__inv_8 BINV_R_77 ( .A ( BUF_net_78 ) , .Y ( SOC_DIR ) ,
|
||||
.VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 BINV_R_78 ( .A ( aps_rename_507_ ) ,
|
||||
.Y ( BUF_net_78 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
endmodule
|
||||
|
||||
|
||||
|
|
@ -633,20 +621,24 @@ supply1 VDD ;
|
|||
supply0 VSS ;
|
||||
|
||||
sky130_fd_sc_hd__nand2b_1 ISOL_EN_GATE ( .A_N ( FPGA_DIR ) ,
|
||||
.B ( IO_ISOL_N ) , .Y ( aps_rename_506_ ) , .VPWR ( VDD ) ,
|
||||
.B ( IO_ISOL_N ) , .Y ( aps_rename_507_ ) , .VPWR ( VDD ) ,
|
||||
.VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 INV_SOC_DIR ( .A ( BUF_net_73 ) , .Y ( SOC_DIR_N ) ,
|
||||
.VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 INV_SOC_DIR ( .A ( aps_rename_507_ ) ,
|
||||
.Y ( SOC_DIR_N ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__ebufn_4 IN_PROTECT_GATE ( .A ( SOC_IN ) ,
|
||||
.TE_B ( SOC_DIR_N ) , .Z ( FPGA_IN ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__ebufn_4 OUT_PROTECT_GATE ( .A ( FPGA_OUT ) ,
|
||||
.TE_B ( BUF_net_73 ) , .Z ( SOC_OUT ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__inv_4 BINV_R_73 ( .A ( BUF_net_75 ) , .Y ( BUF_net_73 ) ,
|
||||
.TE_B ( BUF_net_77 ) , .Z ( SOC_OUT ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__inv_4 BINV_R_77 ( .A ( BUF_net_79 ) , .Y ( BUF_net_77 ) ,
|
||||
.VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__inv_8 BINV_R_74 ( .A ( BUF_net_75 ) , .Y ( SOC_DIR ) ,
|
||||
sky130_fd_sc_hd__inv_1 BINV_R_78 ( .A ( BUF_net_79 ) , .Y ( BUF_net_78 ) ,
|
||||
.VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 BINV_R_79 ( .A ( aps_rename_507_ ) ,
|
||||
.Y ( BUF_net_79 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__inv_8 BINV_R_106 ( .A ( BUF_net_107 ) , .Y ( SOC_DIR ) ,
|
||||
.VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 BINV_R_107 ( .A ( BUF_net_78 ) , .Y ( BUF_net_107 ) ,
|
||||
.VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 BINV_R_75 ( .A ( aps_rename_506_ ) ,
|
||||
.Y ( BUF_net_75 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
endmodule
|
||||
|
||||
|
||||
|
|
@ -734,7 +726,7 @@ endmodule
|
|||
|
||||
|
||||
module cbx_1__0__EMBEDDED_IO_HD_2 ( SOC_IN , SOC_OUT , SOC_DIR , FPGA_IN ,
|
||||
FPGA_OUT , FPGA_DIR , IO_ISOL_N , VDD , VSS , ZBUF_184_0 ) ;
|
||||
FPGA_OUT , FPGA_DIR , IO_ISOL_N , VDD , VSS , ZBUF_211_0 ) ;
|
||||
input SOC_IN ;
|
||||
output SOC_OUT ;
|
||||
output SOC_DIR ;
|
||||
|
|
@ -744,19 +736,19 @@ input FPGA_DIR ;
|
|||
input IO_ISOL_N ;
|
||||
input VDD ;
|
||||
input VSS ;
|
||||
input ZBUF_184_0 ;
|
||||
input ZBUF_211_0 ;
|
||||
|
||||
supply1 VDD ;
|
||||
supply0 VSS ;
|
||||
|
||||
sky130_fd_sc_hd__nand2b_1 ISOL_EN_GATE ( .A_N ( FPGA_DIR ) ,
|
||||
.B ( IO_ISOL_N ) , .Y ( SOC_DIR ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 INV_SOC_DIR ( .A ( SOC_DIR ) , .Y ( SOC_DIR_N ) ,
|
||||
sky130_fd_sc_hd__inv_1 INV_SOC_DIR ( .A ( ZBUF_211_0 ) , .Y ( SOC_DIR_N ) ,
|
||||
.VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__ebufn_4 IN_PROTECT_GATE ( .A ( SOC_IN ) ,
|
||||
.TE_B ( SOC_DIR_N ) , .Z ( FPGA_IN ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__ebufn_4 OUT_PROTECT_GATE ( .A ( FPGA_OUT ) ,
|
||||
.TE_B ( ZBUF_184_0 ) , .Z ( SOC_OUT ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
.TE_B ( ZBUF_211_0 ) , .Z ( SOC_OUT ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
endmodule
|
||||
|
||||
|
||||
|
|
@ -764,7 +756,7 @@ module cbx_1__0__logical_tile_io_mode_physical__iopad_2 ( IO_ISOL_N ,
|
|||
prog_clk , gfpga_pad_EMBEDDED_IO_HD_SOC_IN ,
|
||||
gfpga_pad_EMBEDDED_IO_HD_SOC_OUT , gfpga_pad_EMBEDDED_IO_HD_SOC_DIR ,
|
||||
iopad_outpad , ccff_head , iopad_inpad , ccff_tail , VDD , VSS ,
|
||||
ZBUF_184_0 ) ;
|
||||
ZBUF_211_0 ) ;
|
||||
input [0:0] IO_ISOL_N ;
|
||||
input [0:0] prog_clk ;
|
||||
input [0:0] gfpga_pad_EMBEDDED_IO_HD_SOC_IN ;
|
||||
|
|
@ -776,7 +768,7 @@ output [0:0] iopad_inpad ;
|
|||
output [0:0] ccff_tail ;
|
||||
input VDD ;
|
||||
input VSS ;
|
||||
input ZBUF_184_0 ;
|
||||
input ZBUF_211_0 ;
|
||||
|
||||
wire [0:0] EMBEDDED_IO_HD_0_en ;
|
||||
supply1 VDD ;
|
||||
|
|
@ -788,7 +780,7 @@ cbx_1__0__EMBEDDED_IO_HD_2 EMBEDDED_IO_HD_0_ (
|
|||
.SOC_DIR ( gfpga_pad_EMBEDDED_IO_HD_SOC_DIR[0] ) ,
|
||||
.FPGA_IN ( iopad_inpad[0] ) , .FPGA_OUT ( iopad_outpad[0] ) ,
|
||||
.FPGA_DIR ( EMBEDDED_IO_HD_0_en[0] ) , .IO_ISOL_N ( IO_ISOL_N[0] ) ,
|
||||
.VDD ( VDD ) , .VSS ( VSS ) , .ZBUF_184_0 ( ZBUF_184_0 ) ) ;
|
||||
.VDD ( VDD ) , .VSS ( VSS ) , .ZBUF_211_0 ( ZBUF_211_0 ) ) ;
|
||||
cbx_1__0__EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem_2 EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem (
|
||||
.prog_clk ( prog_clk ) , .ccff_head ( ccff_head ) ,
|
||||
.ccff_tail ( ccff_tail ) , .mem_out ( EMBEDDED_IO_HD_0_en ) ,
|
||||
|
|
@ -799,7 +791,7 @@ endmodule
|
|||
module cbx_1__0__logical_tile_io_mode_io__2 ( IO_ISOL_N , prog_clk ,
|
||||
gfpga_pad_EMBEDDED_IO_HD_SOC_IN , gfpga_pad_EMBEDDED_IO_HD_SOC_OUT ,
|
||||
gfpga_pad_EMBEDDED_IO_HD_SOC_DIR , io_outpad , ccff_head , io_inpad ,
|
||||
ccff_tail , VDD , VSS , ZBUF_184_0 ) ;
|
||||
ccff_tail , VDD , VSS , ZBUF_211_0 ) ;
|
||||
input [0:0] IO_ISOL_N ;
|
||||
input [0:0] prog_clk ;
|
||||
input [0:0] gfpga_pad_EMBEDDED_IO_HD_SOC_IN ;
|
||||
|
|
@ -811,7 +803,7 @@ output [0:0] io_inpad ;
|
|||
output [0:0] ccff_tail ;
|
||||
input VDD ;
|
||||
input VSS ;
|
||||
input ZBUF_184_0 ;
|
||||
input ZBUF_211_0 ;
|
||||
|
||||
supply1 VDD ;
|
||||
supply0 VSS ;
|
||||
|
|
@ -823,7 +815,7 @@ cbx_1__0__logical_tile_io_mode_physical__iopad_2 logical_tile_io_mode_physical__
|
|||
.gfpga_pad_EMBEDDED_IO_HD_SOC_DIR ( gfpga_pad_EMBEDDED_IO_HD_SOC_DIR ) ,
|
||||
.iopad_outpad ( io_outpad ) , .ccff_head ( ccff_head ) ,
|
||||
.iopad_inpad ( io_inpad ) , .ccff_tail ( ccff_tail ) , .VDD ( VDD ) ,
|
||||
.VSS ( VSS ) , .ZBUF_184_0 ( ZBUF_184_0 ) ) ;
|
||||
.VSS ( VSS ) , .ZBUF_211_0 ( ZBUF_211_0 ) ) ;
|
||||
endmodule
|
||||
|
||||
|
||||
|
|
@ -862,20 +854,20 @@ supply1 VDD ;
|
|||
supply0 VSS ;
|
||||
|
||||
sky130_fd_sc_hd__nand2b_1 ISOL_EN_GATE ( .A_N ( FPGA_DIR ) ,
|
||||
.B ( IO_ISOL_N ) , .Y ( aps_rename_505_ ) , .VPWR ( VDD ) ,
|
||||
.B ( IO_ISOL_N ) , .Y ( aps_rename_506_ ) , .VPWR ( VDD ) ,
|
||||
.VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 INV_SOC_DIR ( .A ( BUF_net_70 ) , .Y ( SOC_DIR_N ) ,
|
||||
.VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 INV_SOC_DIR ( .A ( aps_rename_506_ ) ,
|
||||
.Y ( SOC_DIR_N ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__ebufn_4 IN_PROTECT_GATE ( .A ( SOC_IN ) ,
|
||||
.TE_B ( SOC_DIR_N ) , .Z ( FPGA_IN ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__ebufn_4 OUT_PROTECT_GATE ( .A ( FPGA_OUT ) ,
|
||||
.TE_B ( BUF_net_70 ) , .Z ( SOC_OUT ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__inv_4 BINV_R_70 ( .A ( BUF_net_72 ) , .Y ( BUF_net_70 ) ,
|
||||
.TE_B ( BUF_net_74 ) , .Z ( SOC_OUT ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__inv_8 BINV_R_73 ( .A ( BUF_net_76 ) , .Y ( SOC_DIR ) ,
|
||||
.VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__inv_8 BINV_R_71 ( .A ( BUF_net_72 ) , .Y ( SOC_DIR ) ,
|
||||
sky130_fd_sc_hd__inv_4 BINV_R_74 ( .A ( BUF_net_76 ) , .Y ( BUF_net_74 ) ,
|
||||
.VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 BINV_R_72 ( .A ( aps_rename_505_ ) ,
|
||||
.Y ( BUF_net_72 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 BINV_R_76 ( .A ( aps_rename_506_ ) ,
|
||||
.Y ( BUF_net_76 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
endmodule
|
||||
|
||||
|
||||
|
|
@ -978,15 +970,20 @@ supply1 VDD ;
|
|||
supply0 VSS ;
|
||||
|
||||
sky130_fd_sc_hd__nand2b_1 ISOL_EN_GATE ( .A_N ( FPGA_DIR ) ,
|
||||
.B ( IO_ISOL_N ) , .Y ( net_net_69 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 INV_SOC_DIR ( .A ( SOC_DIR ) , .Y ( SOC_DIR_N ) ,
|
||||
.VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
.B ( IO_ISOL_N ) , .Y ( aps_rename_505_ ) , .VPWR ( VDD ) ,
|
||||
.VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 INV_SOC_DIR ( .A ( aps_rename_505_ ) ,
|
||||
.Y ( SOC_DIR_N ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__ebufn_4 IN_PROTECT_GATE ( .A ( SOC_IN ) ,
|
||||
.TE_B ( SOC_DIR_N ) , .Z ( FPGA_IN ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__ebufn_4 OUT_PROTECT_GATE ( .A ( FPGA_OUT ) ,
|
||||
.TE_B ( SOC_DIR ) , .Z ( SOC_OUT ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 BUFT_RR_69 ( .A ( net_net_69 ) , .X ( SOC_DIR ) ,
|
||||
.TE_B ( BUF_net_70 ) , .Z ( SOC_OUT ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__inv_8 BINV_R_69 ( .A ( BUF_net_72 ) , .Y ( SOC_DIR ) ,
|
||||
.VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__inv_4 BINV_R_70 ( .A ( BUF_net_72 ) , .Y ( BUF_net_70 ) ,
|
||||
.VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 BINV_R_72 ( .A ( aps_rename_505_ ) ,
|
||||
.Y ( BUF_net_72 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
endmodule
|
||||
|
||||
|
||||
|
|
@ -1266,7 +1263,7 @@ input VSS ;
|
|||
supply1 VDD ;
|
||||
supply0 VSS ;
|
||||
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ccff_head[0] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ropt_net_136 ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[0] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_1_ ( .D ( mem_out[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[1] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
|
|
@ -1276,6 +1273,20 @@ sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_3_ ( .D ( mem_out[2] ) ,
|
|||
.CLK ( prog_clk[0] ) , .Q ( mem_out[3] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_1 FTB_1__0 ( .A ( mem_out[3] ) , .X ( ccff_tail[0] ) ,
|
||||
.VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1339 ( .A ( ccff_head[0] ) ,
|
||||
.X ( copt_net_116 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1340 ( .A ( copt_net_116 ) ,
|
||||
.X ( copt_net_117 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1341 ( .A ( copt_net_117 ) ,
|
||||
.X ( copt_net_118 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1342 ( .A ( copt_net_118 ) ,
|
||||
.X ( copt_net_119 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1343 ( .A ( copt_net_119 ) ,
|
||||
.X ( copt_net_120 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1344 ( .A ( copt_net_120 ) ,
|
||||
.X ( copt_net_121 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 ropt_h_inst_1357 ( .A ( copt_net_121 ) ,
|
||||
.X ( ropt_net_136 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
endmodule
|
||||
|
||||
|
||||
|
|
@ -1430,6 +1441,9 @@ wire [0:0] sky130_fd_sc_hd__mux2_1_9_X ;
|
|||
supply1 VDD ;
|
||||
supply0 VSS ;
|
||||
|
||||
sky130_fd_sc_hd__buf_6 sky130_fd_sc_hd__buf_4_0_ (
|
||||
.A ( sky130_fd_sc_hd__mux2_1_9_X[0] ) , .X ( out[0] ) , .VPWR ( VDD ) ,
|
||||
.VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__mux2_1 mux_l1_in_0_ ( .A0 ( in[1] ) , .A1 ( in[0] ) ,
|
||||
.S ( sram[0] ) , .X ( sky130_fd_sc_hd__mux2_1_0_X[0] ) , .VPWR ( VDD ) ,
|
||||
.VGND ( VSS ) ) ;
|
||||
|
|
@ -1464,8 +1478,6 @@ sky130_fd_sc_hd__mux2_1 mux_l4_in_0_ (
|
|||
.A0 ( sky130_fd_sc_hd__mux2_1_8_X[0] ) ,
|
||||
.A1 ( sky130_fd_sc_hd__mux2_1_7_X[0] ) , .S ( sram[3] ) ,
|
||||
.X ( sky130_fd_sc_hd__mux2_1_9_X[0] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 BUFT_RR_101 ( .A ( sky130_fd_sc_hd__mux2_1_9_X[0] ) ,
|
||||
.X ( out[0] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
endmodule
|
||||
|
||||
|
||||
|
|
@ -1526,10 +1538,10 @@ sky130_fd_sc_hd__mux2_1 mux_l4_in_0_ (
|
|||
.A0 ( sky130_fd_sc_hd__mux2_1_8_X[0] ) ,
|
||||
.A1 ( sky130_fd_sc_hd__mux2_1_7_X[0] ) , .S ( sram[3] ) ,
|
||||
.X ( sky130_fd_sc_hd__mux2_1_9_X[0] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__inv_8 BINV_R_99 ( .A ( BUF_net_100 ) , .Y ( out[0] ) ,
|
||||
sky130_fd_sc_hd__inv_8 BINV_R_100 ( .A ( BUF_net_101 ) , .Y ( out[0] ) ,
|
||||
.VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 BINV_R_100 ( .A ( sky130_fd_sc_hd__mux2_1_9_X[0] ) ,
|
||||
.Y ( BUF_net_100 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 BINV_R_101 ( .A ( sky130_fd_sc_hd__mux2_1_9_X[0] ) ,
|
||||
.Y ( BUF_net_101 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
endmodule
|
||||
|
||||
|
||||
|
|
@ -1590,7 +1602,7 @@ sky130_fd_sc_hd__mux2_1 mux_l4_in_0_ (
|
|||
.A0 ( sky130_fd_sc_hd__mux2_1_8_X[0] ) ,
|
||||
.A1 ( sky130_fd_sc_hd__mux2_1_7_X[0] ) , .S ( sram[3] ) ,
|
||||
.X ( sky130_fd_sc_hd__mux2_1_9_X[0] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 BUFT_RR_98 ( .A ( sky130_fd_sc_hd__mux2_1_9_X[0] ) ,
|
||||
sky130_fd_sc_hd__buf_6 BUFT_RR_99 ( .A ( sky130_fd_sc_hd__mux2_1_9_X[0] ) ,
|
||||
.X ( out[0] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
endmodule
|
||||
|
||||
|
|
@ -1652,10 +1664,10 @@ sky130_fd_sc_hd__mux2_1 mux_l4_in_0_ (
|
|||
.A0 ( sky130_fd_sc_hd__mux2_1_8_X[0] ) ,
|
||||
.A1 ( sky130_fd_sc_hd__mux2_1_7_X[0] ) , .S ( sram[3] ) ,
|
||||
.X ( sky130_fd_sc_hd__mux2_1_9_X[0] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__inv_8 BINV_R_96 ( .A ( BUF_net_97 ) , .Y ( out[0] ) ,
|
||||
sky130_fd_sc_hd__inv_8 BINV_R_97 ( .A ( BUF_net_98 ) , .Y ( out[0] ) ,
|
||||
.VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 BINV_R_97 ( .A ( sky130_fd_sc_hd__mux2_1_9_X[0] ) ,
|
||||
.Y ( BUF_net_97 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 BINV_R_98 ( .A ( sky130_fd_sc_hd__mux2_1_9_X[0] ) ,
|
||||
.Y ( BUF_net_98 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
endmodule
|
||||
|
||||
|
||||
|
|
@ -1716,10 +1728,10 @@ sky130_fd_sc_hd__mux2_1 mux_l4_in_0_ (
|
|||
.A0 ( sky130_fd_sc_hd__mux2_1_8_X[0] ) ,
|
||||
.A1 ( sky130_fd_sc_hd__mux2_1_7_X[0] ) , .S ( sram[3] ) ,
|
||||
.X ( sky130_fd_sc_hd__mux2_1_9_X[0] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__inv_8 BINV_R_94 ( .A ( BUF_net_95 ) , .Y ( out[0] ) ,
|
||||
sky130_fd_sc_hd__inv_8 BINV_R_95 ( .A ( BUF_net_96 ) , .Y ( out[0] ) ,
|
||||
.VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 BINV_R_95 ( .A ( sky130_fd_sc_hd__mux2_1_9_X[0] ) ,
|
||||
.Y ( BUF_net_95 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 BINV_R_96 ( .A ( sky130_fd_sc_hd__mux2_1_9_X[0] ) ,
|
||||
.Y ( BUF_net_96 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
endmodule
|
||||
|
||||
|
||||
|
|
@ -1780,10 +1792,8 @@ sky130_fd_sc_hd__mux2_1 mux_l4_in_0_ (
|
|||
.A0 ( sky130_fd_sc_hd__mux2_1_8_X[0] ) ,
|
||||
.A1 ( sky130_fd_sc_hd__mux2_1_7_X[0] ) , .S ( sram[3] ) ,
|
||||
.X ( sky130_fd_sc_hd__mux2_1_9_X[0] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__inv_8 BINV_R_92 ( .A ( BUF_net_93 ) , .Y ( out[0] ) ,
|
||||
.VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 BINV_R_93 ( .A ( sky130_fd_sc_hd__mux2_1_9_X[0] ) ,
|
||||
.Y ( BUF_net_93 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 BUFT_RR_94 ( .A ( sky130_fd_sc_hd__mux2_1_9_X[0] ) ,
|
||||
.X ( out[0] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
endmodule
|
||||
|
||||
|
||||
|
|
@ -1844,7 +1854,7 @@ sky130_fd_sc_hd__mux2_1 mux_l4_in_0_ (
|
|||
.A0 ( sky130_fd_sc_hd__mux2_1_8_X[0] ) ,
|
||||
.A1 ( sky130_fd_sc_hd__mux2_1_7_X[0] ) , .S ( sram[3] ) ,
|
||||
.X ( sky130_fd_sc_hd__mux2_1_9_X[0] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 BUFT_RR_91 ( .A ( sky130_fd_sc_hd__mux2_1_9_X[0] ) ,
|
||||
sky130_fd_sc_hd__buf_6 BUFT_RR_93 ( .A ( sky130_fd_sc_hd__mux2_1_9_X[0] ) ,
|
||||
.X ( out[0] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
endmodule
|
||||
|
||||
|
|
@ -1967,7 +1977,7 @@ cbx_1__0__mux_tree_tapbuf_size10_0 mux_top_ipin_0 (
|
|||
.sram_inv ( { SYNOPSYS_UNCONNECTED_1 , SYNOPSYS_UNCONNECTED_2 ,
|
||||
SYNOPSYS_UNCONNECTED_3 , SYNOPSYS_UNCONNECTED_4 } ) ,
|
||||
.out ( bottom_grid_pin_0_ ) , .VDD ( VDD ) , .VSS ( VSS ) ,
|
||||
.p0 ( optlc_net_114 ) ) ;
|
||||
.p0 ( optlc_net_112 ) ) ;
|
||||
cbx_1__0__mux_tree_tapbuf_size10_1 mux_top_ipin_1 (
|
||||
.in ( { chanx_right_out[1] , chanx_left_out[1] , chanx_right_out[3] ,
|
||||
chanx_left_out[3] , chanx_right_out[5] , chanx_left_out[5] ,
|
||||
|
|
@ -1977,7 +1987,7 @@ cbx_1__0__mux_tree_tapbuf_size10_1 mux_top_ipin_1 (
|
|||
.sram_inv ( { SYNOPSYS_UNCONNECTED_5 , SYNOPSYS_UNCONNECTED_6 ,
|
||||
SYNOPSYS_UNCONNECTED_7 , SYNOPSYS_UNCONNECTED_8 } ) ,
|
||||
.out ( bottom_grid_pin_2_ ) , .VDD ( VDD ) , .VSS ( VSS ) ,
|
||||
.p0 ( optlc_net_114 ) ) ;
|
||||
.p0 ( optlc_net_112 ) ) ;
|
||||
cbx_1__0__mux_tree_tapbuf_size10_2 mux_top_ipin_2 (
|
||||
.in ( { chanx_right_out[0] , chanx_left_out[0] , chanx_right_out[2] ,
|
||||
chanx_left_out[2] , chanx_right_out[6] , chanx_left_out[6] ,
|
||||
|
|
@ -1987,7 +1997,7 @@ cbx_1__0__mux_tree_tapbuf_size10_2 mux_top_ipin_2 (
|
|||
.sram_inv ( { SYNOPSYS_UNCONNECTED_9 , SYNOPSYS_UNCONNECTED_10 ,
|
||||
SYNOPSYS_UNCONNECTED_11 , SYNOPSYS_UNCONNECTED_12 } ) ,
|
||||
.out ( bottom_grid_pin_4_ ) , .VDD ( VDD ) , .VSS ( VSS ) ,
|
||||
.p0 ( optlc_net_115 ) ) ;
|
||||
.p0 ( optlc_net_113 ) ) ;
|
||||
cbx_1__0__mux_tree_tapbuf_size10_3 mux_top_ipin_3 (
|
||||
.in ( { chanx_right_out[1] , chanx_left_out[1] , chanx_right_out[3] ,
|
||||
chanx_left_out[3] , chanx_right_out[7] , chanx_left_out[7] ,
|
||||
|
|
@ -1997,7 +2007,7 @@ cbx_1__0__mux_tree_tapbuf_size10_3 mux_top_ipin_3 (
|
|||
.sram_inv ( { SYNOPSYS_UNCONNECTED_13 , SYNOPSYS_UNCONNECTED_14 ,
|
||||
SYNOPSYS_UNCONNECTED_15 , SYNOPSYS_UNCONNECTED_16 } ) ,
|
||||
.out ( bottom_grid_pin_6_ ) , .VDD ( VDD ) , .VSS ( VSS ) ,
|
||||
.p0 ( optlc_net_115 ) ) ;
|
||||
.p0 ( optlc_net_114 ) ) ;
|
||||
cbx_1__0__mux_tree_tapbuf_size10_4 mux_top_ipin_4 (
|
||||
.in ( { chanx_right_out[0] , chanx_left_out[0] , chanx_right_out[2] ,
|
||||
chanx_left_out[2] , chanx_right_out[4] , chanx_left_out[4] ,
|
||||
|
|
@ -2007,7 +2017,7 @@ cbx_1__0__mux_tree_tapbuf_size10_4 mux_top_ipin_4 (
|
|||
.sram_inv ( { SYNOPSYS_UNCONNECTED_17 , SYNOPSYS_UNCONNECTED_18 ,
|
||||
SYNOPSYS_UNCONNECTED_19 , SYNOPSYS_UNCONNECTED_20 } ) ,
|
||||
.out ( bottom_grid_pin_8_ ) , .VDD ( VDD ) , .VSS ( VSS ) ,
|
||||
.p0 ( optlc_net_116 ) ) ;
|
||||
.p0 ( optlc_net_114 ) ) ;
|
||||
cbx_1__0__mux_tree_tapbuf_size10_5 mux_top_ipin_5 (
|
||||
.in ( { chanx_right_out[1] , chanx_left_out[1] , chanx_right_out[3] ,
|
||||
chanx_left_out[3] , chanx_right_out[5] , chanx_left_out[5] ,
|
||||
|
|
@ -2017,7 +2027,7 @@ cbx_1__0__mux_tree_tapbuf_size10_5 mux_top_ipin_5 (
|
|||
.sram_inv ( { SYNOPSYS_UNCONNECTED_21 , SYNOPSYS_UNCONNECTED_22 ,
|
||||
SYNOPSYS_UNCONNECTED_23 , SYNOPSYS_UNCONNECTED_24 } ) ,
|
||||
.out ( bottom_grid_pin_10_ ) , .VDD ( VDD ) , .VSS ( VSS ) ,
|
||||
.p0 ( optlc_net_116 ) ) ;
|
||||
.p0 ( optlc_net_114 ) ) ;
|
||||
cbx_1__0__mux_tree_tapbuf_size10_6 mux_top_ipin_6 (
|
||||
.in ( { chanx_right_out[0] , chanx_left_out[0] , chanx_right_out[2] ,
|
||||
chanx_left_out[2] , chanx_right_out[6] , chanx_left_out[6] ,
|
||||
|
|
@ -2027,7 +2037,7 @@ cbx_1__0__mux_tree_tapbuf_size10_6 mux_top_ipin_6 (
|
|||
.sram_inv ( { SYNOPSYS_UNCONNECTED_25 , SYNOPSYS_UNCONNECTED_26 ,
|
||||
SYNOPSYS_UNCONNECTED_27 , SYNOPSYS_UNCONNECTED_28 } ) ,
|
||||
.out ( bottom_grid_pin_12_ ) , .VDD ( VDD ) , .VSS ( VSS ) ,
|
||||
.p0 ( optlc_net_114 ) ) ;
|
||||
.p0 ( optlc_net_112 ) ) ;
|
||||
cbx_1__0__mux_tree_tapbuf_size10_7 mux_top_ipin_7 (
|
||||
.in ( { chanx_right_out[1] , chanx_left_out[1] , chanx_right_out[3] ,
|
||||
chanx_left_out[3] , chanx_right_out[7] , chanx_left_out[7] ,
|
||||
|
|
@ -2037,7 +2047,7 @@ cbx_1__0__mux_tree_tapbuf_size10_7 mux_top_ipin_7 (
|
|||
.sram_inv ( { SYNOPSYS_UNCONNECTED_29 , SYNOPSYS_UNCONNECTED_30 ,
|
||||
SYNOPSYS_UNCONNECTED_31 , SYNOPSYS_UNCONNECTED_32 } ) ,
|
||||
.out ( bottom_grid_pin_14_ ) , .VDD ( VDD ) , .VSS ( VSS ) ,
|
||||
.p0 ( optlc_net_114 ) ) ;
|
||||
.p0 ( optlc_net_112 ) ) ;
|
||||
cbx_1__0__mux_tree_tapbuf_size10 mux_top_ipin_8 (
|
||||
.in ( { chanx_right_out[0] , chanx_left_out[0] , chanx_right_out[2] ,
|
||||
chanx_left_out[2] , chanx_right_out[8] , chanx_left_out[8] ,
|
||||
|
|
@ -2047,7 +2057,7 @@ cbx_1__0__mux_tree_tapbuf_size10 mux_top_ipin_8 (
|
|||
.sram_inv ( { SYNOPSYS_UNCONNECTED_33 , SYNOPSYS_UNCONNECTED_34 ,
|
||||
SYNOPSYS_UNCONNECTED_35 , SYNOPSYS_UNCONNECTED_36 } ) ,
|
||||
.out ( bottom_grid_pin_16_ ) , .VDD ( VDD ) , .VSS ( VSS ) ,
|
||||
.p0 ( optlc_net_115 ) ) ;
|
||||
.p0 ( optlc_net_113 ) ) ;
|
||||
cbx_1__0__mux_tree_tapbuf_size10_mem_0 mem_top_ipin_0 (
|
||||
.prog_clk ( prog_clk ) , .ccff_head ( ccff_head ) ,
|
||||
.ccff_tail ( mux_tree_tapbuf_size10_mem_0_ccff_tail ) ,
|
||||
|
|
@ -2115,12 +2125,12 @@ cbx_1__0__logical_tile_io_mode_io__2 logical_tile_io_mode_io__2 (
|
|||
.IO_ISOL_N ( IO_ISOL_N ) , .prog_clk ( prog_clk ) ,
|
||||
.gfpga_pad_EMBEDDED_IO_HD_SOC_IN ( gfpga_pad_EMBEDDED_IO_HD_SOC_IN[2] ) ,
|
||||
.gfpga_pad_EMBEDDED_IO_HD_SOC_OUT ( gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[2] ) ,
|
||||
.gfpga_pad_EMBEDDED_IO_HD_SOC_DIR ( { aps_rename_512_ } ) ,
|
||||
.gfpga_pad_EMBEDDED_IO_HD_SOC_DIR ( { aps_rename_511_ } ) ,
|
||||
.io_outpad ( top_width_0_height_0__pin_4_ ) ,
|
||||
.ccff_head ( logical_tile_io_mode_io__1_ccff_tail ) ,
|
||||
.io_inpad ( top_width_0_height_0__pin_5_lower ) ,
|
||||
.ccff_tail ( logical_tile_io_mode_io__2_ccff_tail ) , .VDD ( VDD ) ,
|
||||
.VSS ( VSS ) , .ZBUF_184_0 ( gfpga_pad_EMBEDDED_IO_HD_SOC_DIR[2] ) ) ;
|
||||
.VSS ( VSS ) , .ZBUF_211_0 ( gfpga_pad_EMBEDDED_IO_HD_SOC_DIR[2] ) ) ;
|
||||
cbx_1__0__logical_tile_io_mode_io__3 logical_tile_io_mode_io__3 (
|
||||
.IO_ISOL_N ( IO_ISOL_N ) , .prog_clk ( prog_clk ) ,
|
||||
.gfpga_pad_EMBEDDED_IO_HD_SOC_IN ( gfpga_pad_EMBEDDED_IO_HD_SOC_IN[3] ) ,
|
||||
|
|
@ -2180,10 +2190,10 @@ cbx_1__0__logical_tile_io_mode_io_ logical_tile_io_mode_io__8 (
|
|||
.ccff_head ( logical_tile_io_mode_io__7_ccff_tail ) ,
|
||||
.io_inpad ( top_width_0_height_0__pin_17_lower ) ,
|
||||
.ccff_tail ( ccff_tail ) , .VDD ( VDD ) , .VSS ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_16 prog_clk_0_FTB00 ( .A ( prog_clk_0_N_in ) ,
|
||||
sky130_fd_sc_hd__buf_1 prog_clk_0_FTB00 ( .A ( prog_clk_0_N_in ) ,
|
||||
.X ( prog_clk[0] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__clkbuf_1 prog_clk_0_W_FTB01 ( .A ( prog_clk_0_N_in ) ,
|
||||
.X ( ctsbuf_net_1117 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
.X ( ctsbuf_net_1115 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 FTB_19__18 ( .A ( chanx_left_in[0] ) ,
|
||||
.X ( chanx_right_out[0] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 FTB_20__19 ( .A ( chanx_left_in[1] ) ,
|
||||
|
|
@ -2304,16 +2314,16 @@ sky130_fd_sc_hd__buf_6 FTB_68__67 ( .A ( SC_IN_TOP ) , .X ( SC_OUT_BOT ) ,
|
|||
.VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 FTB_69__68 ( .A ( SC_IN_BOT ) , .X ( SC_OUT_TOP ) ,
|
||||
.VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__conb_1 optlc_116 ( .LO ( SYNOPSYS_UNCONNECTED_37 ) ,
|
||||
sky130_fd_sc_hd__conb_1 optlc_114 ( .LO ( SYNOPSYS_UNCONNECTED_37 ) ,
|
||||
.HI ( optlc_net_112 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__conb_1 optlc_116 ( .LO ( SYNOPSYS_UNCONNECTED_38 ) ,
|
||||
.HI ( optlc_net_113 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__conb_1 optlc_118 ( .LO ( SYNOPSYS_UNCONNECTED_39 ) ,
|
||||
.HI ( optlc_net_114 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__conb_1 optlc_118 ( .LO ( SYNOPSYS_UNCONNECTED_38 ) ,
|
||||
.HI ( optlc_net_115 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__conb_1 optlc_120 ( .LO ( SYNOPSYS_UNCONNECTED_39 ) ,
|
||||
.HI ( optlc_net_116 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 ZBUF_184_inst_121 ( .A ( aps_rename_512_ ) ,
|
||||
sky130_fd_sc_hd__buf_6 ZBUF_211_inst_119 ( .A ( aps_rename_511_ ) ,
|
||||
.X ( gfpga_pad_EMBEDDED_IO_HD_SOC_DIR[2] ) , .VPWR ( VDD ) ,
|
||||
.VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__clkbuf_8 cts_buf_3521248 ( .A ( ctsbuf_net_1117 ) ,
|
||||
sky130_fd_sc_hd__clkbuf_8 cts_buf_3521246 ( .A ( ctsbuf_net_1115 ) ,
|
||||
.X ( prog_clk_0_W_out ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
endmodule
|
||||
|
||||
|
|
|
|||
|
|
@ -11,23 +11,21 @@ input [0:0] ccff_head ;
|
|||
output [0:0] ccff_tail ;
|
||||
output [0:0] mem_out ;
|
||||
|
||||
wire copt_net_124 ;
|
||||
wire copt_net_122 ;
|
||||
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ccff_head[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( copt_net_124 ) ) ;
|
||||
.CLK ( prog_clk[0] ) , .Q ( copt_net_122 ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 FTB_18__17 ( .A ( mem_out[0] ) , .X ( ccff_tail[0] ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1351 ( .A ( copt_net_119 ) ,
|
||||
.X ( copt_net_118 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1352 ( .A ( copt_net_124 ) ,
|
||||
.X ( copt_net_119 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1353 ( .A ( copt_net_118 ) ,
|
||||
.X ( copt_net_120 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1354 ( .A ( copt_net_122 ) ,
|
||||
sky130_fd_sc_hd__dlygate4sd1_1 copt_h_inst_1346 ( .A ( copt_net_124 ) ,
|
||||
.X ( mem_out[0] ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1355 ( .A ( copt_net_123 ) ,
|
||||
.X ( copt_net_122 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1356 ( .A ( copt_net_120 ) ,
|
||||
.X ( copt_net_123 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1347 ( .A ( copt_net_125 ) ,
|
||||
.X ( copt_net_124 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1348 ( .A ( copt_net_126 ) ,
|
||||
.X ( copt_net_125 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1349 ( .A ( copt_net_127 ) ,
|
||||
.X ( copt_net_126 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1350 ( .A ( copt_net_122 ) ,
|
||||
.X ( copt_net_127 ) ) ;
|
||||
endmodule
|
||||
|
||||
|
||||
|
|
@ -42,17 +40,17 @@ input FPGA_DIR ;
|
|||
input IO_ISOL_N ;
|
||||
|
||||
sky130_fd_sc_hd__nand2b_1 ISOL_EN_GATE ( .A_N ( FPGA_DIR ) ,
|
||||
.B ( IO_ISOL_N ) , .Y ( aps_rename_511_ ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 INV_SOC_DIR ( .A ( aps_rename_511_ ) ,
|
||||
.B ( IO_ISOL_N ) , .Y ( aps_rename_510_ ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 INV_SOC_DIR ( .A ( aps_rename_510_ ) ,
|
||||
.Y ( SOC_DIR_N ) ) ;
|
||||
sky130_fd_sc_hd__ebufn_4 IN_PROTECT_GATE ( .A ( SOC_IN ) ,
|
||||
.TE_B ( SOC_DIR_N ) , .Z ( FPGA_IN ) ) ;
|
||||
sky130_fd_sc_hd__ebufn_4 OUT_PROTECT_GATE ( .A ( FPGA_OUT ) ,
|
||||
.TE_B ( BUF_net_88 ) , .Z ( SOC_OUT ) ) ;
|
||||
sky130_fd_sc_hd__inv_4 BINV_R_88 ( .A ( BUF_net_90 ) , .Y ( BUF_net_88 ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 BINV_R_90 ( .A ( aps_rename_511_ ) ,
|
||||
.Y ( BUF_net_90 ) ) ;
|
||||
sky130_fd_sc_hd__inv_6 BINV_R_112 ( .A ( BUF_net_90 ) , .Y ( SOC_DIR ) ) ;
|
||||
.TE_B ( BUF_net_90 ) , .Z ( SOC_OUT ) ) ;
|
||||
sky130_fd_sc_hd__inv_4 BINV_R_90 ( .A ( BUF_net_92 ) , .Y ( BUF_net_90 ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 BINV_R_92 ( .A ( aps_rename_510_ ) ,
|
||||
.Y ( BUF_net_92 ) ) ;
|
||||
sky130_fd_sc_hd__inv_6 BINV_R_110 ( .A ( BUF_net_92 ) , .Y ( SOC_DIR ) ) ;
|
||||
endmodule
|
||||
|
||||
|
||||
|
|
@ -132,16 +130,13 @@ input FPGA_DIR ;
|
|||
input IO_ISOL_N ;
|
||||
|
||||
sky130_fd_sc_hd__nand2b_1 ISOL_EN_GATE ( .A_N ( FPGA_DIR ) ,
|
||||
.B ( IO_ISOL_N ) , .Y ( aps_rename_510_ ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 INV_SOC_DIR ( .A ( BUF_net_85 ) , .Y ( SOC_DIR_N ) ) ;
|
||||
.B ( IO_ISOL_N ) , .Y ( net_net_89 ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 INV_SOC_DIR ( .A ( SOC_DIR ) , .Y ( SOC_DIR_N ) ) ;
|
||||
sky130_fd_sc_hd__ebufn_4 IN_PROTECT_GATE ( .A ( SOC_IN ) ,
|
||||
.TE_B ( SOC_DIR_N ) , .Z ( FPGA_IN ) ) ;
|
||||
sky130_fd_sc_hd__ebufn_4 OUT_PROTECT_GATE ( .A ( FPGA_OUT ) ,
|
||||
.TE_B ( BUF_net_85 ) , .Z ( SOC_OUT ) ) ;
|
||||
sky130_fd_sc_hd__inv_4 BINV_R_85 ( .A ( BUF_net_87 ) , .Y ( BUF_net_85 ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 BINV_R_87 ( .A ( aps_rename_510_ ) ,
|
||||
.Y ( BUF_net_87 ) ) ;
|
||||
sky130_fd_sc_hd__inv_6 BINV_R_108 ( .A ( BUF_net_87 ) , .Y ( SOC_DIR ) ) ;
|
||||
.TE_B ( SOC_DIR ) , .Z ( SOC_OUT ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 BUFT_RR_89 ( .A ( net_net_89 ) , .X ( SOC_DIR ) ) ;
|
||||
endmodule
|
||||
|
||||
|
||||
|
|
@ -222,15 +217,16 @@ input IO_ISOL_N ;
|
|||
|
||||
sky130_fd_sc_hd__nand2b_1 ISOL_EN_GATE ( .A_N ( FPGA_DIR ) ,
|
||||
.B ( IO_ISOL_N ) , .Y ( aps_rename_509_ ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 INV_SOC_DIR ( .A ( BUF_net_82 ) , .Y ( SOC_DIR_N ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 INV_SOC_DIR ( .A ( BUF_net_87 ) , .Y ( SOC_DIR_N ) ) ;
|
||||
sky130_fd_sc_hd__ebufn_4 IN_PROTECT_GATE ( .A ( SOC_IN ) ,
|
||||
.TE_B ( SOC_DIR_N ) , .Z ( FPGA_IN ) ) ;
|
||||
sky130_fd_sc_hd__ebufn_4 OUT_PROTECT_GATE ( .A ( FPGA_OUT ) ,
|
||||
.TE_B ( BUF_net_82 ) , .Z ( SOC_OUT ) ) ;
|
||||
sky130_fd_sc_hd__inv_4 BINV_R_82 ( .A ( BUF_net_84 ) , .Y ( BUF_net_82 ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 BINV_R_84 ( .A ( aps_rename_509_ ) ,
|
||||
.Y ( BUF_net_84 ) ) ;
|
||||
sky130_fd_sc_hd__inv_6 BINV_R_106 ( .A ( BUF_net_84 ) , .Y ( SOC_DIR ) ) ;
|
||||
.TE_B ( BUF_net_86 ) , .Z ( SOC_OUT ) ) ;
|
||||
sky130_fd_sc_hd__inv_4 BINV_R_86 ( .A ( BUF_net_88 ) , .Y ( BUF_net_86 ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 BINV_R_87 ( .A ( BUF_net_88 ) , .Y ( BUF_net_87 ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 BINV_R_88 ( .A ( aps_rename_509_ ) ,
|
||||
.Y ( BUF_net_88 ) ) ;
|
||||
sky130_fd_sc_hd__inv_6 BINV_R_108 ( .A ( BUF_net_88 ) , .Y ( SOC_DIR ) ) ;
|
||||
endmodule
|
||||
|
||||
|
||||
|
|
@ -311,16 +307,14 @@ input IO_ISOL_N ;
|
|||
|
||||
sky130_fd_sc_hd__nand2b_1 ISOL_EN_GATE ( .A_N ( FPGA_DIR ) ,
|
||||
.B ( IO_ISOL_N ) , .Y ( aps_rename_508_ ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 INV_SOC_DIR ( .A ( aps_rename_508_ ) ,
|
||||
.Y ( SOC_DIR_N ) ) ;
|
||||
sky130_fd_sc_hd__ebufn_4 IN_PROTECT_GATE ( .A ( SOC_IN ) ,
|
||||
.TE_B ( SOC_DIR_N ) , .Z ( FPGA_IN ) ) ;
|
||||
.TE_B ( BUF_net_84 ) , .Z ( FPGA_IN ) ) ;
|
||||
sky130_fd_sc_hd__ebufn_4 OUT_PROTECT_GATE ( .A ( FPGA_OUT ) ,
|
||||
.TE_B ( BUF_net_79 ) , .Z ( SOC_OUT ) ) ;
|
||||
sky130_fd_sc_hd__inv_4 BINV_R_79 ( .A ( BUF_net_81 ) , .Y ( BUF_net_79 ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 BINV_R_81 ( .A ( aps_rename_508_ ) ,
|
||||
.Y ( BUF_net_81 ) ) ;
|
||||
sky130_fd_sc_hd__inv_6 BINV_R_110 ( .A ( BUF_net_81 ) , .Y ( SOC_DIR ) ) ;
|
||||
.TE_B ( BUF_net_81 ) , .Z ( SOC_OUT ) ) ;
|
||||
sky130_fd_sc_hd__inv_4 BINV_R_81 ( .A ( BUF_net_84 ) , .Y ( BUF_net_81 ) ) ;
|
||||
sky130_fd_sc_hd__inv_8 BINV_R_83 ( .A ( BUF_net_84 ) , .Y ( SOC_DIR ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 BINV_R_84 ( .A ( aps_rename_508_ ) ,
|
||||
.Y ( BUF_net_84 ) ) ;
|
||||
endmodule
|
||||
|
||||
|
||||
|
|
@ -400,16 +394,13 @@ input FPGA_DIR ;
|
|||
input IO_ISOL_N ;
|
||||
|
||||
sky130_fd_sc_hd__nand2b_1 ISOL_EN_GATE ( .A_N ( FPGA_DIR ) ,
|
||||
.B ( IO_ISOL_N ) , .Y ( aps_rename_507_ ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 INV_SOC_DIR ( .A ( BUF_net_76 ) , .Y ( SOC_DIR_N ) ) ;
|
||||
.B ( IO_ISOL_N ) , .Y ( net_net_80 ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 INV_SOC_DIR ( .A ( SOC_DIR ) , .Y ( SOC_DIR_N ) ) ;
|
||||
sky130_fd_sc_hd__ebufn_4 IN_PROTECT_GATE ( .A ( SOC_IN ) ,
|
||||
.TE_B ( SOC_DIR_N ) , .Z ( FPGA_IN ) ) ;
|
||||
sky130_fd_sc_hd__ebufn_4 OUT_PROTECT_GATE ( .A ( FPGA_OUT ) ,
|
||||
.TE_B ( BUF_net_76 ) , .Z ( SOC_OUT ) ) ;
|
||||
sky130_fd_sc_hd__inv_4 BINV_R_76 ( .A ( BUF_net_78 ) , .Y ( BUF_net_76 ) ) ;
|
||||
sky130_fd_sc_hd__inv_8 BINV_R_77 ( .A ( BUF_net_78 ) , .Y ( SOC_DIR ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 BINV_R_78 ( .A ( aps_rename_507_ ) ,
|
||||
.Y ( BUF_net_78 ) ) ;
|
||||
.TE_B ( SOC_DIR ) , .Z ( SOC_OUT ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 BUFT_RR_80 ( .A ( net_net_80 ) , .X ( SOC_DIR ) ) ;
|
||||
endmodule
|
||||
|
||||
|
||||
|
|
@ -489,16 +480,19 @@ input FPGA_DIR ;
|
|||
input IO_ISOL_N ;
|
||||
|
||||
sky130_fd_sc_hd__nand2b_1 ISOL_EN_GATE ( .A_N ( FPGA_DIR ) ,
|
||||
.B ( IO_ISOL_N ) , .Y ( aps_rename_506_ ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 INV_SOC_DIR ( .A ( BUF_net_73 ) , .Y ( SOC_DIR_N ) ) ;
|
||||
.B ( IO_ISOL_N ) , .Y ( aps_rename_507_ ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 INV_SOC_DIR ( .A ( aps_rename_507_ ) ,
|
||||
.Y ( SOC_DIR_N ) ) ;
|
||||
sky130_fd_sc_hd__ebufn_4 IN_PROTECT_GATE ( .A ( SOC_IN ) ,
|
||||
.TE_B ( SOC_DIR_N ) , .Z ( FPGA_IN ) ) ;
|
||||
sky130_fd_sc_hd__ebufn_4 OUT_PROTECT_GATE ( .A ( FPGA_OUT ) ,
|
||||
.TE_B ( BUF_net_73 ) , .Z ( SOC_OUT ) ) ;
|
||||
sky130_fd_sc_hd__inv_4 BINV_R_73 ( .A ( BUF_net_75 ) , .Y ( BUF_net_73 ) ) ;
|
||||
sky130_fd_sc_hd__inv_8 BINV_R_74 ( .A ( BUF_net_75 ) , .Y ( SOC_DIR ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 BINV_R_75 ( .A ( aps_rename_506_ ) ,
|
||||
.Y ( BUF_net_75 ) ) ;
|
||||
.TE_B ( BUF_net_77 ) , .Z ( SOC_OUT ) ) ;
|
||||
sky130_fd_sc_hd__inv_4 BINV_R_77 ( .A ( BUF_net_79 ) , .Y ( BUF_net_77 ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 BINV_R_78 ( .A ( BUF_net_79 ) , .Y ( BUF_net_78 ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 BINV_R_79 ( .A ( aps_rename_507_ ) ,
|
||||
.Y ( BUF_net_79 ) ) ;
|
||||
sky130_fd_sc_hd__inv_8 BINV_R_106 ( .A ( BUF_net_107 ) , .Y ( SOC_DIR ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 BINV_R_107 ( .A ( BUF_net_78 ) , .Y ( BUF_net_107 ) ) ;
|
||||
endmodule
|
||||
|
||||
|
||||
|
|
@ -568,7 +562,7 @@ endmodule
|
|||
|
||||
|
||||
module cbx_1__0__EMBEDDED_IO_HD_2 ( SOC_IN , SOC_OUT , SOC_DIR , FPGA_IN ,
|
||||
FPGA_OUT , FPGA_DIR , IO_ISOL_N , ZBUF_184_0 ) ;
|
||||
FPGA_OUT , FPGA_DIR , IO_ISOL_N , ZBUF_211_0 ) ;
|
||||
input SOC_IN ;
|
||||
output SOC_OUT ;
|
||||
output SOC_DIR ;
|
||||
|
|
@ -576,22 +570,22 @@ output FPGA_IN ;
|
|||
input FPGA_OUT ;
|
||||
input FPGA_DIR ;
|
||||
input IO_ISOL_N ;
|
||||
input ZBUF_184_0 ;
|
||||
input ZBUF_211_0 ;
|
||||
|
||||
sky130_fd_sc_hd__nand2b_1 ISOL_EN_GATE ( .A_N ( FPGA_DIR ) ,
|
||||
.B ( IO_ISOL_N ) , .Y ( SOC_DIR ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 INV_SOC_DIR ( .A ( SOC_DIR ) , .Y ( SOC_DIR_N ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 INV_SOC_DIR ( .A ( ZBUF_211_0 ) , .Y ( SOC_DIR_N ) ) ;
|
||||
sky130_fd_sc_hd__ebufn_4 IN_PROTECT_GATE ( .A ( SOC_IN ) ,
|
||||
.TE_B ( SOC_DIR_N ) , .Z ( FPGA_IN ) ) ;
|
||||
sky130_fd_sc_hd__ebufn_4 OUT_PROTECT_GATE ( .A ( FPGA_OUT ) ,
|
||||
.TE_B ( ZBUF_184_0 ) , .Z ( SOC_OUT ) ) ;
|
||||
.TE_B ( ZBUF_211_0 ) , .Z ( SOC_OUT ) ) ;
|
||||
endmodule
|
||||
|
||||
|
||||
module cbx_1__0__logical_tile_io_mode_physical__iopad_2 ( IO_ISOL_N ,
|
||||
prog_clk , gfpga_pad_EMBEDDED_IO_HD_SOC_IN ,
|
||||
gfpga_pad_EMBEDDED_IO_HD_SOC_OUT , gfpga_pad_EMBEDDED_IO_HD_SOC_DIR ,
|
||||
iopad_outpad , ccff_head , iopad_inpad , ccff_tail , ZBUF_184_0 ) ;
|
||||
iopad_outpad , ccff_head , iopad_inpad , ccff_tail , ZBUF_211_0 ) ;
|
||||
input [0:0] IO_ISOL_N ;
|
||||
input [0:0] prog_clk ;
|
||||
input [0:0] gfpga_pad_EMBEDDED_IO_HD_SOC_IN ;
|
||||
|
|
@ -601,7 +595,7 @@ input [0:0] iopad_outpad ;
|
|||
input [0:0] ccff_head ;
|
||||
output [0:0] iopad_inpad ;
|
||||
output [0:0] ccff_tail ;
|
||||
input ZBUF_184_0 ;
|
||||
input ZBUF_211_0 ;
|
||||
|
||||
wire [0:0] EMBEDDED_IO_HD_0_en ;
|
||||
|
||||
|
|
@ -611,7 +605,7 @@ cbx_1__0__EMBEDDED_IO_HD_2 EMBEDDED_IO_HD_0_ (
|
|||
.SOC_DIR ( gfpga_pad_EMBEDDED_IO_HD_SOC_DIR[0] ) ,
|
||||
.FPGA_IN ( iopad_inpad[0] ) , .FPGA_OUT ( iopad_outpad[0] ) ,
|
||||
.FPGA_DIR ( EMBEDDED_IO_HD_0_en[0] ) , .IO_ISOL_N ( IO_ISOL_N[0] ) ,
|
||||
.ZBUF_184_0 ( ZBUF_184_0 ) ) ;
|
||||
.ZBUF_211_0 ( ZBUF_211_0 ) ) ;
|
||||
cbx_1__0__EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem_2 EMBEDDED_IO_HD_sky130_fd_sc_hd__dfxtp_1_mem (
|
||||
.prog_clk ( prog_clk ) , .ccff_head ( ccff_head ) ,
|
||||
.ccff_tail ( ccff_tail ) , .mem_out ( EMBEDDED_IO_HD_0_en ) ) ;
|
||||
|
|
@ -621,7 +615,7 @@ endmodule
|
|||
module cbx_1__0__logical_tile_io_mode_io__2 ( IO_ISOL_N , prog_clk ,
|
||||
gfpga_pad_EMBEDDED_IO_HD_SOC_IN , gfpga_pad_EMBEDDED_IO_HD_SOC_OUT ,
|
||||
gfpga_pad_EMBEDDED_IO_HD_SOC_DIR , io_outpad , ccff_head , io_inpad ,
|
||||
ccff_tail , ZBUF_184_0 ) ;
|
||||
ccff_tail , ZBUF_211_0 ) ;
|
||||
input [0:0] IO_ISOL_N ;
|
||||
input [0:0] prog_clk ;
|
||||
input [0:0] gfpga_pad_EMBEDDED_IO_HD_SOC_IN ;
|
||||
|
|
@ -631,7 +625,7 @@ input [0:0] io_outpad ;
|
|||
input [0:0] ccff_head ;
|
||||
output [0:0] io_inpad ;
|
||||
output [0:0] ccff_tail ;
|
||||
input ZBUF_184_0 ;
|
||||
input ZBUF_211_0 ;
|
||||
|
||||
cbx_1__0__logical_tile_io_mode_physical__iopad_2 logical_tile_io_mode_physical__iopad_0 (
|
||||
.IO_ISOL_N ( IO_ISOL_N ) , .prog_clk ( prog_clk ) ,
|
||||
|
|
@ -640,7 +634,7 @@ cbx_1__0__logical_tile_io_mode_physical__iopad_2 logical_tile_io_mode_physical__
|
|||
.gfpga_pad_EMBEDDED_IO_HD_SOC_DIR ( gfpga_pad_EMBEDDED_IO_HD_SOC_DIR ) ,
|
||||
.iopad_outpad ( io_outpad ) , .ccff_head ( ccff_head ) ,
|
||||
.iopad_inpad ( io_inpad ) , .ccff_tail ( ccff_tail ) ,
|
||||
.ZBUF_184_0 ( ZBUF_184_0 ) ) ;
|
||||
.ZBUF_211_0 ( ZBUF_211_0 ) ) ;
|
||||
endmodule
|
||||
|
||||
|
||||
|
|
@ -668,16 +662,17 @@ input FPGA_DIR ;
|
|||
input IO_ISOL_N ;
|
||||
|
||||
sky130_fd_sc_hd__nand2b_1 ISOL_EN_GATE ( .A_N ( FPGA_DIR ) ,
|
||||
.B ( IO_ISOL_N ) , .Y ( aps_rename_505_ ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 INV_SOC_DIR ( .A ( BUF_net_70 ) , .Y ( SOC_DIR_N ) ) ;
|
||||
.B ( IO_ISOL_N ) , .Y ( aps_rename_506_ ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 INV_SOC_DIR ( .A ( aps_rename_506_ ) ,
|
||||
.Y ( SOC_DIR_N ) ) ;
|
||||
sky130_fd_sc_hd__ebufn_4 IN_PROTECT_GATE ( .A ( SOC_IN ) ,
|
||||
.TE_B ( SOC_DIR_N ) , .Z ( FPGA_IN ) ) ;
|
||||
sky130_fd_sc_hd__ebufn_4 OUT_PROTECT_GATE ( .A ( FPGA_OUT ) ,
|
||||
.TE_B ( BUF_net_70 ) , .Z ( SOC_OUT ) ) ;
|
||||
sky130_fd_sc_hd__inv_4 BINV_R_70 ( .A ( BUF_net_72 ) , .Y ( BUF_net_70 ) ) ;
|
||||
sky130_fd_sc_hd__inv_8 BINV_R_71 ( .A ( BUF_net_72 ) , .Y ( SOC_DIR ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 BINV_R_72 ( .A ( aps_rename_505_ ) ,
|
||||
.Y ( BUF_net_72 ) ) ;
|
||||
.TE_B ( BUF_net_74 ) , .Z ( SOC_OUT ) ) ;
|
||||
sky130_fd_sc_hd__inv_8 BINV_R_73 ( .A ( BUF_net_76 ) , .Y ( SOC_DIR ) ) ;
|
||||
sky130_fd_sc_hd__inv_4 BINV_R_74 ( .A ( BUF_net_76 ) , .Y ( BUF_net_74 ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 BINV_R_76 ( .A ( aps_rename_506_ ) ,
|
||||
.Y ( BUF_net_76 ) ) ;
|
||||
endmodule
|
||||
|
||||
|
||||
|
|
@ -757,13 +752,17 @@ input FPGA_DIR ;
|
|||
input IO_ISOL_N ;
|
||||
|
||||
sky130_fd_sc_hd__nand2b_1 ISOL_EN_GATE ( .A_N ( FPGA_DIR ) ,
|
||||
.B ( IO_ISOL_N ) , .Y ( net_net_69 ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 INV_SOC_DIR ( .A ( SOC_DIR ) , .Y ( SOC_DIR_N ) ) ;
|
||||
.B ( IO_ISOL_N ) , .Y ( aps_rename_505_ ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 INV_SOC_DIR ( .A ( aps_rename_505_ ) ,
|
||||
.Y ( SOC_DIR_N ) ) ;
|
||||
sky130_fd_sc_hd__ebufn_4 IN_PROTECT_GATE ( .A ( SOC_IN ) ,
|
||||
.TE_B ( SOC_DIR_N ) , .Z ( FPGA_IN ) ) ;
|
||||
sky130_fd_sc_hd__ebufn_4 OUT_PROTECT_GATE ( .A ( FPGA_OUT ) ,
|
||||
.TE_B ( SOC_DIR ) , .Z ( SOC_OUT ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 BUFT_RR_69 ( .A ( net_net_69 ) , .X ( SOC_DIR ) ) ;
|
||||
.TE_B ( BUF_net_70 ) , .Z ( SOC_OUT ) ) ;
|
||||
sky130_fd_sc_hd__inv_8 BINV_R_69 ( .A ( BUF_net_72 ) , .Y ( SOC_DIR ) ) ;
|
||||
sky130_fd_sc_hd__inv_4 BINV_R_70 ( .A ( BUF_net_72 ) , .Y ( BUF_net_70 ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 BINV_R_72 ( .A ( aps_rename_505_ ) ,
|
||||
.Y ( BUF_net_72 ) ) ;
|
||||
endmodule
|
||||
|
||||
|
||||
|
|
@ -978,7 +977,7 @@ input [0:0] ccff_head ;
|
|||
output [0:0] ccff_tail ;
|
||||
output [0:3] mem_out ;
|
||||
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ccff_head[0] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ropt_net_136 ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[0] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_1_ ( .D ( mem_out[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[1] ) ) ;
|
||||
|
|
@ -987,6 +986,20 @@ sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_2_ ( .D ( mem_out[1] ) ,
|
|||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_3_ ( .D ( mem_out[2] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[3] ) ) ;
|
||||
sky130_fd_sc_hd__buf_1 FTB_1__0 ( .A ( mem_out[3] ) , .X ( ccff_tail[0] ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1339 ( .A ( ccff_head[0] ) ,
|
||||
.X ( copt_net_116 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1340 ( .A ( copt_net_116 ) ,
|
||||
.X ( copt_net_117 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1341 ( .A ( copt_net_117 ) ,
|
||||
.X ( copt_net_118 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1342 ( .A ( copt_net_118 ) ,
|
||||
.X ( copt_net_119 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1343 ( .A ( copt_net_119 ) ,
|
||||
.X ( copt_net_120 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1344 ( .A ( copt_net_120 ) ,
|
||||
.X ( copt_net_121 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 ropt_h_inst_1357 ( .A ( copt_net_121 ) ,
|
||||
.X ( ropt_net_136 ) ) ;
|
||||
endmodule
|
||||
|
||||
|
||||
|
|
@ -1114,6 +1127,8 @@ wire [0:0] sky130_fd_sc_hd__mux2_1_7_X ;
|
|||
wire [0:0] sky130_fd_sc_hd__mux2_1_8_X ;
|
||||
wire [0:0] sky130_fd_sc_hd__mux2_1_9_X ;
|
||||
|
||||
sky130_fd_sc_hd__buf_6 sky130_fd_sc_hd__buf_4_0_ (
|
||||
.A ( sky130_fd_sc_hd__mux2_1_9_X[0] ) , .X ( out[0] ) ) ;
|
||||
sky130_fd_sc_hd__mux2_1 mux_l1_in_0_ ( .A0 ( in[1] ) , .A1 ( in[0] ) ,
|
||||
.S ( sram[0] ) , .X ( sky130_fd_sc_hd__mux2_1_0_X[0] ) ) ;
|
||||
sky130_fd_sc_hd__mux2_1 mux_l1_in_1_ ( .A0 ( in[3] ) , .A1 ( in[2] ) ,
|
||||
|
|
@ -1143,8 +1158,6 @@ sky130_fd_sc_hd__mux2_1 mux_l4_in_0_ (
|
|||
.A0 ( sky130_fd_sc_hd__mux2_1_8_X[0] ) ,
|
||||
.A1 ( sky130_fd_sc_hd__mux2_1_7_X[0] ) , .S ( sram[3] ) ,
|
||||
.X ( sky130_fd_sc_hd__mux2_1_9_X[0] ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 BUFT_RR_101 ( .A ( sky130_fd_sc_hd__mux2_1_9_X[0] ) ,
|
||||
.X ( out[0] ) ) ;
|
||||
endmodule
|
||||
|
||||
|
||||
|
|
@ -1195,9 +1208,9 @@ sky130_fd_sc_hd__mux2_1 mux_l4_in_0_ (
|
|||
.A0 ( sky130_fd_sc_hd__mux2_1_8_X[0] ) ,
|
||||
.A1 ( sky130_fd_sc_hd__mux2_1_7_X[0] ) , .S ( sram[3] ) ,
|
||||
.X ( sky130_fd_sc_hd__mux2_1_9_X[0] ) ) ;
|
||||
sky130_fd_sc_hd__inv_8 BINV_R_99 ( .A ( BUF_net_100 ) , .Y ( out[0] ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 BINV_R_100 ( .A ( sky130_fd_sc_hd__mux2_1_9_X[0] ) ,
|
||||
.Y ( BUF_net_100 ) ) ;
|
||||
sky130_fd_sc_hd__inv_8 BINV_R_100 ( .A ( BUF_net_101 ) , .Y ( out[0] ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 BINV_R_101 ( .A ( sky130_fd_sc_hd__mux2_1_9_X[0] ) ,
|
||||
.Y ( BUF_net_101 ) ) ;
|
||||
endmodule
|
||||
|
||||
|
||||
|
|
@ -1248,7 +1261,7 @@ sky130_fd_sc_hd__mux2_1 mux_l4_in_0_ (
|
|||
.A0 ( sky130_fd_sc_hd__mux2_1_8_X[0] ) ,
|
||||
.A1 ( sky130_fd_sc_hd__mux2_1_7_X[0] ) , .S ( sram[3] ) ,
|
||||
.X ( sky130_fd_sc_hd__mux2_1_9_X[0] ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 BUFT_RR_98 ( .A ( sky130_fd_sc_hd__mux2_1_9_X[0] ) ,
|
||||
sky130_fd_sc_hd__buf_6 BUFT_RR_99 ( .A ( sky130_fd_sc_hd__mux2_1_9_X[0] ) ,
|
||||
.X ( out[0] ) ) ;
|
||||
endmodule
|
||||
|
||||
|
|
@ -1300,9 +1313,9 @@ sky130_fd_sc_hd__mux2_1 mux_l4_in_0_ (
|
|||
.A0 ( sky130_fd_sc_hd__mux2_1_8_X[0] ) ,
|
||||
.A1 ( sky130_fd_sc_hd__mux2_1_7_X[0] ) , .S ( sram[3] ) ,
|
||||
.X ( sky130_fd_sc_hd__mux2_1_9_X[0] ) ) ;
|
||||
sky130_fd_sc_hd__inv_8 BINV_R_96 ( .A ( BUF_net_97 ) , .Y ( out[0] ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 BINV_R_97 ( .A ( sky130_fd_sc_hd__mux2_1_9_X[0] ) ,
|
||||
.Y ( BUF_net_97 ) ) ;
|
||||
sky130_fd_sc_hd__inv_8 BINV_R_97 ( .A ( BUF_net_98 ) , .Y ( out[0] ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 BINV_R_98 ( .A ( sky130_fd_sc_hd__mux2_1_9_X[0] ) ,
|
||||
.Y ( BUF_net_98 ) ) ;
|
||||
endmodule
|
||||
|
||||
|
||||
|
|
@ -1353,9 +1366,9 @@ sky130_fd_sc_hd__mux2_1 mux_l4_in_0_ (
|
|||
.A0 ( sky130_fd_sc_hd__mux2_1_8_X[0] ) ,
|
||||
.A1 ( sky130_fd_sc_hd__mux2_1_7_X[0] ) , .S ( sram[3] ) ,
|
||||
.X ( sky130_fd_sc_hd__mux2_1_9_X[0] ) ) ;
|
||||
sky130_fd_sc_hd__inv_8 BINV_R_94 ( .A ( BUF_net_95 ) , .Y ( out[0] ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 BINV_R_95 ( .A ( sky130_fd_sc_hd__mux2_1_9_X[0] ) ,
|
||||
.Y ( BUF_net_95 ) ) ;
|
||||
sky130_fd_sc_hd__inv_8 BINV_R_95 ( .A ( BUF_net_96 ) , .Y ( out[0] ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 BINV_R_96 ( .A ( sky130_fd_sc_hd__mux2_1_9_X[0] ) ,
|
||||
.Y ( BUF_net_96 ) ) ;
|
||||
endmodule
|
||||
|
||||
|
||||
|
|
@ -1406,9 +1419,8 @@ sky130_fd_sc_hd__mux2_1 mux_l4_in_0_ (
|
|||
.A0 ( sky130_fd_sc_hd__mux2_1_8_X[0] ) ,
|
||||
.A1 ( sky130_fd_sc_hd__mux2_1_7_X[0] ) , .S ( sram[3] ) ,
|
||||
.X ( sky130_fd_sc_hd__mux2_1_9_X[0] ) ) ;
|
||||
sky130_fd_sc_hd__inv_8 BINV_R_92 ( .A ( BUF_net_93 ) , .Y ( out[0] ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 BINV_R_93 ( .A ( sky130_fd_sc_hd__mux2_1_9_X[0] ) ,
|
||||
.Y ( BUF_net_93 ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 BUFT_RR_94 ( .A ( sky130_fd_sc_hd__mux2_1_9_X[0] ) ,
|
||||
.X ( out[0] ) ) ;
|
||||
endmodule
|
||||
|
||||
|
||||
|
|
@ -1459,7 +1471,7 @@ sky130_fd_sc_hd__mux2_1 mux_l4_in_0_ (
|
|||
.A0 ( sky130_fd_sc_hd__mux2_1_8_X[0] ) ,
|
||||
.A1 ( sky130_fd_sc_hd__mux2_1_7_X[0] ) , .S ( sram[3] ) ,
|
||||
.X ( sky130_fd_sc_hd__mux2_1_9_X[0] ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 BUFT_RR_91 ( .A ( sky130_fd_sc_hd__mux2_1_9_X[0] ) ,
|
||||
sky130_fd_sc_hd__buf_6 BUFT_RR_93 ( .A ( sky130_fd_sc_hd__mux2_1_9_X[0] ) ,
|
||||
.X ( out[0] ) ) ;
|
||||
endmodule
|
||||
|
||||
|
|
@ -1577,7 +1589,7 @@ cbx_1__0__mux_tree_tapbuf_size10_0 mux_top_ipin_0 (
|
|||
.sram ( mux_tree_tapbuf_size10_0_sram ) ,
|
||||
.sram_inv ( { SYNOPSYS_UNCONNECTED_1 , SYNOPSYS_UNCONNECTED_2 ,
|
||||
SYNOPSYS_UNCONNECTED_3 , SYNOPSYS_UNCONNECTED_4 } ) ,
|
||||
.out ( bottom_grid_pin_0_ ) , .p0 ( optlc_net_114 ) ) ;
|
||||
.out ( bottom_grid_pin_0_ ) , .p0 ( optlc_net_112 ) ) ;
|
||||
cbx_1__0__mux_tree_tapbuf_size10_1 mux_top_ipin_1 (
|
||||
.in ( { chanx_right_out[1] , chanx_left_out[1] , chanx_right_out[3] ,
|
||||
chanx_left_out[3] , chanx_right_out[5] , chanx_left_out[5] ,
|
||||
|
|
@ -1586,7 +1598,7 @@ cbx_1__0__mux_tree_tapbuf_size10_1 mux_top_ipin_1 (
|
|||
.sram ( mux_tree_tapbuf_size10_1_sram ) ,
|
||||
.sram_inv ( { SYNOPSYS_UNCONNECTED_5 , SYNOPSYS_UNCONNECTED_6 ,
|
||||
SYNOPSYS_UNCONNECTED_7 , SYNOPSYS_UNCONNECTED_8 } ) ,
|
||||
.out ( bottom_grid_pin_2_ ) , .p0 ( optlc_net_114 ) ) ;
|
||||
.out ( bottom_grid_pin_2_ ) , .p0 ( optlc_net_112 ) ) ;
|
||||
cbx_1__0__mux_tree_tapbuf_size10_2 mux_top_ipin_2 (
|
||||
.in ( { chanx_right_out[0] , chanx_left_out[0] , chanx_right_out[2] ,
|
||||
chanx_left_out[2] , chanx_right_out[6] , chanx_left_out[6] ,
|
||||
|
|
@ -1595,7 +1607,7 @@ cbx_1__0__mux_tree_tapbuf_size10_2 mux_top_ipin_2 (
|
|||
.sram ( mux_tree_tapbuf_size10_2_sram ) ,
|
||||
.sram_inv ( { SYNOPSYS_UNCONNECTED_9 , SYNOPSYS_UNCONNECTED_10 ,
|
||||
SYNOPSYS_UNCONNECTED_11 , SYNOPSYS_UNCONNECTED_12 } ) ,
|
||||
.out ( bottom_grid_pin_4_ ) , .p0 ( optlc_net_115 ) ) ;
|
||||
.out ( bottom_grid_pin_4_ ) , .p0 ( optlc_net_113 ) ) ;
|
||||
cbx_1__0__mux_tree_tapbuf_size10_3 mux_top_ipin_3 (
|
||||
.in ( { chanx_right_out[1] , chanx_left_out[1] , chanx_right_out[3] ,
|
||||
chanx_left_out[3] , chanx_right_out[7] , chanx_left_out[7] ,
|
||||
|
|
@ -1604,7 +1616,7 @@ cbx_1__0__mux_tree_tapbuf_size10_3 mux_top_ipin_3 (
|
|||
.sram ( mux_tree_tapbuf_size10_3_sram ) ,
|
||||
.sram_inv ( { SYNOPSYS_UNCONNECTED_13 , SYNOPSYS_UNCONNECTED_14 ,
|
||||
SYNOPSYS_UNCONNECTED_15 , SYNOPSYS_UNCONNECTED_16 } ) ,
|
||||
.out ( bottom_grid_pin_6_ ) , .p0 ( optlc_net_115 ) ) ;
|
||||
.out ( bottom_grid_pin_6_ ) , .p0 ( optlc_net_114 ) ) ;
|
||||
cbx_1__0__mux_tree_tapbuf_size10_4 mux_top_ipin_4 (
|
||||
.in ( { chanx_right_out[0] , chanx_left_out[0] , chanx_right_out[2] ,
|
||||
chanx_left_out[2] , chanx_right_out[4] , chanx_left_out[4] ,
|
||||
|
|
@ -1613,7 +1625,7 @@ cbx_1__0__mux_tree_tapbuf_size10_4 mux_top_ipin_4 (
|
|||
.sram ( mux_tree_tapbuf_size10_4_sram ) ,
|
||||
.sram_inv ( { SYNOPSYS_UNCONNECTED_17 , SYNOPSYS_UNCONNECTED_18 ,
|
||||
SYNOPSYS_UNCONNECTED_19 , SYNOPSYS_UNCONNECTED_20 } ) ,
|
||||
.out ( bottom_grid_pin_8_ ) , .p0 ( optlc_net_116 ) ) ;
|
||||
.out ( bottom_grid_pin_8_ ) , .p0 ( optlc_net_114 ) ) ;
|
||||
cbx_1__0__mux_tree_tapbuf_size10_5 mux_top_ipin_5 (
|
||||
.in ( { chanx_right_out[1] , chanx_left_out[1] , chanx_right_out[3] ,
|
||||
chanx_left_out[3] , chanx_right_out[5] , chanx_left_out[5] ,
|
||||
|
|
@ -1622,7 +1634,7 @@ cbx_1__0__mux_tree_tapbuf_size10_5 mux_top_ipin_5 (
|
|||
.sram ( mux_tree_tapbuf_size10_5_sram ) ,
|
||||
.sram_inv ( { SYNOPSYS_UNCONNECTED_21 , SYNOPSYS_UNCONNECTED_22 ,
|
||||
SYNOPSYS_UNCONNECTED_23 , SYNOPSYS_UNCONNECTED_24 } ) ,
|
||||
.out ( bottom_grid_pin_10_ ) , .p0 ( optlc_net_116 ) ) ;
|
||||
.out ( bottom_grid_pin_10_ ) , .p0 ( optlc_net_114 ) ) ;
|
||||
cbx_1__0__mux_tree_tapbuf_size10_6 mux_top_ipin_6 (
|
||||
.in ( { chanx_right_out[0] , chanx_left_out[0] , chanx_right_out[2] ,
|
||||
chanx_left_out[2] , chanx_right_out[6] , chanx_left_out[6] ,
|
||||
|
|
@ -1631,7 +1643,7 @@ cbx_1__0__mux_tree_tapbuf_size10_6 mux_top_ipin_6 (
|
|||
.sram ( mux_tree_tapbuf_size10_6_sram ) ,
|
||||
.sram_inv ( { SYNOPSYS_UNCONNECTED_25 , SYNOPSYS_UNCONNECTED_26 ,
|
||||
SYNOPSYS_UNCONNECTED_27 , SYNOPSYS_UNCONNECTED_28 } ) ,
|
||||
.out ( bottom_grid_pin_12_ ) , .p0 ( optlc_net_114 ) ) ;
|
||||
.out ( bottom_grid_pin_12_ ) , .p0 ( optlc_net_112 ) ) ;
|
||||
cbx_1__0__mux_tree_tapbuf_size10_7 mux_top_ipin_7 (
|
||||
.in ( { chanx_right_out[1] , chanx_left_out[1] , chanx_right_out[3] ,
|
||||
chanx_left_out[3] , chanx_right_out[7] , chanx_left_out[7] ,
|
||||
|
|
@ -1640,7 +1652,7 @@ cbx_1__0__mux_tree_tapbuf_size10_7 mux_top_ipin_7 (
|
|||
.sram ( mux_tree_tapbuf_size10_7_sram ) ,
|
||||
.sram_inv ( { SYNOPSYS_UNCONNECTED_29 , SYNOPSYS_UNCONNECTED_30 ,
|
||||
SYNOPSYS_UNCONNECTED_31 , SYNOPSYS_UNCONNECTED_32 } ) ,
|
||||
.out ( bottom_grid_pin_14_ ) , .p0 ( optlc_net_114 ) ) ;
|
||||
.out ( bottom_grid_pin_14_ ) , .p0 ( optlc_net_112 ) ) ;
|
||||
cbx_1__0__mux_tree_tapbuf_size10 mux_top_ipin_8 (
|
||||
.in ( { chanx_right_out[0] , chanx_left_out[0] , chanx_right_out[2] ,
|
||||
chanx_left_out[2] , chanx_right_out[8] , chanx_left_out[8] ,
|
||||
|
|
@ -1649,7 +1661,7 @@ cbx_1__0__mux_tree_tapbuf_size10 mux_top_ipin_8 (
|
|||
.sram ( mux_tree_tapbuf_size10_8_sram ) ,
|
||||
.sram_inv ( { SYNOPSYS_UNCONNECTED_33 , SYNOPSYS_UNCONNECTED_34 ,
|
||||
SYNOPSYS_UNCONNECTED_35 , SYNOPSYS_UNCONNECTED_36 } ) ,
|
||||
.out ( bottom_grid_pin_16_ ) , .p0 ( optlc_net_115 ) ) ;
|
||||
.out ( bottom_grid_pin_16_ ) , .p0 ( optlc_net_113 ) ) ;
|
||||
cbx_1__0__mux_tree_tapbuf_size10_mem_0 mem_top_ipin_0 (
|
||||
.prog_clk ( prog_clk ) , .ccff_head ( ccff_head ) ,
|
||||
.ccff_tail ( mux_tree_tapbuf_size10_mem_0_ccff_tail ) ,
|
||||
|
|
@ -1715,12 +1727,12 @@ cbx_1__0__logical_tile_io_mode_io__2 logical_tile_io_mode_io__2 (
|
|||
.IO_ISOL_N ( IO_ISOL_N ) , .prog_clk ( prog_clk ) ,
|
||||
.gfpga_pad_EMBEDDED_IO_HD_SOC_IN ( gfpga_pad_EMBEDDED_IO_HD_SOC_IN[2] ) ,
|
||||
.gfpga_pad_EMBEDDED_IO_HD_SOC_OUT ( gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[2] ) ,
|
||||
.gfpga_pad_EMBEDDED_IO_HD_SOC_DIR ( { aps_rename_512_ } ) ,
|
||||
.gfpga_pad_EMBEDDED_IO_HD_SOC_DIR ( { aps_rename_511_ } ) ,
|
||||
.io_outpad ( top_width_0_height_0__pin_4_ ) ,
|
||||
.ccff_head ( logical_tile_io_mode_io__1_ccff_tail ) ,
|
||||
.io_inpad ( top_width_0_height_0__pin_5_lower ) ,
|
||||
.ccff_tail ( logical_tile_io_mode_io__2_ccff_tail ) ,
|
||||
.ZBUF_184_0 ( gfpga_pad_EMBEDDED_IO_HD_SOC_DIR[2] ) ) ;
|
||||
.ZBUF_211_0 ( gfpga_pad_EMBEDDED_IO_HD_SOC_DIR[2] ) ) ;
|
||||
cbx_1__0__logical_tile_io_mode_io__3 logical_tile_io_mode_io__3 (
|
||||
.IO_ISOL_N ( IO_ISOL_N ) , .prog_clk ( prog_clk ) ,
|
||||
.gfpga_pad_EMBEDDED_IO_HD_SOC_IN ( gfpga_pad_EMBEDDED_IO_HD_SOC_IN[3] ) ,
|
||||
|
|
@ -1775,10 +1787,10 @@ cbx_1__0__logical_tile_io_mode_io_ logical_tile_io_mode_io__8 (
|
|||
.ccff_head ( logical_tile_io_mode_io__7_ccff_tail ) ,
|
||||
.io_inpad ( top_width_0_height_0__pin_17_lower ) ,
|
||||
.ccff_tail ( ccff_tail ) ) ;
|
||||
sky130_fd_sc_hd__buf_16 prog_clk_0_FTB00 ( .A ( prog_clk_0_N_in ) ,
|
||||
sky130_fd_sc_hd__buf_1 prog_clk_0_FTB00 ( .A ( prog_clk_0_N_in ) ,
|
||||
.X ( prog_clk[0] ) ) ;
|
||||
sky130_fd_sc_hd__clkbuf_1 prog_clk_0_W_FTB01 ( .A ( prog_clk_0_N_in ) ,
|
||||
.X ( ctsbuf_net_1117 ) ) ;
|
||||
.X ( ctsbuf_net_1115 ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 FTB_19__18 ( .A ( chanx_left_in[0] ) ,
|
||||
.X ( chanx_right_out[0] ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 FTB_20__19 ( .A ( chanx_left_in[1] ) ,
|
||||
|
|
@ -1888,15 +1900,15 @@ sky130_fd_sc_hd__buf_6 FTB_67__66 (
|
|||
.X ( top_width_0_height_0__pin_17_upper[0] ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 FTB_68__67 ( .A ( SC_IN_TOP ) , .X ( SC_OUT_BOT ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 FTB_69__68 ( .A ( SC_IN_BOT ) , .X ( SC_OUT_TOP ) ) ;
|
||||
sky130_fd_sc_hd__conb_1 optlc_116 ( .LO ( SYNOPSYS_UNCONNECTED_37 ) ,
|
||||
sky130_fd_sc_hd__conb_1 optlc_114 ( .LO ( SYNOPSYS_UNCONNECTED_37 ) ,
|
||||
.HI ( optlc_net_112 ) ) ;
|
||||
sky130_fd_sc_hd__conb_1 optlc_116 ( .LO ( SYNOPSYS_UNCONNECTED_38 ) ,
|
||||
.HI ( optlc_net_113 ) ) ;
|
||||
sky130_fd_sc_hd__conb_1 optlc_118 ( .LO ( SYNOPSYS_UNCONNECTED_39 ) ,
|
||||
.HI ( optlc_net_114 ) ) ;
|
||||
sky130_fd_sc_hd__conb_1 optlc_118 ( .LO ( SYNOPSYS_UNCONNECTED_38 ) ,
|
||||
.HI ( optlc_net_115 ) ) ;
|
||||
sky130_fd_sc_hd__conb_1 optlc_120 ( .LO ( SYNOPSYS_UNCONNECTED_39 ) ,
|
||||
.HI ( optlc_net_116 ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 ZBUF_184_inst_121 ( .A ( aps_rename_512_ ) ,
|
||||
sky130_fd_sc_hd__buf_6 ZBUF_211_inst_119 ( .A ( aps_rename_511_ ) ,
|
||||
.X ( gfpga_pad_EMBEDDED_IO_HD_SOC_DIR[2] ) ) ;
|
||||
sky130_fd_sc_hd__clkbuf_8 cts_buf_3521248 ( .A ( ctsbuf_net_1117 ) ,
|
||||
sky130_fd_sc_hd__clkbuf_8 cts_buf_3521246 ( .A ( ctsbuf_net_1115 ) ,
|
||||
.X ( prog_clk_0_W_out ) ) ;
|
||||
endmodule
|
||||
|
||||
|
|
|
|||
|
|
@ -117,7 +117,7 @@ cbx_1__0__mux_tree_tapbuf_size10_0 mux_top_ipin_0 (
|
|||
.sram ( mux_tree_tapbuf_size10_0_sram ) ,
|
||||
.sram_inv ( { SYNOPSYS_UNCONNECTED_1 , SYNOPSYS_UNCONNECTED_2 ,
|
||||
SYNOPSYS_UNCONNECTED_3 , SYNOPSYS_UNCONNECTED_4 } ) ,
|
||||
.out ( bottom_grid_pin_0_ ) , .p0 ( optlc_net_114 ) ) ;
|
||||
.out ( bottom_grid_pin_0_ ) , .p0 ( optlc_net_112 ) ) ;
|
||||
cbx_1__0__mux_tree_tapbuf_size10_1 mux_top_ipin_1 (
|
||||
.in ( { chanx_right_out[1] , chanx_left_out[1] , chanx_right_out[3] ,
|
||||
chanx_left_out[3] , chanx_right_out[5] , chanx_left_out[5] ,
|
||||
|
|
@ -126,7 +126,7 @@ cbx_1__0__mux_tree_tapbuf_size10_1 mux_top_ipin_1 (
|
|||
.sram ( mux_tree_tapbuf_size10_1_sram ) ,
|
||||
.sram_inv ( { SYNOPSYS_UNCONNECTED_5 , SYNOPSYS_UNCONNECTED_6 ,
|
||||
SYNOPSYS_UNCONNECTED_7 , SYNOPSYS_UNCONNECTED_8 } ) ,
|
||||
.out ( bottom_grid_pin_2_ ) , .p0 ( optlc_net_114 ) ) ;
|
||||
.out ( bottom_grid_pin_2_ ) , .p0 ( optlc_net_112 ) ) ;
|
||||
cbx_1__0__mux_tree_tapbuf_size10_2 mux_top_ipin_2 (
|
||||
.in ( { chanx_right_out[0] , chanx_left_out[0] , chanx_right_out[2] ,
|
||||
chanx_left_out[2] , chanx_right_out[6] , chanx_left_out[6] ,
|
||||
|
|
@ -135,7 +135,7 @@ cbx_1__0__mux_tree_tapbuf_size10_2 mux_top_ipin_2 (
|
|||
.sram ( mux_tree_tapbuf_size10_2_sram ) ,
|
||||
.sram_inv ( { SYNOPSYS_UNCONNECTED_9 , SYNOPSYS_UNCONNECTED_10 ,
|
||||
SYNOPSYS_UNCONNECTED_11 , SYNOPSYS_UNCONNECTED_12 } ) ,
|
||||
.out ( bottom_grid_pin_4_ ) , .p0 ( optlc_net_115 ) ) ;
|
||||
.out ( bottom_grid_pin_4_ ) , .p0 ( optlc_net_113 ) ) ;
|
||||
cbx_1__0__mux_tree_tapbuf_size10_3 mux_top_ipin_3 (
|
||||
.in ( { chanx_right_out[1] , chanx_left_out[1] , chanx_right_out[3] ,
|
||||
chanx_left_out[3] , chanx_right_out[7] , chanx_left_out[7] ,
|
||||
|
|
@ -144,7 +144,7 @@ cbx_1__0__mux_tree_tapbuf_size10_3 mux_top_ipin_3 (
|
|||
.sram ( mux_tree_tapbuf_size10_3_sram ) ,
|
||||
.sram_inv ( { SYNOPSYS_UNCONNECTED_13 , SYNOPSYS_UNCONNECTED_14 ,
|
||||
SYNOPSYS_UNCONNECTED_15 , SYNOPSYS_UNCONNECTED_16 } ) ,
|
||||
.out ( bottom_grid_pin_6_ ) , .p0 ( optlc_net_115 ) ) ;
|
||||
.out ( bottom_grid_pin_6_ ) , .p0 ( optlc_net_114 ) ) ;
|
||||
cbx_1__0__mux_tree_tapbuf_size10_4 mux_top_ipin_4 (
|
||||
.in ( { chanx_right_out[0] , chanx_left_out[0] , chanx_right_out[2] ,
|
||||
chanx_left_out[2] , chanx_right_out[4] , chanx_left_out[4] ,
|
||||
|
|
@ -153,7 +153,7 @@ cbx_1__0__mux_tree_tapbuf_size10_4 mux_top_ipin_4 (
|
|||
.sram ( mux_tree_tapbuf_size10_4_sram ) ,
|
||||
.sram_inv ( { SYNOPSYS_UNCONNECTED_17 , SYNOPSYS_UNCONNECTED_18 ,
|
||||
SYNOPSYS_UNCONNECTED_19 , SYNOPSYS_UNCONNECTED_20 } ) ,
|
||||
.out ( bottom_grid_pin_8_ ) , .p0 ( optlc_net_116 ) ) ;
|
||||
.out ( bottom_grid_pin_8_ ) , .p0 ( optlc_net_114 ) ) ;
|
||||
cbx_1__0__mux_tree_tapbuf_size10_5 mux_top_ipin_5 (
|
||||
.in ( { chanx_right_out[1] , chanx_left_out[1] , chanx_right_out[3] ,
|
||||
chanx_left_out[3] , chanx_right_out[5] , chanx_left_out[5] ,
|
||||
|
|
@ -162,7 +162,7 @@ cbx_1__0__mux_tree_tapbuf_size10_5 mux_top_ipin_5 (
|
|||
.sram ( mux_tree_tapbuf_size10_5_sram ) ,
|
||||
.sram_inv ( { SYNOPSYS_UNCONNECTED_21 , SYNOPSYS_UNCONNECTED_22 ,
|
||||
SYNOPSYS_UNCONNECTED_23 , SYNOPSYS_UNCONNECTED_24 } ) ,
|
||||
.out ( bottom_grid_pin_10_ ) , .p0 ( optlc_net_116 ) ) ;
|
||||
.out ( bottom_grid_pin_10_ ) , .p0 ( optlc_net_114 ) ) ;
|
||||
cbx_1__0__mux_tree_tapbuf_size10_6 mux_top_ipin_6 (
|
||||
.in ( { chanx_right_out[0] , chanx_left_out[0] , chanx_right_out[2] ,
|
||||
chanx_left_out[2] , chanx_right_out[6] , chanx_left_out[6] ,
|
||||
|
|
@ -171,7 +171,7 @@ cbx_1__0__mux_tree_tapbuf_size10_6 mux_top_ipin_6 (
|
|||
.sram ( mux_tree_tapbuf_size10_6_sram ) ,
|
||||
.sram_inv ( { SYNOPSYS_UNCONNECTED_25 , SYNOPSYS_UNCONNECTED_26 ,
|
||||
SYNOPSYS_UNCONNECTED_27 , SYNOPSYS_UNCONNECTED_28 } ) ,
|
||||
.out ( bottom_grid_pin_12_ ) , .p0 ( optlc_net_114 ) ) ;
|
||||
.out ( bottom_grid_pin_12_ ) , .p0 ( optlc_net_112 ) ) ;
|
||||
cbx_1__0__mux_tree_tapbuf_size10_7 mux_top_ipin_7 (
|
||||
.in ( { chanx_right_out[1] , chanx_left_out[1] , chanx_right_out[3] ,
|
||||
chanx_left_out[3] , chanx_right_out[7] , chanx_left_out[7] ,
|
||||
|
|
@ -180,7 +180,7 @@ cbx_1__0__mux_tree_tapbuf_size10_7 mux_top_ipin_7 (
|
|||
.sram ( mux_tree_tapbuf_size10_7_sram ) ,
|
||||
.sram_inv ( { SYNOPSYS_UNCONNECTED_29 , SYNOPSYS_UNCONNECTED_30 ,
|
||||
SYNOPSYS_UNCONNECTED_31 , SYNOPSYS_UNCONNECTED_32 } ) ,
|
||||
.out ( bottom_grid_pin_14_ ) , .p0 ( optlc_net_114 ) ) ;
|
||||
.out ( bottom_grid_pin_14_ ) , .p0 ( optlc_net_112 ) ) ;
|
||||
cbx_1__0__mux_tree_tapbuf_size10 mux_top_ipin_8 (
|
||||
.in ( { chanx_right_out[0] , chanx_left_out[0] , chanx_right_out[2] ,
|
||||
chanx_left_out[2] , chanx_right_out[8] , chanx_left_out[8] ,
|
||||
|
|
@ -189,7 +189,7 @@ cbx_1__0__mux_tree_tapbuf_size10 mux_top_ipin_8 (
|
|||
.sram ( mux_tree_tapbuf_size10_8_sram ) ,
|
||||
.sram_inv ( { SYNOPSYS_UNCONNECTED_33 , SYNOPSYS_UNCONNECTED_34 ,
|
||||
SYNOPSYS_UNCONNECTED_35 , SYNOPSYS_UNCONNECTED_36 } ) ,
|
||||
.out ( bottom_grid_pin_16_ ) , .p0 ( optlc_net_115 ) ) ;
|
||||
.out ( bottom_grid_pin_16_ ) , .p0 ( optlc_net_113 ) ) ;
|
||||
cbx_1__0__mux_tree_tapbuf_size10_mem_0 mem_top_ipin_0 (
|
||||
.prog_clk ( prog_clk ) , .ccff_head ( ccff_head ) ,
|
||||
.ccff_tail ( mux_tree_tapbuf_size10_mem_0_ccff_tail ) ,
|
||||
|
|
@ -255,12 +255,12 @@ cbx_1__0__logical_tile_io_mode_io__2 logical_tile_io_mode_io__2 (
|
|||
.IO_ISOL_N ( IO_ISOL_N ) , .prog_clk ( prog_clk ) ,
|
||||
.gfpga_pad_EMBEDDED_IO_HD_SOC_IN ( gfpga_pad_EMBEDDED_IO_HD_SOC_IN[2] ) ,
|
||||
.gfpga_pad_EMBEDDED_IO_HD_SOC_OUT ( gfpga_pad_EMBEDDED_IO_HD_SOC_OUT[2] ) ,
|
||||
.gfpga_pad_EMBEDDED_IO_HD_SOC_DIR ( { aps_rename_512_ } ) ,
|
||||
.gfpga_pad_EMBEDDED_IO_HD_SOC_DIR ( { aps_rename_511_ } ) ,
|
||||
.io_outpad ( top_width_0_height_0__pin_4_ ) ,
|
||||
.ccff_head ( logical_tile_io_mode_io__1_ccff_tail ) ,
|
||||
.io_inpad ( top_width_0_height_0__pin_5_lower ) ,
|
||||
.ccff_tail ( logical_tile_io_mode_io__2_ccff_tail ) ,
|
||||
.ZBUF_184_0 ( gfpga_pad_EMBEDDED_IO_HD_SOC_DIR[2] ) ) ;
|
||||
.ZBUF_211_0 ( gfpga_pad_EMBEDDED_IO_HD_SOC_DIR[2] ) ) ;
|
||||
cbx_1__0__logical_tile_io_mode_io__3 logical_tile_io_mode_io__3 (
|
||||
.IO_ISOL_N ( IO_ISOL_N ) , .prog_clk ( prog_clk ) ,
|
||||
.gfpga_pad_EMBEDDED_IO_HD_SOC_IN ( gfpga_pad_EMBEDDED_IO_HD_SOC_IN[3] ) ,
|
||||
|
|
@ -315,10 +315,10 @@ cbx_1__0__logical_tile_io_mode_io_ logical_tile_io_mode_io__8 (
|
|||
.ccff_head ( logical_tile_io_mode_io__7_ccff_tail ) ,
|
||||
.io_inpad ( top_width_0_height_0__pin_17_lower ) ,
|
||||
.ccff_tail ( ccff_tail ) ) ;
|
||||
sky130_fd_sc_hd__buf_16 prog_clk_0_FTB00 ( .A ( prog_clk_0_N_in ) ,
|
||||
sky130_fd_sc_hd__buf_1 prog_clk_0_FTB00 ( .A ( prog_clk_0_N_in ) ,
|
||||
.X ( prog_clk[0] ) ) ;
|
||||
sky130_fd_sc_hd__clkbuf_1 prog_clk_0_W_FTB01 ( .A ( prog_clk_0_N_in ) ,
|
||||
.X ( ctsbuf_net_1117 ) ) ;
|
||||
.X ( ctsbuf_net_1115 ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 FTB_19__18 ( .A ( chanx_left_in[0] ) ,
|
||||
.X ( chanx_right_out[0] ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 FTB_20__19 ( .A ( chanx_left_in[1] ) ,
|
||||
|
|
@ -428,15 +428,15 @@ sky130_fd_sc_hd__buf_6 FTB_67__66 (
|
|||
.X ( top_width_0_height_0__pin_17_upper[0] ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 FTB_68__67 ( .A ( SC_IN_TOP ) , .X ( SC_OUT_BOT ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 FTB_69__68 ( .A ( SC_IN_BOT ) , .X ( SC_OUT_TOP ) ) ;
|
||||
sky130_fd_sc_hd__conb_1 optlc_116 ( .LO ( SYNOPSYS_UNCONNECTED_37 ) ,
|
||||
sky130_fd_sc_hd__conb_1 optlc_114 ( .LO ( SYNOPSYS_UNCONNECTED_37 ) ,
|
||||
.HI ( optlc_net_112 ) ) ;
|
||||
sky130_fd_sc_hd__conb_1 optlc_116 ( .LO ( SYNOPSYS_UNCONNECTED_38 ) ,
|
||||
.HI ( optlc_net_113 ) ) ;
|
||||
sky130_fd_sc_hd__conb_1 optlc_118 ( .LO ( SYNOPSYS_UNCONNECTED_39 ) ,
|
||||
.HI ( optlc_net_114 ) ) ;
|
||||
sky130_fd_sc_hd__conb_1 optlc_118 ( .LO ( SYNOPSYS_UNCONNECTED_38 ) ,
|
||||
.HI ( optlc_net_115 ) ) ;
|
||||
sky130_fd_sc_hd__conb_1 optlc_120 ( .LO ( SYNOPSYS_UNCONNECTED_39 ) ,
|
||||
.HI ( optlc_net_116 ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 ZBUF_184_inst_121 ( .A ( aps_rename_512_ ) ,
|
||||
sky130_fd_sc_hd__buf_6 ZBUF_211_inst_119 ( .A ( aps_rename_511_ ) ,
|
||||
.X ( gfpga_pad_EMBEDDED_IO_HD_SOC_DIR[2] ) ) ;
|
||||
sky130_fd_sc_hd__clkbuf_8 cts_buf_3521248 ( .A ( ctsbuf_net_1117 ) ,
|
||||
sky130_fd_sc_hd__clkbuf_8 cts_buf_3521246 ( .A ( ctsbuf_net_1115 ) ,
|
||||
.X ( prog_clk_0_W_out ) ) ;
|
||||
endmodule
|
||||
|
||||
|
|
|
|||
|
|
@ -13,11 +13,11 @@ output [0:3] mem_out ;
|
|||
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ccff_head[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[0] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_1_ ( .D ( mem_out[0] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_1_ ( .D ( mem_out[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[1] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_2_ ( .D ( mem_out[1] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_2_ ( .D ( mem_out[1] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[2] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_3_ ( .D ( mem_out[2] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_3_ ( .D ( mem_out[2] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[3] ) ) ;
|
||||
sky130_fd_sc_hd__buf_1 FTB_16__15 ( .A ( mem_out[3] ) , .X ( ccff_tail[0] ) ) ;
|
||||
endmodule
|
||||
|
|
@ -32,9 +32,9 @@ output [0:3] mem_out ;
|
|||
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ccff_head[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[0] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_1_ ( .D ( mem_out[0] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_1_ ( .D ( mem_out[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[1] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_2_ ( .D ( mem_out[1] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_2_ ( .D ( mem_out[1] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[2] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_3_ ( .D ( mem_out[2] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[3] ) ) ;
|
||||
|
|
@ -72,7 +72,7 @@ sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ccff_head[0] ) ,
|
|||
.CLK ( prog_clk[0] ) , .Q ( mem_out[0] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_1_ ( .D ( mem_out[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[1] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_2_ ( .D ( mem_out[1] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_2_ ( .D ( mem_out[1] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[2] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_3_ ( .D ( mem_out[2] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[3] ) ) ;
|
||||
|
|
@ -127,7 +127,7 @@ output [0:3] mem_out ;
|
|||
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ccff_head[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[0] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_1_ ( .D ( mem_out[0] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_1_ ( .D ( mem_out[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[1] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_2_ ( .D ( mem_out[1] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[2] ) ) ;
|
||||
|
|
@ -293,8 +293,6 @@ wire [0:0] sky130_fd_sc_hd__mux2_1_7_X ;
|
|||
|
||||
cbx_1__1__const1_13 const1_0_ (
|
||||
.const1 ( { SYNOPSYS_UNCONNECTED_1 } ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 sky130_fd_sc_hd__buf_4_0_ (
|
||||
.A ( sky130_fd_sc_hd__mux2_1_7_X[0] ) , .X ( out[0] ) ) ;
|
||||
sky130_fd_sc_hd__mux2_1 mux_l1_in_0_ ( .A0 ( in[1] ) , .A1 ( in[0] ) ,
|
||||
.S ( sram[0] ) , .X ( sky130_fd_sc_hd__mux2_1_0_X[0] ) ) ;
|
||||
sky130_fd_sc_hd__mux2_1 mux_l2_in_0_ ( .A0 ( in[2] ) ,
|
||||
|
|
@ -318,6 +316,8 @@ sky130_fd_sc_hd__mux2_1 mux_l4_in_0_ (
|
|||
.A0 ( sky130_fd_sc_hd__mux2_1_6_X[0] ) ,
|
||||
.A1 ( sky130_fd_sc_hd__mux2_1_5_X[0] ) , .S ( sram[3] ) ,
|
||||
.X ( sky130_fd_sc_hd__mux2_1_7_X[0] ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 BUFT_RR_66 ( .A ( sky130_fd_sc_hd__mux2_1_7_X[0] ) ,
|
||||
.X ( out[0] ) ) ;
|
||||
endmodule
|
||||
|
||||
|
||||
|
|
@ -371,7 +371,7 @@ sky130_fd_sc_hd__mux2_1 mux_l4_in_0_ (
|
|||
.A0 ( sky130_fd_sc_hd__mux2_1_6_X[0] ) ,
|
||||
.A1 ( sky130_fd_sc_hd__mux2_1_5_X[0] ) , .S ( sram[3] ) ,
|
||||
.X ( sky130_fd_sc_hd__mux2_1_7_X[0] ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 BUFT_RR_63 ( .A ( sky130_fd_sc_hd__mux2_1_7_X[0] ) ,
|
||||
sky130_fd_sc_hd__buf_6 BUFT_RR_65 ( .A ( sky130_fd_sc_hd__mux2_1_7_X[0] ) ,
|
||||
.X ( out[0] ) ) ;
|
||||
endmodule
|
||||
|
||||
|
|
@ -513,8 +513,6 @@ wire [0:0] sky130_fd_sc_hd__mux2_1_7_X ;
|
|||
|
||||
cbx_1__1__const1_9 const1_0_ (
|
||||
.const1 ( { SYNOPSYS_UNCONNECTED_1 } ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 sky130_fd_sc_hd__buf_4_0_ (
|
||||
.A ( sky130_fd_sc_hd__mux2_1_7_X[0] ) , .X ( out[0] ) ) ;
|
||||
sky130_fd_sc_hd__mux2_1 mux_l1_in_0_ ( .A0 ( in[1] ) , .A1 ( in[0] ) ,
|
||||
.S ( sram[0] ) , .X ( sky130_fd_sc_hd__mux2_1_0_X[0] ) ) ;
|
||||
sky130_fd_sc_hd__mux2_1 mux_l2_in_0_ ( .A0 ( in[2] ) ,
|
||||
|
|
@ -538,6 +536,8 @@ sky130_fd_sc_hd__mux2_1 mux_l4_in_0_ (
|
|||
.A0 ( sky130_fd_sc_hd__mux2_1_6_X[0] ) ,
|
||||
.A1 ( sky130_fd_sc_hd__mux2_1_5_X[0] ) , .S ( sram[3] ) ,
|
||||
.X ( sky130_fd_sc_hd__mux2_1_7_X[0] ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 BUFT_RR_64 ( .A ( sky130_fd_sc_hd__mux2_1_7_X[0] ) ,
|
||||
.X ( out[0] ) ) ;
|
||||
endmodule
|
||||
|
||||
|
||||
|
|
@ -591,7 +591,7 @@ sky130_fd_sc_hd__mux2_1 mux_l4_in_0_ (
|
|||
.A0 ( sky130_fd_sc_hd__mux2_1_6_X[0] ) ,
|
||||
.A1 ( sky130_fd_sc_hd__mux2_1_5_X[0] ) , .S ( sram[3] ) ,
|
||||
.X ( sky130_fd_sc_hd__mux2_1_7_X[0] ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 BUFT_RR_62 ( .A ( sky130_fd_sc_hd__mux2_1_7_X[0] ) ,
|
||||
sky130_fd_sc_hd__buf_6 BUFT_RR_63 ( .A ( sky130_fd_sc_hd__mux2_1_7_X[0] ) ,
|
||||
.X ( out[0] ) ) ;
|
||||
endmodule
|
||||
|
||||
|
|
@ -603,29 +603,25 @@ input [0:0] ccff_head ;
|
|||
output [0:0] ccff_tail ;
|
||||
output [0:3] mem_out ;
|
||||
|
||||
wire copt_net_81 ;
|
||||
wire copt_net_84 ;
|
||||
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ccff_head[0] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ccff_head[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[0] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_1_ ( .D ( mem_out[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[1] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_2_ ( .D ( mem_out[1] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[2] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_3_ ( .D ( mem_out[2] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( copt_net_81 ) ) ;
|
||||
sky130_fd_sc_hd__buf_4 FTB_8__7 ( .A ( copt_net_83 ) , .X ( ccff_tail[0] ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1303 ( .A ( copt_net_81 ) ,
|
||||
.X ( copt_net_80 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1304 ( .A ( copt_net_80 ) ,
|
||||
.X ( mem_out[3] ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1305 ( .A ( mem_out[3] ) ,
|
||||
.X ( copt_net_82 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1306 ( .A ( copt_net_84 ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( copt_net_84 ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 FTB_8__7 ( .A ( mem_out[3] ) , .X ( ccff_tail[0] ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1307 ( .A ( copt_net_87 ) ,
|
||||
.X ( copt_net_83 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1307 ( .A ( copt_net_85 ) ,
|
||||
.X ( copt_net_84 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1308 ( .A ( copt_net_82 ) ,
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1309 ( .A ( copt_net_83 ) ,
|
||||
.X ( copt_net_85 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1310 ( .A ( copt_net_85 ) ,
|
||||
.X ( mem_out[3] ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1311 ( .A ( copt_net_84 ) ,
|
||||
.X ( copt_net_87 ) ) ;
|
||||
endmodule
|
||||
|
||||
|
||||
|
|
@ -642,7 +638,7 @@ sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_1_ ( .D ( mem_out[0] ) ,
|
|||
.CLK ( prog_clk[0] ) , .Q ( mem_out[1] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_2_ ( .D ( mem_out[1] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[2] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_3_ ( .D ( mem_out[2] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_3_ ( .D ( mem_out[2] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[3] ) ) ;
|
||||
sky130_fd_sc_hd__buf_1 FTB_7__6 ( .A ( mem_out[3] ) , .X ( ccff_tail[0] ) ) ;
|
||||
endmodule
|
||||
|
|
@ -750,7 +746,7 @@ input [0:0] ccff_head ;
|
|||
output [0:0] ccff_tail ;
|
||||
output [0:3] mem_out ;
|
||||
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( copt_net_79 ) ,
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ropt_net_103 ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[0] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_1_ ( .D ( mem_out[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[1] ) ) ;
|
||||
|
|
@ -759,18 +755,22 @@ sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_2_ ( .D ( mem_out[1] ) ,
|
|||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_3_ ( .D ( mem_out[2] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[3] ) ) ;
|
||||
sky130_fd_sc_hd__buf_1 FTB_1__0 ( .A ( mem_out[3] ) , .X ( ccff_tail[0] ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1297 ( .A ( ccff_head[0] ) ,
|
||||
.X ( copt_net_74 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1298 ( .A ( copt_net_74 ) ,
|
||||
.X ( copt_net_75 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1299 ( .A ( copt_net_75 ) ,
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1300 ( .A ( copt_net_79 ) ,
|
||||
.X ( copt_net_76 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1300 ( .A ( copt_net_76 ) ,
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1301 ( .A ( copt_net_76 ) ,
|
||||
.X ( copt_net_77 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1301 ( .A ( copt_net_77 ) ,
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1302 ( .A ( copt_net_77 ) ,
|
||||
.X ( copt_net_78 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1302 ( .A ( copt_net_78 ) ,
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1303 ( .A ( ccff_head[0] ) ,
|
||||
.X ( copt_net_79 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1304 ( .A ( copt_net_78 ) ,
|
||||
.X ( copt_net_80 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1305 ( .A ( copt_net_80 ) ,
|
||||
.X ( copt_net_81 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 ropt_h_inst_1323 ( .A ( copt_net_81 ) ,
|
||||
.X ( ropt_net_102 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 ropt_h_inst_1324 ( .A ( ropt_net_102 ) ,
|
||||
.X ( ropt_net_103 ) ) ;
|
||||
endmodule
|
||||
|
||||
|
||||
|
|
@ -832,7 +832,7 @@ sky130_fd_sc_hd__mux2_1 mux_l4_in_0_ (
|
|||
.A0 ( sky130_fd_sc_hd__mux2_1_8_X[0] ) ,
|
||||
.A1 ( sky130_fd_sc_hd__mux2_1_7_X[0] ) , .S ( sram[3] ) ,
|
||||
.X ( sky130_fd_sc_hd__mux2_1_9_X[0] ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 BUFT_RR_61 ( .A ( sky130_fd_sc_hd__mux2_1_9_X[0] ) ,
|
||||
sky130_fd_sc_hd__buf_6 BUFT_RR_62 ( .A ( sky130_fd_sc_hd__mux2_1_9_X[0] ) ,
|
||||
.X ( out[0] ) ) ;
|
||||
endmodule
|
||||
|
||||
|
|
@ -866,8 +866,6 @@ wire [0:0] sky130_fd_sc_hd__mux2_1_9_X ;
|
|||
|
||||
cbx_1__1__const1_6 const1_0_ (
|
||||
.const1 ( { SYNOPSYS_UNCONNECTED_1 } ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 sky130_fd_sc_hd__buf_4_0_ (
|
||||
.A ( sky130_fd_sc_hd__mux2_1_9_X[0] ) , .X ( out[0] ) ) ;
|
||||
sky130_fd_sc_hd__mux2_1 mux_l1_in_0_ ( .A0 ( in[1] ) , .A1 ( in[0] ) ,
|
||||
.S ( sram[0] ) , .X ( sky130_fd_sc_hd__mux2_1_0_X[0] ) ) ;
|
||||
sky130_fd_sc_hd__mux2_1 mux_l1_in_1_ ( .A0 ( in[3] ) , .A1 ( in[2] ) ,
|
||||
|
|
@ -897,6 +895,8 @@ sky130_fd_sc_hd__mux2_1 mux_l4_in_0_ (
|
|||
.A0 ( sky130_fd_sc_hd__mux2_1_8_X[0] ) ,
|
||||
.A1 ( sky130_fd_sc_hd__mux2_1_7_X[0] ) , .S ( sram[3] ) ,
|
||||
.X ( sky130_fd_sc_hd__mux2_1_9_X[0] ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 BUFT_RR_61 ( .A ( sky130_fd_sc_hd__mux2_1_9_X[0] ) ,
|
||||
.X ( out[0] ) ) ;
|
||||
endmodule
|
||||
|
||||
|
||||
|
|
@ -1348,7 +1348,6 @@ input clk_3_E_in ;
|
|||
output clk_3_E_out ;
|
||||
output clk_3_W_out ;
|
||||
|
||||
wire ropt_net_94 ;
|
||||
wire [0:0] prog_clk ;
|
||||
wire prog_clk_0 ;
|
||||
wire [0:3] mux_tree_tapbuf_size10_0_sram ;
|
||||
|
|
@ -1408,7 +1407,7 @@ cbx_1__1__mux_tree_tapbuf_size10_1 mux_top_ipin_3 (
|
|||
.sram ( mux_tree_tapbuf_size10_1_sram ) ,
|
||||
.sram_inv ( { SYNOPSYS_UNCONNECTED_5 , SYNOPSYS_UNCONNECTED_6 ,
|
||||
SYNOPSYS_UNCONNECTED_7 , SYNOPSYS_UNCONNECTED_8 } ) ,
|
||||
.out ( bottom_grid_pin_3_ ) , .p0 ( optlc_net_71 ) ) ;
|
||||
.out ( bottom_grid_pin_3_ ) , .p0 ( optlc_net_74 ) ) ;
|
||||
cbx_1__1__mux_tree_tapbuf_size10_2 mux_top_ipin_4 (
|
||||
.in ( { chanx_right_out[0] , chanx_left_out[0] , chanx_right_out[2] ,
|
||||
chanx_left_out[2] , chanx_right_out[4] , chanx_left_out[4] ,
|
||||
|
|
@ -1417,7 +1416,7 @@ cbx_1__1__mux_tree_tapbuf_size10_2 mux_top_ipin_4 (
|
|||
.sram ( mux_tree_tapbuf_size10_2_sram ) ,
|
||||
.sram_inv ( { SYNOPSYS_UNCONNECTED_9 , SYNOPSYS_UNCONNECTED_10 ,
|
||||
SYNOPSYS_UNCONNECTED_11 , SYNOPSYS_UNCONNECTED_12 } ) ,
|
||||
.out ( bottom_grid_pin_4_ ) , .p0 ( optlc_net_69 ) ) ;
|
||||
.out ( bottom_grid_pin_4_ ) , .p0 ( optlc_net_72 ) ) ;
|
||||
cbx_1__1__mux_tree_tapbuf_size10_3 mux_top_ipin_7 (
|
||||
.in ( { chanx_right_out[1] , chanx_left_out[1] , chanx_right_out[3] ,
|
||||
chanx_left_out[3] , chanx_right_out[7] , chanx_left_out[7] ,
|
||||
|
|
@ -1426,7 +1425,7 @@ cbx_1__1__mux_tree_tapbuf_size10_3 mux_top_ipin_7 (
|
|||
.sram ( mux_tree_tapbuf_size10_3_sram ) ,
|
||||
.sram_inv ( { SYNOPSYS_UNCONNECTED_13 , SYNOPSYS_UNCONNECTED_14 ,
|
||||
SYNOPSYS_UNCONNECTED_15 , SYNOPSYS_UNCONNECTED_16 } ) ,
|
||||
.out ( bottom_grid_pin_7_ ) , .p0 ( optlc_net_71 ) ) ;
|
||||
.out ( bottom_grid_pin_7_ ) , .p0 ( optlc_net_74 ) ) ;
|
||||
cbx_1__1__mux_tree_tapbuf_size10_4 mux_top_ipin_8 (
|
||||
.in ( { chanx_right_out[0] , chanx_left_out[0] , chanx_right_out[2] ,
|
||||
chanx_left_out[2] , chanx_right_out[8] , chanx_left_out[8] ,
|
||||
|
|
@ -1444,7 +1443,7 @@ cbx_1__1__mux_tree_tapbuf_size10_5 mux_top_ipin_11 (
|
|||
.sram ( mux_tree_tapbuf_size10_5_sram ) ,
|
||||
.sram_inv ( { SYNOPSYS_UNCONNECTED_21 , SYNOPSYS_UNCONNECTED_22 ,
|
||||
SYNOPSYS_UNCONNECTED_23 , SYNOPSYS_UNCONNECTED_24 } ) ,
|
||||
.out ( bottom_grid_pin_11_ ) , .p0 ( optlc_net_70 ) ) ;
|
||||
.out ( bottom_grid_pin_11_ ) , .p0 ( optlc_net_73 ) ) ;
|
||||
cbx_1__1__mux_tree_tapbuf_size10_6 mux_top_ipin_12 (
|
||||
.in ( { chanx_right_out[0] , chanx_left_out[0] , chanx_right_out[2] ,
|
||||
chanx_left_out[2] , chanx_right_out[6] , chanx_left_out[6] ,
|
||||
|
|
@ -1462,7 +1461,7 @@ cbx_1__1__mux_tree_tapbuf_size10 mux_top_ipin_15 (
|
|||
.sram ( mux_tree_tapbuf_size10_7_sram ) ,
|
||||
.sram_inv ( { SYNOPSYS_UNCONNECTED_29 , SYNOPSYS_UNCONNECTED_30 ,
|
||||
SYNOPSYS_UNCONNECTED_31 , SYNOPSYS_UNCONNECTED_32 } ) ,
|
||||
.out ( bottom_grid_pin_15_ ) , .p0 ( optlc_net_70 ) ) ;
|
||||
.out ( bottom_grid_pin_15_ ) , .p0 ( optlc_net_73 ) ) ;
|
||||
cbx_1__1__mux_tree_tapbuf_size10_mem_0 mem_top_ipin_0 (
|
||||
.prog_clk ( prog_clk ) , .ccff_head ( ccff_head ) ,
|
||||
.ccff_tail ( mux_tree_tapbuf_size10_mem_0_ccff_tail ) ,
|
||||
|
|
@ -1499,9 +1498,8 @@ cbx_1__1__mux_tree_tapbuf_size10_mem_6 mem_top_ipin_12 (
|
|||
.mem_out ( mux_tree_tapbuf_size10_6_sram ) ) ;
|
||||
cbx_1__1__mux_tree_tapbuf_size10_mem mem_top_ipin_15 (
|
||||
.prog_clk ( prog_clk ) ,
|
||||
.ccff_head ( mux_tree_tapbuf_size8_mem_7_ccff_tail ) ,
|
||||
.ccff_tail ( { ropt_net_100 } ) ,
|
||||
.mem_out ( mux_tree_tapbuf_size10_7_sram ) ) ;
|
||||
.ccff_head ( mux_tree_tapbuf_size8_mem_7_ccff_tail ) ,
|
||||
.ccff_tail ( ccff_tail ) , .mem_out ( mux_tree_tapbuf_size10_7_sram ) ) ;
|
||||
cbx_1__1__mux_tree_tapbuf_size8_0 mux_top_ipin_1 (
|
||||
.in ( { chanx_right_out[1] , chanx_left_out[1] , chanx_right_out[3] ,
|
||||
chanx_left_out[3] , chanx_right_out[5] , chanx_left_out[5] ,
|
||||
|
|
@ -1509,7 +1507,7 @@ cbx_1__1__mux_tree_tapbuf_size8_0 mux_top_ipin_1 (
|
|||
.sram ( mux_tree_tapbuf_size8_0_sram ) ,
|
||||
.sram_inv ( { SYNOPSYS_UNCONNECTED_33 , SYNOPSYS_UNCONNECTED_34 ,
|
||||
SYNOPSYS_UNCONNECTED_35 , SYNOPSYS_UNCONNECTED_36 } ) ,
|
||||
.out ( bottom_grid_pin_1_ ) , .p0 ( optlc_net_71 ) ) ;
|
||||
.out ( bottom_grid_pin_1_ ) , .p0 ( optlc_net_73 ) ) ;
|
||||
cbx_1__1__mux_tree_tapbuf_size8_1 mux_top_ipin_2 (
|
||||
.in ( { chanx_right_out[0] , chanx_left_out[0] , chanx_right_out[2] ,
|
||||
chanx_left_out[2] , chanx_right_out[6] , chanx_left_out[6] ,
|
||||
|
|
@ -1517,7 +1515,7 @@ cbx_1__1__mux_tree_tapbuf_size8_1 mux_top_ipin_2 (
|
|||
.sram ( mux_tree_tapbuf_size8_1_sram ) ,
|
||||
.sram_inv ( { SYNOPSYS_UNCONNECTED_37 , SYNOPSYS_UNCONNECTED_38 ,
|
||||
SYNOPSYS_UNCONNECTED_39 , SYNOPSYS_UNCONNECTED_40 } ) ,
|
||||
.out ( bottom_grid_pin_2_ ) , .p0 ( optlc_net_69 ) ) ;
|
||||
.out ( bottom_grid_pin_2_ ) , .p0 ( optlc_net_72 ) ) ;
|
||||
cbx_1__1__mux_tree_tapbuf_size8_2 mux_top_ipin_5 (
|
||||
.in ( { chanx_right_out[1] , chanx_left_out[1] , chanx_right_out[3] ,
|
||||
chanx_left_out[3] , chanx_right_out[9] , chanx_left_out[9] ,
|
||||
|
|
@ -1525,7 +1523,7 @@ cbx_1__1__mux_tree_tapbuf_size8_2 mux_top_ipin_5 (
|
|||
.sram ( mux_tree_tapbuf_size8_2_sram ) ,
|
||||
.sram_inv ( { SYNOPSYS_UNCONNECTED_41 , SYNOPSYS_UNCONNECTED_42 ,
|
||||
SYNOPSYS_UNCONNECTED_43 , SYNOPSYS_UNCONNECTED_44 } ) ,
|
||||
.out ( bottom_grid_pin_5_ ) , .p0 ( optlc_net_71 ) ) ;
|
||||
.out ( bottom_grid_pin_5_ ) , .p0 ( optlc_net_73 ) ) ;
|
||||
cbx_1__1__mux_tree_tapbuf_size8_3 mux_top_ipin_6 (
|
||||
.in ( { chanx_right_out[0] , chanx_left_out[0] , chanx_right_out[2] ,
|
||||
chanx_left_out[2] , chanx_right_out[10] , chanx_left_out[10] ,
|
||||
|
|
@ -1533,7 +1531,7 @@ cbx_1__1__mux_tree_tapbuf_size8_3 mux_top_ipin_6 (
|
|||
.sram ( mux_tree_tapbuf_size8_3_sram ) ,
|
||||
.sram_inv ( { SYNOPSYS_UNCONNECTED_45 , SYNOPSYS_UNCONNECTED_46 ,
|
||||
SYNOPSYS_UNCONNECTED_47 , SYNOPSYS_UNCONNECTED_48 } ) ,
|
||||
.out ( bottom_grid_pin_6_ ) , .p0 ( optlc_net_69 ) ) ;
|
||||
.out ( bottom_grid_pin_6_ ) , .p0 ( optlc_net_72 ) ) ;
|
||||
cbx_1__1__mux_tree_tapbuf_size8_4 mux_top_ipin_9 (
|
||||
.in ( { chanx_right_out[1] , chanx_left_out[1] , chanx_right_out[3] ,
|
||||
chanx_left_out[3] , chanx_right_out[5] , chanx_left_out[5] ,
|
||||
|
|
@ -1541,7 +1539,7 @@ cbx_1__1__mux_tree_tapbuf_size8_4 mux_top_ipin_9 (
|
|||
.sram ( mux_tree_tapbuf_size8_4_sram ) ,
|
||||
.sram_inv ( { SYNOPSYS_UNCONNECTED_49 , SYNOPSYS_UNCONNECTED_50 ,
|
||||
SYNOPSYS_UNCONNECTED_51 , SYNOPSYS_UNCONNECTED_52 } ) ,
|
||||
.out ( bottom_grid_pin_9_ ) , .p0 ( optlc_net_70 ) ) ;
|
||||
.out ( bottom_grid_pin_9_ ) , .p0 ( optlc_net_73 ) ) ;
|
||||
cbx_1__1__mux_tree_tapbuf_size8_5 mux_top_ipin_10 (
|
||||
.in ( { chanx_right_out[0] , chanx_left_out[0] , chanx_right_out[2] ,
|
||||
chanx_left_out[2] , chanx_right_out[6] , chanx_left_out[6] ,
|
||||
|
|
@ -1557,7 +1555,7 @@ cbx_1__1__mux_tree_tapbuf_size8_6 mux_top_ipin_13 (
|
|||
.sram ( mux_tree_tapbuf_size8_6_sram ) ,
|
||||
.sram_inv ( { SYNOPSYS_UNCONNECTED_57 , SYNOPSYS_UNCONNECTED_58 ,
|
||||
SYNOPSYS_UNCONNECTED_59 , SYNOPSYS_UNCONNECTED_60 } ) ,
|
||||
.out ( bottom_grid_pin_13_ ) , .p0 ( optlc_net_70 ) ) ;
|
||||
.out ( bottom_grid_pin_13_ ) , .p0 ( optlc_net_73 ) ) ;
|
||||
cbx_1__1__mux_tree_tapbuf_size8 mux_top_ipin_14 (
|
||||
.in ( { chanx_right_out[0] , chanx_left_out[0] , chanx_right_out[2] ,
|
||||
chanx_left_out[2] , chanx_right_out[10] , chanx_left_out[10] ,
|
||||
|
|
@ -1605,31 +1603,30 @@ cbx_1__1__mux_tree_tapbuf_size8_mem mem_top_ipin_14 ( .prog_clk ( prog_clk ) ,
|
|||
.ccff_head ( mux_tree_tapbuf_size8_mem_6_ccff_tail ) ,
|
||||
.ccff_tail ( mux_tree_tapbuf_size8_mem_7_ccff_tail ) ,
|
||||
.mem_out ( mux_tree_tapbuf_size8_7_sram ) ) ;
|
||||
sky130_fd_sc_hd__buf_4 prog_clk_0_FTB00 ( .A ( prog_clk_0_N_in ) ,
|
||||
sky130_fd_sc_hd__buf_1 prog_clk_0_FTB00 ( .A ( prog_clk_0_N_in ) ,
|
||||
.X ( prog_clk[0] ) ) ;
|
||||
sky130_fd_sc_hd__clkbuf_1 prog_clk_0_W_FTB01 ( .A ( prog_clk_0_N_in ) ,
|
||||
.X ( ctsbuf_net_173 ) ) ;
|
||||
.X ( ctsbuf_net_175 ) ) ;
|
||||
sky130_fd_sc_hd__buf_1 prog_clk_1_N_FTB01 ( .A ( prog_clk_1_E_in ) ,
|
||||
.X ( aps_rename_505_ ) ) ;
|
||||
sky130_fd_sc_hd__buf_1 prog_clk_1_S_FTB01 ( .A ( prog_clk_1_E_in ) ,
|
||||
.X ( aps_rename_506_ ) ) ;
|
||||
sky130_fd_sc_hd__bufbuf_16 prog_clk_2_W_FTB01 ( .A ( prog_clk_2_W_in ) ,
|
||||
.X ( prog_clk_2_W_out ) ) ;
|
||||
sky130_fd_sc_hd__bufbuf_16 prog_clk_1_S_FTB01 ( .A ( prog_clk_1_E_in ) ,
|
||||
.X ( prog_clk_1_S_out ) ) ;
|
||||
sky130_fd_sc_hd__buf_1 prog_clk_2_W_FTB01 ( .A ( prog_clk_2_W_in ) ,
|
||||
.X ( net_net_69 ) ) ;
|
||||
sky130_fd_sc_hd__bufbuf_16 prog_clk_2_E_FTB01 ( .A ( prog_clk_2_W_in ) ,
|
||||
.X ( prog_clk_2_E_out ) ) ;
|
||||
sky130_fd_sc_hd__bufbuf_16 prog_clk_3_E_FTB01 ( .A ( prog_clk_3_E_in ) ,
|
||||
.X ( prog_clk_3_E_out ) ) ;
|
||||
sky130_fd_sc_hd__bufbuf_16 prog_clk_3_W_FTB01 ( .A ( prog_clk_3_E_in ) ,
|
||||
.X ( prog_clk_3_W_out ) ) ;
|
||||
sky130_fd_sc_hd__bufbuf_16 clk_1_N_FTB01 ( .A ( clk_1_E_in ) ,
|
||||
.X ( clk_1_N_out ) ) ;
|
||||
sky130_fd_sc_hd__bufbuf_16 clk_1_S_FTB01 ( .A ( clk_1_E_in ) ,
|
||||
.X ( clk_1_S_out ) ) ;
|
||||
sky130_fd_sc_hd__buf_1 clk_1_N_FTB01 ( .A ( clk_1_E_in ) , .X ( net_net_70 ) ) ;
|
||||
sky130_fd_sc_hd__buf_1 clk_1_S_FTB01 ( .A ( clk_1_E_in ) ,
|
||||
.X ( aps_rename_506_ ) ) ;
|
||||
sky130_fd_sc_hd__bufbuf_16 clk_2_W_FTB01 ( .A ( clk_2_W_in ) ,
|
||||
.X ( clk_2_W_out ) ) ;
|
||||
sky130_fd_sc_hd__buf_1 clk_2_E_FTB01 ( .A ( clk_2_W_in ) , .X ( net_net_68 ) ) ;
|
||||
sky130_fd_sc_hd__bufbuf_16 clk_3_E_FTB01 ( .A ( clk_3_E_in ) ,
|
||||
.X ( clk_3_E_out ) ) ;
|
||||
sky130_fd_sc_hd__buf_1 clk_2_E_FTB01 ( .A ( clk_2_W_in ) , .X ( net_net_71 ) ) ;
|
||||
sky130_fd_sc_hd__buf_1 clk_3_E_FTB01 ( .A ( clk_3_E_in ) ,
|
||||
.X ( aps_rename_507_ ) ) ;
|
||||
sky130_fd_sc_hd__bufbuf_16 clk_3_W_FTB01 ( .A ( clk_3_E_in ) ,
|
||||
.X ( clk_3_W_out ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 FTB_17__16 ( .A ( chanx_left_in[0] ) ,
|
||||
|
|
@ -1713,34 +1710,29 @@ sky130_fd_sc_hd__buf_8 FTB_55__54 ( .A ( chanx_right_in[18] ) ,
|
|||
sky130_fd_sc_hd__buf_8 FTB_56__55 ( .A ( chanx_right_in[19] ) ,
|
||||
.X ( chanx_left_out[19] ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 FTB_57__56 ( .A ( SC_IN_TOP ) , .X ( SC_OUT_BOT ) ) ;
|
||||
sky130_fd_sc_hd__buf_1 FTB_58__57 ( .A ( SC_IN_BOT ) , .X ( ropt_net_94 ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 FTB_58__57 ( .A ( SC_IN_BOT ) , .X ( SC_OUT_TOP ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 FTB_59__58 ( .A ( REGIN_FEEDTHROUGH ) ,
|
||||
.X ( REGOUT_FEEDTHROUGH ) ) ;
|
||||
sky130_fd_sc_hd__inv_8 BINV_R_64 ( .A ( BUF_net_65 ) ,
|
||||
sky130_fd_sc_hd__inv_8 BINV_R_67 ( .A ( BUF_net_68 ) ,
|
||||
.Y ( prog_clk_1_N_out ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 BINV_R_65 ( .A ( aps_rename_505_ ) ,
|
||||
.Y ( BUF_net_65 ) ) ;
|
||||
sky130_fd_sc_hd__inv_8 BINV_R_66 ( .A ( BUF_net_67 ) ,
|
||||
.Y ( prog_clk_1_S_out ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 BINV_R_67 ( .A ( aps_rename_506_ ) ,
|
||||
.Y ( BUF_net_67 ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 BUFT_RR_68 ( .A ( net_net_68 ) , .X ( clk_2_E_out ) ) ;
|
||||
sky130_fd_sc_hd__conb_1 optlc_71 ( .LO ( SYNOPSYS_UNCONNECTED_65 ) ,
|
||||
.HI ( optlc_net_69 ) ) ;
|
||||
sky130_fd_sc_hd__conb_1 optlc_73 ( .LO ( SYNOPSYS_UNCONNECTED_66 ) ,
|
||||
.HI ( optlc_net_70 ) ) ;
|
||||
sky130_fd_sc_hd__conb_1 optlc_75 ( .LO ( SYNOPSYS_UNCONNECTED_67 ) ,
|
||||
.HI ( optlc_net_71 ) ) ;
|
||||
sky130_fd_sc_hd__conb_1 optlc_77 ( .LO ( SYNOPSYS_UNCONNECTED_68 ) ,
|
||||
sky130_fd_sc_hd__inv_1 BINV_R_68 ( .A ( aps_rename_505_ ) ,
|
||||
.Y ( BUF_net_68 ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 BUFT_RR_69 ( .A ( net_net_69 ) ,
|
||||
.X ( prog_clk_2_W_out ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 BUFT_RR_70 ( .A ( net_net_70 ) , .X ( clk_1_N_out ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 BUFT_RR_71 ( .A ( net_net_71 ) , .X ( clk_2_E_out ) ) ;
|
||||
sky130_fd_sc_hd__conb_1 optlc_74 ( .LO ( SYNOPSYS_UNCONNECTED_65 ) ,
|
||||
.HI ( optlc_net_72 ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 ropt_mt_inst_1318 ( .A ( ropt_net_94 ) ,
|
||||
.X ( ropt_net_104 ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 cts_buf_3521204 ( .A ( ctsbuf_net_173 ) ,
|
||||
sky130_fd_sc_hd__conb_1 optlc_76 ( .LO ( SYNOPSYS_UNCONNECTED_66 ) ,
|
||||
.HI ( optlc_net_73 ) ) ;
|
||||
sky130_fd_sc_hd__conb_1 optlc_78 ( .LO ( SYNOPSYS_UNCONNECTED_67 ) ,
|
||||
.HI ( optlc_net_74 ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 ZBUF_6_f_inst_79 ( .A ( aps_rename_507_ ) ,
|
||||
.X ( clk_3_E_out ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 ZBUF_4_f_inst_80 ( .A ( aps_rename_506_ ) ,
|
||||
.X ( clk_1_S_out ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 cts_buf_3521207 ( .A ( ctsbuf_net_175 ) ,
|
||||
.X ( prog_clk_0_W_out ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 ropt_mt_inst_1325 ( .A ( ropt_net_100 ) ,
|
||||
.X ( ccff_tail[0] ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 ropt_mt_inst_1329 ( .A ( ropt_net_104 ) ,
|
||||
.X ( SC_OUT_TOP ) ) ;
|
||||
endmodule
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -18,11 +18,11 @@ supply0 VSS ;
|
|||
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ccff_head[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[0] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_1_ ( .D ( mem_out[0] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_1_ ( .D ( mem_out[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[1] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_2_ ( .D ( mem_out[1] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_2_ ( .D ( mem_out[1] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[2] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_3_ ( .D ( mem_out[2] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_3_ ( .D ( mem_out[2] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[3] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_1 FTB_16__15 ( .A ( mem_out[3] ) , .X ( ccff_tail[0] ) ,
|
||||
.VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
|
|
@ -43,9 +43,9 @@ supply0 VSS ;
|
|||
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ccff_head[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[0] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_1_ ( .D ( mem_out[0] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_1_ ( .D ( mem_out[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[1] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_2_ ( .D ( mem_out[1] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_2_ ( .D ( mem_out[1] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[2] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_3_ ( .D ( mem_out[2] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[3] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
|
|
@ -95,7 +95,7 @@ sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ccff_head[0] ) ,
|
|||
.CLK ( prog_clk[0] ) , .Q ( mem_out[0] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_1_ ( .D ( mem_out[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[1] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_2_ ( .D ( mem_out[1] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_2_ ( .D ( mem_out[1] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[2] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_3_ ( .D ( mem_out[2] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[3] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
|
|
@ -168,7 +168,7 @@ supply0 VSS ;
|
|||
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ccff_head[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[0] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_1_ ( .D ( mem_out[0] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_1_ ( .D ( mem_out[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[1] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_2_ ( .D ( mem_out[1] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[2] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
|
|
@ -333,9 +333,6 @@ wire [0:0] sky130_fd_sc_hd__mux2_1_7_X ;
|
|||
supply1 VDD ;
|
||||
supply0 VSS ;
|
||||
|
||||
sky130_fd_sc_hd__buf_6 sky130_fd_sc_hd__buf_4_0_ (
|
||||
.A ( sky130_fd_sc_hd__mux2_1_7_X[0] ) , .X ( out[0] ) , .VPWR ( VDD ) ,
|
||||
.VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__mux2_1 mux_l1_in_0_ ( .A0 ( in[1] ) , .A1 ( in[0] ) ,
|
||||
.S ( sram[0] ) , .X ( sky130_fd_sc_hd__mux2_1_0_X[0] ) , .VPWR ( VDD ) ,
|
||||
.VGND ( VSS ) ) ;
|
||||
|
|
@ -363,6 +360,8 @@ sky130_fd_sc_hd__mux2_1 mux_l4_in_0_ (
|
|||
.A0 ( sky130_fd_sc_hd__mux2_1_6_X[0] ) ,
|
||||
.A1 ( sky130_fd_sc_hd__mux2_1_5_X[0] ) , .S ( sram[3] ) ,
|
||||
.X ( sky130_fd_sc_hd__mux2_1_7_X[0] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 BUFT_RR_66 ( .A ( sky130_fd_sc_hd__mux2_1_7_X[0] ) ,
|
||||
.X ( out[0] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
endmodule
|
||||
|
||||
|
||||
|
|
@ -414,7 +413,7 @@ sky130_fd_sc_hd__mux2_1 mux_l4_in_0_ (
|
|||
.A0 ( sky130_fd_sc_hd__mux2_1_6_X[0] ) ,
|
||||
.A1 ( sky130_fd_sc_hd__mux2_1_5_X[0] ) , .S ( sram[3] ) ,
|
||||
.X ( sky130_fd_sc_hd__mux2_1_7_X[0] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 BUFT_RR_63 ( .A ( sky130_fd_sc_hd__mux2_1_7_X[0] ) ,
|
||||
sky130_fd_sc_hd__buf_6 BUFT_RR_65 ( .A ( sky130_fd_sc_hd__mux2_1_7_X[0] ) ,
|
||||
.X ( out[0] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
endmodule
|
||||
|
||||
|
|
@ -548,9 +547,6 @@ wire [0:0] sky130_fd_sc_hd__mux2_1_7_X ;
|
|||
supply1 VDD ;
|
||||
supply0 VSS ;
|
||||
|
||||
sky130_fd_sc_hd__buf_6 sky130_fd_sc_hd__buf_4_0_ (
|
||||
.A ( sky130_fd_sc_hd__mux2_1_7_X[0] ) , .X ( out[0] ) , .VPWR ( VDD ) ,
|
||||
.VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__mux2_1 mux_l1_in_0_ ( .A0 ( in[1] ) , .A1 ( in[0] ) ,
|
||||
.S ( sram[0] ) , .X ( sky130_fd_sc_hd__mux2_1_0_X[0] ) , .VPWR ( VDD ) ,
|
||||
.VGND ( VSS ) ) ;
|
||||
|
|
@ -578,6 +574,8 @@ sky130_fd_sc_hd__mux2_1 mux_l4_in_0_ (
|
|||
.A0 ( sky130_fd_sc_hd__mux2_1_6_X[0] ) ,
|
||||
.A1 ( sky130_fd_sc_hd__mux2_1_5_X[0] ) , .S ( sram[3] ) ,
|
||||
.X ( sky130_fd_sc_hd__mux2_1_7_X[0] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 BUFT_RR_64 ( .A ( sky130_fd_sc_hd__mux2_1_7_X[0] ) ,
|
||||
.X ( out[0] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
endmodule
|
||||
|
||||
|
||||
|
|
@ -629,7 +627,7 @@ sky130_fd_sc_hd__mux2_1 mux_l4_in_0_ (
|
|||
.A0 ( sky130_fd_sc_hd__mux2_1_6_X[0] ) ,
|
||||
.A1 ( sky130_fd_sc_hd__mux2_1_5_X[0] ) , .S ( sram[3] ) ,
|
||||
.X ( sky130_fd_sc_hd__mux2_1_7_X[0] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 BUFT_RR_62 ( .A ( sky130_fd_sc_hd__mux2_1_7_X[0] ) ,
|
||||
sky130_fd_sc_hd__buf_6 BUFT_RR_63 ( .A ( sky130_fd_sc_hd__mux2_1_7_X[0] ) ,
|
||||
.X ( out[0] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
endmodule
|
||||
|
||||
|
|
@ -643,33 +641,29 @@ output [0:3] mem_out ;
|
|||
input VDD ;
|
||||
input VSS ;
|
||||
|
||||
wire copt_net_81 ;
|
||||
wire copt_net_84 ;
|
||||
supply1 VDD ;
|
||||
supply0 VSS ;
|
||||
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ccff_head[0] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ccff_head[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[0] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_1_ ( .D ( mem_out[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[1] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_2_ ( .D ( mem_out[1] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[2] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_3_ ( .D ( mem_out[2] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( copt_net_81 ) , .VPWR ( VDD ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( copt_net_84 ) , .VPWR ( VDD ) ,
|
||||
.VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_4 FTB_8__7 ( .A ( copt_net_83 ) , .X ( ccff_tail[0] ) ,
|
||||
sky130_fd_sc_hd__buf_8 FTB_8__7 ( .A ( mem_out[3] ) , .X ( ccff_tail[0] ) ,
|
||||
.VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1303 ( .A ( copt_net_81 ) ,
|
||||
.X ( copt_net_80 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1304 ( .A ( copt_net_80 ) ,
|
||||
.X ( mem_out[3] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1305 ( .A ( mem_out[3] ) ,
|
||||
.X ( copt_net_82 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1306 ( .A ( copt_net_84 ) ,
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1307 ( .A ( copt_net_87 ) ,
|
||||
.X ( copt_net_83 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1307 ( .A ( copt_net_85 ) ,
|
||||
.X ( copt_net_84 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1308 ( .A ( copt_net_82 ) ,
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1309 ( .A ( copt_net_83 ) ,
|
||||
.X ( copt_net_85 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1310 ( .A ( copt_net_85 ) ,
|
||||
.X ( mem_out[3] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1311 ( .A ( copt_net_84 ) ,
|
||||
.X ( copt_net_87 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
endmodule
|
||||
|
||||
|
||||
|
|
@ -691,7 +685,7 @@ sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_1_ ( .D ( mem_out[0] ) ,
|
|||
.CLK ( prog_clk[0] ) , .Q ( mem_out[1] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_2_ ( .D ( mem_out[1] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[2] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_3_ ( .D ( mem_out[2] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_3_ ( .D ( mem_out[2] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[3] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_1 FTB_7__6 ( .A ( mem_out[3] ) , .X ( ccff_tail[0] ) ,
|
||||
.VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
|
|
@ -835,7 +829,7 @@ input VSS ;
|
|||
supply1 VDD ;
|
||||
supply0 VSS ;
|
||||
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( copt_net_79 ) ,
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ropt_net_103 ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[0] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_1_ ( .D ( mem_out[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[1] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
|
|
@ -845,18 +839,22 @@ sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_3_ ( .D ( mem_out[2] ) ,
|
|||
.CLK ( prog_clk[0] ) , .Q ( mem_out[3] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_1 FTB_1__0 ( .A ( mem_out[3] ) , .X ( ccff_tail[0] ) ,
|
||||
.VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1297 ( .A ( ccff_head[0] ) ,
|
||||
.X ( copt_net_74 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1298 ( .A ( copt_net_74 ) ,
|
||||
.X ( copt_net_75 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1299 ( .A ( copt_net_75 ) ,
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1300 ( .A ( copt_net_79 ) ,
|
||||
.X ( copt_net_76 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1300 ( .A ( copt_net_76 ) ,
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1301 ( .A ( copt_net_76 ) ,
|
||||
.X ( copt_net_77 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1301 ( .A ( copt_net_77 ) ,
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1302 ( .A ( copt_net_77 ) ,
|
||||
.X ( copt_net_78 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1302 ( .A ( copt_net_78 ) ,
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1303 ( .A ( ccff_head[0] ) ,
|
||||
.X ( copt_net_79 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1304 ( .A ( copt_net_78 ) ,
|
||||
.X ( copt_net_80 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1305 ( .A ( copt_net_80 ) ,
|
||||
.X ( copt_net_81 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 ropt_h_inst_1323 ( .A ( copt_net_81 ) ,
|
||||
.X ( ropt_net_102 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 ropt_h_inst_1324 ( .A ( ropt_net_102 ) ,
|
||||
.X ( ropt_net_103 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
endmodule
|
||||
|
||||
|
||||
|
|
@ -917,7 +915,7 @@ sky130_fd_sc_hd__mux2_1 mux_l4_in_0_ (
|
|||
.A0 ( sky130_fd_sc_hd__mux2_1_8_X[0] ) ,
|
||||
.A1 ( sky130_fd_sc_hd__mux2_1_7_X[0] ) , .S ( sram[3] ) ,
|
||||
.X ( sky130_fd_sc_hd__mux2_1_9_X[0] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 BUFT_RR_61 ( .A ( sky130_fd_sc_hd__mux2_1_9_X[0] ) ,
|
||||
sky130_fd_sc_hd__buf_6 BUFT_RR_62 ( .A ( sky130_fd_sc_hd__mux2_1_9_X[0] ) ,
|
||||
.X ( out[0] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
endmodule
|
||||
|
||||
|
|
@ -945,9 +943,6 @@ wire [0:0] sky130_fd_sc_hd__mux2_1_9_X ;
|
|||
supply1 VDD ;
|
||||
supply0 VSS ;
|
||||
|
||||
sky130_fd_sc_hd__buf_6 sky130_fd_sc_hd__buf_4_0_ (
|
||||
.A ( sky130_fd_sc_hd__mux2_1_9_X[0] ) , .X ( out[0] ) , .VPWR ( VDD ) ,
|
||||
.VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__mux2_1 mux_l1_in_0_ ( .A0 ( in[1] ) , .A1 ( in[0] ) ,
|
||||
.S ( sram[0] ) , .X ( sky130_fd_sc_hd__mux2_1_0_X[0] ) , .VPWR ( VDD ) ,
|
||||
.VGND ( VSS ) ) ;
|
||||
|
|
@ -982,6 +977,8 @@ sky130_fd_sc_hd__mux2_1 mux_l4_in_0_ (
|
|||
.A0 ( sky130_fd_sc_hd__mux2_1_8_X[0] ) ,
|
||||
.A1 ( sky130_fd_sc_hd__mux2_1_7_X[0] ) , .S ( sram[3] ) ,
|
||||
.X ( sky130_fd_sc_hd__mux2_1_9_X[0] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 BUFT_RR_61 ( .A ( sky130_fd_sc_hd__mux2_1_9_X[0] ) ,
|
||||
.X ( out[0] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
endmodule
|
||||
|
||||
|
||||
|
|
@ -1433,7 +1430,6 @@ output clk_3_W_out ;
|
|||
input VDD ;
|
||||
input VSS ;
|
||||
|
||||
wire ropt_net_94 ;
|
||||
wire [0:0] prog_clk ;
|
||||
wire prog_clk_0 ;
|
||||
wire [0:3] mux_tree_tapbuf_size10_0_sram ;
|
||||
|
|
@ -1497,7 +1493,7 @@ cbx_1__1__mux_tree_tapbuf_size10_1 mux_top_ipin_3 (
|
|||
.sram_inv ( { SYNOPSYS_UNCONNECTED_5 , SYNOPSYS_UNCONNECTED_6 ,
|
||||
SYNOPSYS_UNCONNECTED_7 , SYNOPSYS_UNCONNECTED_8 } ) ,
|
||||
.out ( bottom_grid_pin_3_ ) , .VDD ( VDD ) , .VSS ( VSS ) ,
|
||||
.p0 ( optlc_net_71 ) ) ;
|
||||
.p0 ( optlc_net_74 ) ) ;
|
||||
cbx_1__1__mux_tree_tapbuf_size10_2 mux_top_ipin_4 (
|
||||
.in ( { chanx_right_out[0] , chanx_left_out[0] , chanx_right_out[2] ,
|
||||
chanx_left_out[2] , chanx_right_out[4] , chanx_left_out[4] ,
|
||||
|
|
@ -1507,7 +1503,7 @@ cbx_1__1__mux_tree_tapbuf_size10_2 mux_top_ipin_4 (
|
|||
.sram_inv ( { SYNOPSYS_UNCONNECTED_9 , SYNOPSYS_UNCONNECTED_10 ,
|
||||
SYNOPSYS_UNCONNECTED_11 , SYNOPSYS_UNCONNECTED_12 } ) ,
|
||||
.out ( bottom_grid_pin_4_ ) , .VDD ( VDD ) , .VSS ( VSS ) ,
|
||||
.p0 ( optlc_net_69 ) ) ;
|
||||
.p0 ( optlc_net_72 ) ) ;
|
||||
cbx_1__1__mux_tree_tapbuf_size10_3 mux_top_ipin_7 (
|
||||
.in ( { chanx_right_out[1] , chanx_left_out[1] , chanx_right_out[3] ,
|
||||
chanx_left_out[3] , chanx_right_out[7] , chanx_left_out[7] ,
|
||||
|
|
@ -1517,7 +1513,7 @@ cbx_1__1__mux_tree_tapbuf_size10_3 mux_top_ipin_7 (
|
|||
.sram_inv ( { SYNOPSYS_UNCONNECTED_13 , SYNOPSYS_UNCONNECTED_14 ,
|
||||
SYNOPSYS_UNCONNECTED_15 , SYNOPSYS_UNCONNECTED_16 } ) ,
|
||||
.out ( bottom_grid_pin_7_ ) , .VDD ( VDD ) , .VSS ( VSS ) ,
|
||||
.p0 ( optlc_net_71 ) ) ;
|
||||
.p0 ( optlc_net_74 ) ) ;
|
||||
cbx_1__1__mux_tree_tapbuf_size10_4 mux_top_ipin_8 (
|
||||
.in ( { chanx_right_out[0] , chanx_left_out[0] , chanx_right_out[2] ,
|
||||
chanx_left_out[2] , chanx_right_out[8] , chanx_left_out[8] ,
|
||||
|
|
@ -1537,7 +1533,7 @@ cbx_1__1__mux_tree_tapbuf_size10_5 mux_top_ipin_11 (
|
|||
.sram_inv ( { SYNOPSYS_UNCONNECTED_21 , SYNOPSYS_UNCONNECTED_22 ,
|
||||
SYNOPSYS_UNCONNECTED_23 , SYNOPSYS_UNCONNECTED_24 } ) ,
|
||||
.out ( bottom_grid_pin_11_ ) , .VDD ( VDD ) , .VSS ( VSS ) ,
|
||||
.p0 ( optlc_net_70 ) ) ;
|
||||
.p0 ( optlc_net_73 ) ) ;
|
||||
cbx_1__1__mux_tree_tapbuf_size10_6 mux_top_ipin_12 (
|
||||
.in ( { chanx_right_out[0] , chanx_left_out[0] , chanx_right_out[2] ,
|
||||
chanx_left_out[2] , chanx_right_out[6] , chanx_left_out[6] ,
|
||||
|
|
@ -1557,7 +1553,7 @@ cbx_1__1__mux_tree_tapbuf_size10 mux_top_ipin_15 (
|
|||
.sram_inv ( { SYNOPSYS_UNCONNECTED_29 , SYNOPSYS_UNCONNECTED_30 ,
|
||||
SYNOPSYS_UNCONNECTED_31 , SYNOPSYS_UNCONNECTED_32 } ) ,
|
||||
.out ( bottom_grid_pin_15_ ) , .VDD ( VDD ) , .VSS ( VSS ) ,
|
||||
.p0 ( optlc_net_70 ) ) ;
|
||||
.p0 ( optlc_net_73 ) ) ;
|
||||
cbx_1__1__mux_tree_tapbuf_size10_mem_0 mem_top_ipin_0 (
|
||||
.prog_clk ( prog_clk ) , .ccff_head ( ccff_head ) ,
|
||||
.ccff_tail ( mux_tree_tapbuf_size10_mem_0_ccff_tail ) ,
|
||||
|
|
@ -1594,9 +1590,9 @@ cbx_1__1__mux_tree_tapbuf_size10_mem_6 mem_top_ipin_12 (
|
|||
.mem_out ( mux_tree_tapbuf_size10_6_sram ) , .VDD ( VDD ) , .VSS ( VSS ) ) ;
|
||||
cbx_1__1__mux_tree_tapbuf_size10_mem mem_top_ipin_15 (
|
||||
.prog_clk ( prog_clk ) ,
|
||||
.ccff_head ( mux_tree_tapbuf_size8_mem_7_ccff_tail ) ,
|
||||
.ccff_tail ( { ropt_net_100 } ) ,
|
||||
.mem_out ( mux_tree_tapbuf_size10_7_sram ) , .VDD ( VDD ) , .VSS ( VSS ) ) ;
|
||||
.ccff_head ( mux_tree_tapbuf_size8_mem_7_ccff_tail ) ,
|
||||
.ccff_tail ( ccff_tail ) , .mem_out ( mux_tree_tapbuf_size10_7_sram ) ,
|
||||
.VDD ( VDD ) , .VSS ( VSS ) ) ;
|
||||
cbx_1__1__mux_tree_tapbuf_size8_0 mux_top_ipin_1 (
|
||||
.in ( { chanx_right_out[1] , chanx_left_out[1] , chanx_right_out[3] ,
|
||||
chanx_left_out[3] , chanx_right_out[5] , chanx_left_out[5] ,
|
||||
|
|
@ -1605,7 +1601,7 @@ cbx_1__1__mux_tree_tapbuf_size8_0 mux_top_ipin_1 (
|
|||
.sram_inv ( { SYNOPSYS_UNCONNECTED_33 , SYNOPSYS_UNCONNECTED_34 ,
|
||||
SYNOPSYS_UNCONNECTED_35 , SYNOPSYS_UNCONNECTED_36 } ) ,
|
||||
.out ( bottom_grid_pin_1_ ) , .VDD ( VDD ) , .VSS ( VSS ) ,
|
||||
.p0 ( optlc_net_71 ) ) ;
|
||||
.p0 ( optlc_net_73 ) ) ;
|
||||
cbx_1__1__mux_tree_tapbuf_size8_1 mux_top_ipin_2 (
|
||||
.in ( { chanx_right_out[0] , chanx_left_out[0] , chanx_right_out[2] ,
|
||||
chanx_left_out[2] , chanx_right_out[6] , chanx_left_out[6] ,
|
||||
|
|
@ -1614,7 +1610,7 @@ cbx_1__1__mux_tree_tapbuf_size8_1 mux_top_ipin_2 (
|
|||
.sram_inv ( { SYNOPSYS_UNCONNECTED_37 , SYNOPSYS_UNCONNECTED_38 ,
|
||||
SYNOPSYS_UNCONNECTED_39 , SYNOPSYS_UNCONNECTED_40 } ) ,
|
||||
.out ( bottom_grid_pin_2_ ) , .VDD ( VDD ) , .VSS ( VSS ) ,
|
||||
.p0 ( optlc_net_69 ) ) ;
|
||||
.p0 ( optlc_net_72 ) ) ;
|
||||
cbx_1__1__mux_tree_tapbuf_size8_2 mux_top_ipin_5 (
|
||||
.in ( { chanx_right_out[1] , chanx_left_out[1] , chanx_right_out[3] ,
|
||||
chanx_left_out[3] , chanx_right_out[9] , chanx_left_out[9] ,
|
||||
|
|
@ -1623,7 +1619,7 @@ cbx_1__1__mux_tree_tapbuf_size8_2 mux_top_ipin_5 (
|
|||
.sram_inv ( { SYNOPSYS_UNCONNECTED_41 , SYNOPSYS_UNCONNECTED_42 ,
|
||||
SYNOPSYS_UNCONNECTED_43 , SYNOPSYS_UNCONNECTED_44 } ) ,
|
||||
.out ( bottom_grid_pin_5_ ) , .VDD ( VDD ) , .VSS ( VSS ) ,
|
||||
.p0 ( optlc_net_71 ) ) ;
|
||||
.p0 ( optlc_net_73 ) ) ;
|
||||
cbx_1__1__mux_tree_tapbuf_size8_3 mux_top_ipin_6 (
|
||||
.in ( { chanx_right_out[0] , chanx_left_out[0] , chanx_right_out[2] ,
|
||||
chanx_left_out[2] , chanx_right_out[10] , chanx_left_out[10] ,
|
||||
|
|
@ -1632,7 +1628,7 @@ cbx_1__1__mux_tree_tapbuf_size8_3 mux_top_ipin_6 (
|
|||
.sram_inv ( { SYNOPSYS_UNCONNECTED_45 , SYNOPSYS_UNCONNECTED_46 ,
|
||||
SYNOPSYS_UNCONNECTED_47 , SYNOPSYS_UNCONNECTED_48 } ) ,
|
||||
.out ( bottom_grid_pin_6_ ) , .VDD ( VDD ) , .VSS ( VSS ) ,
|
||||
.p0 ( optlc_net_69 ) ) ;
|
||||
.p0 ( optlc_net_72 ) ) ;
|
||||
cbx_1__1__mux_tree_tapbuf_size8_4 mux_top_ipin_9 (
|
||||
.in ( { chanx_right_out[1] , chanx_left_out[1] , chanx_right_out[3] ,
|
||||
chanx_left_out[3] , chanx_right_out[5] , chanx_left_out[5] ,
|
||||
|
|
@ -1641,7 +1637,7 @@ cbx_1__1__mux_tree_tapbuf_size8_4 mux_top_ipin_9 (
|
|||
.sram_inv ( { SYNOPSYS_UNCONNECTED_49 , SYNOPSYS_UNCONNECTED_50 ,
|
||||
SYNOPSYS_UNCONNECTED_51 , SYNOPSYS_UNCONNECTED_52 } ) ,
|
||||
.out ( bottom_grid_pin_9_ ) , .VDD ( VDD ) , .VSS ( VSS ) ,
|
||||
.p0 ( optlc_net_70 ) ) ;
|
||||
.p0 ( optlc_net_73 ) ) ;
|
||||
cbx_1__1__mux_tree_tapbuf_size8_5 mux_top_ipin_10 (
|
||||
.in ( { chanx_right_out[0] , chanx_left_out[0] , chanx_right_out[2] ,
|
||||
chanx_left_out[2] , chanx_right_out[6] , chanx_left_out[6] ,
|
||||
|
|
@ -1659,7 +1655,7 @@ cbx_1__1__mux_tree_tapbuf_size8_6 mux_top_ipin_13 (
|
|||
.sram_inv ( { SYNOPSYS_UNCONNECTED_57 , SYNOPSYS_UNCONNECTED_58 ,
|
||||
SYNOPSYS_UNCONNECTED_59 , SYNOPSYS_UNCONNECTED_60 } ) ,
|
||||
.out ( bottom_grid_pin_13_ ) , .VDD ( VDD ) , .VSS ( VSS ) ,
|
||||
.p0 ( optlc_net_70 ) ) ;
|
||||
.p0 ( optlc_net_73 ) ) ;
|
||||
cbx_1__1__mux_tree_tapbuf_size8 mux_top_ipin_14 (
|
||||
.in ( { chanx_right_out[0] , chanx_left_out[0] , chanx_right_out[2] ,
|
||||
chanx_left_out[2] , chanx_right_out[10] , chanx_left_out[10] ,
|
||||
|
|
@ -1708,32 +1704,32 @@ cbx_1__1__mux_tree_tapbuf_size8_mem mem_top_ipin_14 ( .prog_clk ( prog_clk ) ,
|
|||
.ccff_head ( mux_tree_tapbuf_size8_mem_6_ccff_tail ) ,
|
||||
.ccff_tail ( mux_tree_tapbuf_size8_mem_7_ccff_tail ) ,
|
||||
.mem_out ( mux_tree_tapbuf_size8_7_sram ) , .VDD ( VDD ) , .VSS ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_4 prog_clk_0_FTB00 ( .A ( prog_clk_0_N_in ) ,
|
||||
sky130_fd_sc_hd__buf_1 prog_clk_0_FTB00 ( .A ( prog_clk_0_N_in ) ,
|
||||
.X ( prog_clk[0] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__clkbuf_1 prog_clk_0_W_FTB01 ( .A ( prog_clk_0_N_in ) ,
|
||||
.X ( ctsbuf_net_173 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
.X ( ctsbuf_net_175 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_1 prog_clk_1_N_FTB01 ( .A ( prog_clk_1_E_in ) ,
|
||||
.X ( aps_rename_505_ ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_1 prog_clk_1_S_FTB01 ( .A ( prog_clk_1_E_in ) ,
|
||||
.X ( aps_rename_506_ ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__bufbuf_16 prog_clk_2_W_FTB01 ( .A ( prog_clk_2_W_in ) ,
|
||||
.X ( prog_clk_2_W_out ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__bufbuf_16 prog_clk_1_S_FTB01 ( .A ( prog_clk_1_E_in ) ,
|
||||
.X ( prog_clk_1_S_out ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_1 prog_clk_2_W_FTB01 ( .A ( prog_clk_2_W_in ) ,
|
||||
.X ( net_net_69 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__bufbuf_16 prog_clk_2_E_FTB01 ( .A ( prog_clk_2_W_in ) ,
|
||||
.X ( prog_clk_2_E_out ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__bufbuf_16 prog_clk_3_E_FTB01 ( .A ( prog_clk_3_E_in ) ,
|
||||
.X ( prog_clk_3_E_out ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__bufbuf_16 prog_clk_3_W_FTB01 ( .A ( prog_clk_3_E_in ) ,
|
||||
.X ( prog_clk_3_W_out ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__bufbuf_16 clk_1_N_FTB01 ( .A ( clk_1_E_in ) ,
|
||||
.X ( clk_1_N_out ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__bufbuf_16 clk_1_S_FTB01 ( .A ( clk_1_E_in ) ,
|
||||
.X ( clk_1_S_out ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_1 clk_1_N_FTB01 ( .A ( clk_1_E_in ) , .X ( net_net_70 ) ,
|
||||
.VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_1 clk_1_S_FTB01 ( .A ( clk_1_E_in ) ,
|
||||
.X ( aps_rename_506_ ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__bufbuf_16 clk_2_W_FTB01 ( .A ( clk_2_W_in ) ,
|
||||
.X ( clk_2_W_out ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_1 clk_2_E_FTB01 ( .A ( clk_2_W_in ) , .X ( net_net_68 ) ,
|
||||
sky130_fd_sc_hd__buf_1 clk_2_E_FTB01 ( .A ( clk_2_W_in ) , .X ( net_net_71 ) ,
|
||||
.VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__bufbuf_16 clk_3_E_FTB01 ( .A ( clk_3_E_in ) ,
|
||||
.X ( clk_3_E_out ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_1 clk_3_E_FTB01 ( .A ( clk_3_E_in ) ,
|
||||
.X ( aps_rename_507_ ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__bufbuf_16 clk_3_W_FTB01 ( .A ( clk_3_E_in ) ,
|
||||
.X ( clk_3_W_out ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 FTB_17__16 ( .A ( chanx_left_in[0] ) ,
|
||||
|
|
@ -1818,36 +1814,32 @@ sky130_fd_sc_hd__buf_8 FTB_56__55 ( .A ( chanx_right_in[19] ) ,
|
|||
.X ( chanx_left_out[19] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 FTB_57__56 ( .A ( SC_IN_TOP ) , .X ( SC_OUT_BOT ) ,
|
||||
.VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_1 FTB_58__57 ( .A ( SC_IN_BOT ) , .X ( ropt_net_94 ) ,
|
||||
sky130_fd_sc_hd__buf_8 FTB_58__57 ( .A ( SC_IN_BOT ) , .X ( SC_OUT_TOP ) ,
|
||||
.VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 FTB_59__58 ( .A ( REGIN_FEEDTHROUGH ) ,
|
||||
.X ( REGOUT_FEEDTHROUGH ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__inv_8 BINV_R_64 ( .A ( BUF_net_65 ) ,
|
||||
sky130_fd_sc_hd__inv_8 BINV_R_67 ( .A ( BUF_net_68 ) ,
|
||||
.Y ( prog_clk_1_N_out ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 BINV_R_65 ( .A ( aps_rename_505_ ) ,
|
||||
.Y ( BUF_net_65 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__inv_8 BINV_R_66 ( .A ( BUF_net_67 ) ,
|
||||
.Y ( prog_clk_1_S_out ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 BINV_R_67 ( .A ( aps_rename_506_ ) ,
|
||||
.Y ( BUF_net_67 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 BUFT_RR_68 ( .A ( net_net_68 ) , .X ( clk_2_E_out ) ,
|
||||
sky130_fd_sc_hd__inv_1 BINV_R_68 ( .A ( aps_rename_505_ ) ,
|
||||
.Y ( BUF_net_68 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 BUFT_RR_69 ( .A ( net_net_69 ) ,
|
||||
.X ( prog_clk_2_W_out ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 BUFT_RR_70 ( .A ( net_net_70 ) , .X ( clk_1_N_out ) ,
|
||||
.VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__conb_1 optlc_71 ( .LO ( SYNOPSYS_UNCONNECTED_65 ) ,
|
||||
.HI ( optlc_net_69 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__conb_1 optlc_73 ( .LO ( SYNOPSYS_UNCONNECTED_66 ) ,
|
||||
.HI ( optlc_net_70 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__conb_1 optlc_75 ( .LO ( SYNOPSYS_UNCONNECTED_67 ) ,
|
||||
.HI ( optlc_net_71 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__conb_1 optlc_77 ( .LO ( SYNOPSYS_UNCONNECTED_68 ) ,
|
||||
sky130_fd_sc_hd__buf_6 BUFT_RR_71 ( .A ( net_net_71 ) , .X ( clk_2_E_out ) ,
|
||||
.VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__conb_1 optlc_74 ( .LO ( SYNOPSYS_UNCONNECTED_65 ) ,
|
||||
.HI ( optlc_net_72 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 ropt_mt_inst_1318 ( .A ( ropt_net_94 ) ,
|
||||
.X ( ropt_net_104 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 cts_buf_3521204 ( .A ( ctsbuf_net_173 ) ,
|
||||
sky130_fd_sc_hd__conb_1 optlc_76 ( .LO ( SYNOPSYS_UNCONNECTED_66 ) ,
|
||||
.HI ( optlc_net_73 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__conb_1 optlc_78 ( .LO ( SYNOPSYS_UNCONNECTED_67 ) ,
|
||||
.HI ( optlc_net_74 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 ZBUF_6_f_inst_79 ( .A ( aps_rename_507_ ) ,
|
||||
.X ( clk_3_E_out ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 ZBUF_4_f_inst_80 ( .A ( aps_rename_506_ ) ,
|
||||
.X ( clk_1_S_out ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 cts_buf_3521207 ( .A ( ctsbuf_net_175 ) ,
|
||||
.X ( prog_clk_0_W_out ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 ropt_mt_inst_1325 ( .A ( ropt_net_100 ) ,
|
||||
.X ( ccff_tail[0] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 ropt_mt_inst_1329 ( .A ( ropt_net_104 ) ,
|
||||
.X ( SC_OUT_TOP ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
endmodule
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -13,11 +13,11 @@ output [0:3] mem_out ;
|
|||
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ccff_head[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[0] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_1_ ( .D ( mem_out[0] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_1_ ( .D ( mem_out[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[1] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_2_ ( .D ( mem_out[1] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_2_ ( .D ( mem_out[1] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[2] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_3_ ( .D ( mem_out[2] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_3_ ( .D ( mem_out[2] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[3] ) ) ;
|
||||
sky130_fd_sc_hd__buf_1 FTB_16__15 ( .A ( mem_out[3] ) , .X ( ccff_tail[0] ) ) ;
|
||||
endmodule
|
||||
|
|
@ -32,9 +32,9 @@ output [0:3] mem_out ;
|
|||
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ccff_head[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[0] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_1_ ( .D ( mem_out[0] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_1_ ( .D ( mem_out[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[1] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_2_ ( .D ( mem_out[1] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_2_ ( .D ( mem_out[1] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[2] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_3_ ( .D ( mem_out[2] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[3] ) ) ;
|
||||
|
|
@ -72,7 +72,7 @@ sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ccff_head[0] ) ,
|
|||
.CLK ( prog_clk[0] ) , .Q ( mem_out[0] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_1_ ( .D ( mem_out[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[1] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_2_ ( .D ( mem_out[1] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_2_ ( .D ( mem_out[1] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[2] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_3_ ( .D ( mem_out[2] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[3] ) ) ;
|
||||
|
|
@ -127,7 +127,7 @@ output [0:3] mem_out ;
|
|||
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ccff_head[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[0] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_1_ ( .D ( mem_out[0] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_1_ ( .D ( mem_out[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[1] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_2_ ( .D ( mem_out[1] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[2] ) ) ;
|
||||
|
|
@ -260,8 +260,6 @@ wire [0:0] sky130_fd_sc_hd__mux2_1_5_X ;
|
|||
wire [0:0] sky130_fd_sc_hd__mux2_1_6_X ;
|
||||
wire [0:0] sky130_fd_sc_hd__mux2_1_7_X ;
|
||||
|
||||
sky130_fd_sc_hd__buf_6 sky130_fd_sc_hd__buf_4_0_ (
|
||||
.A ( sky130_fd_sc_hd__mux2_1_7_X[0] ) , .X ( out[0] ) ) ;
|
||||
sky130_fd_sc_hd__mux2_1 mux_l1_in_0_ ( .A0 ( in[1] ) , .A1 ( in[0] ) ,
|
||||
.S ( sram[0] ) , .X ( sky130_fd_sc_hd__mux2_1_0_X[0] ) ) ;
|
||||
sky130_fd_sc_hd__mux2_1 mux_l2_in_0_ ( .A0 ( in[2] ) ,
|
||||
|
|
@ -285,6 +283,8 @@ sky130_fd_sc_hd__mux2_1 mux_l4_in_0_ (
|
|||
.A0 ( sky130_fd_sc_hd__mux2_1_6_X[0] ) ,
|
||||
.A1 ( sky130_fd_sc_hd__mux2_1_5_X[0] ) , .S ( sram[3] ) ,
|
||||
.X ( sky130_fd_sc_hd__mux2_1_7_X[0] ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 BUFT_RR_66 ( .A ( sky130_fd_sc_hd__mux2_1_7_X[0] ) ,
|
||||
.X ( out[0] ) ) ;
|
||||
endmodule
|
||||
|
||||
|
||||
|
|
@ -327,7 +327,7 @@ sky130_fd_sc_hd__mux2_1 mux_l4_in_0_ (
|
|||
.A0 ( sky130_fd_sc_hd__mux2_1_6_X[0] ) ,
|
||||
.A1 ( sky130_fd_sc_hd__mux2_1_5_X[0] ) , .S ( sram[3] ) ,
|
||||
.X ( sky130_fd_sc_hd__mux2_1_7_X[0] ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 BUFT_RR_63 ( .A ( sky130_fd_sc_hd__mux2_1_7_X[0] ) ,
|
||||
sky130_fd_sc_hd__buf_6 BUFT_RR_65 ( .A ( sky130_fd_sc_hd__mux2_1_7_X[0] ) ,
|
||||
.X ( out[0] ) ) ;
|
||||
endmodule
|
||||
|
||||
|
|
@ -436,8 +436,6 @@ wire [0:0] sky130_fd_sc_hd__mux2_1_5_X ;
|
|||
wire [0:0] sky130_fd_sc_hd__mux2_1_6_X ;
|
||||
wire [0:0] sky130_fd_sc_hd__mux2_1_7_X ;
|
||||
|
||||
sky130_fd_sc_hd__buf_6 sky130_fd_sc_hd__buf_4_0_ (
|
||||
.A ( sky130_fd_sc_hd__mux2_1_7_X[0] ) , .X ( out[0] ) ) ;
|
||||
sky130_fd_sc_hd__mux2_1 mux_l1_in_0_ ( .A0 ( in[1] ) , .A1 ( in[0] ) ,
|
||||
.S ( sram[0] ) , .X ( sky130_fd_sc_hd__mux2_1_0_X[0] ) ) ;
|
||||
sky130_fd_sc_hd__mux2_1 mux_l2_in_0_ ( .A0 ( in[2] ) ,
|
||||
|
|
@ -461,6 +459,8 @@ sky130_fd_sc_hd__mux2_1 mux_l4_in_0_ (
|
|||
.A0 ( sky130_fd_sc_hd__mux2_1_6_X[0] ) ,
|
||||
.A1 ( sky130_fd_sc_hd__mux2_1_5_X[0] ) , .S ( sram[3] ) ,
|
||||
.X ( sky130_fd_sc_hd__mux2_1_7_X[0] ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 BUFT_RR_64 ( .A ( sky130_fd_sc_hd__mux2_1_7_X[0] ) ,
|
||||
.X ( out[0] ) ) ;
|
||||
endmodule
|
||||
|
||||
|
||||
|
|
@ -503,7 +503,7 @@ sky130_fd_sc_hd__mux2_1 mux_l4_in_0_ (
|
|||
.A0 ( sky130_fd_sc_hd__mux2_1_6_X[0] ) ,
|
||||
.A1 ( sky130_fd_sc_hd__mux2_1_5_X[0] ) , .S ( sram[3] ) ,
|
||||
.X ( sky130_fd_sc_hd__mux2_1_7_X[0] ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 BUFT_RR_62 ( .A ( sky130_fd_sc_hd__mux2_1_7_X[0] ) ,
|
||||
sky130_fd_sc_hd__buf_6 BUFT_RR_63 ( .A ( sky130_fd_sc_hd__mux2_1_7_X[0] ) ,
|
||||
.X ( out[0] ) ) ;
|
||||
endmodule
|
||||
|
||||
|
|
@ -515,29 +515,25 @@ input [0:0] ccff_head ;
|
|||
output [0:0] ccff_tail ;
|
||||
output [0:3] mem_out ;
|
||||
|
||||
wire copt_net_81 ;
|
||||
wire copt_net_84 ;
|
||||
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ccff_head[0] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ccff_head[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[0] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_1_ ( .D ( mem_out[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[1] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_2_ ( .D ( mem_out[1] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[2] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_3_ ( .D ( mem_out[2] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( copt_net_81 ) ) ;
|
||||
sky130_fd_sc_hd__buf_4 FTB_8__7 ( .A ( copt_net_83 ) , .X ( ccff_tail[0] ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1303 ( .A ( copt_net_81 ) ,
|
||||
.X ( copt_net_80 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1304 ( .A ( copt_net_80 ) ,
|
||||
.X ( mem_out[3] ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1305 ( .A ( mem_out[3] ) ,
|
||||
.X ( copt_net_82 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1306 ( .A ( copt_net_84 ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( copt_net_84 ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 FTB_8__7 ( .A ( mem_out[3] ) , .X ( ccff_tail[0] ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1307 ( .A ( copt_net_87 ) ,
|
||||
.X ( copt_net_83 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1307 ( .A ( copt_net_85 ) ,
|
||||
.X ( copt_net_84 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1308 ( .A ( copt_net_82 ) ,
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1309 ( .A ( copt_net_83 ) ,
|
||||
.X ( copt_net_85 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1310 ( .A ( copt_net_85 ) ,
|
||||
.X ( mem_out[3] ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1311 ( .A ( copt_net_84 ) ,
|
||||
.X ( copt_net_87 ) ) ;
|
||||
endmodule
|
||||
|
||||
|
||||
|
|
@ -554,7 +550,7 @@ sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_1_ ( .D ( mem_out[0] ) ,
|
|||
.CLK ( prog_clk[0] ) , .Q ( mem_out[1] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_2_ ( .D ( mem_out[1] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[2] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_3_ ( .D ( mem_out[2] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_3_ ( .D ( mem_out[2] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[3] ) ) ;
|
||||
sky130_fd_sc_hd__buf_1 FTB_7__6 ( .A ( mem_out[3] ) , .X ( ccff_tail[0] ) ) ;
|
||||
endmodule
|
||||
|
|
@ -662,7 +658,7 @@ input [0:0] ccff_head ;
|
|||
output [0:0] ccff_tail ;
|
||||
output [0:3] mem_out ;
|
||||
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( copt_net_79 ) ,
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ropt_net_103 ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[0] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_1_ ( .D ( mem_out[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[1] ) ) ;
|
||||
|
|
@ -671,18 +667,22 @@ sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_2_ ( .D ( mem_out[1] ) ,
|
|||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_3_ ( .D ( mem_out[2] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[3] ) ) ;
|
||||
sky130_fd_sc_hd__buf_1 FTB_1__0 ( .A ( mem_out[3] ) , .X ( ccff_tail[0] ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1297 ( .A ( ccff_head[0] ) ,
|
||||
.X ( copt_net_74 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1298 ( .A ( copt_net_74 ) ,
|
||||
.X ( copt_net_75 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1299 ( .A ( copt_net_75 ) ,
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1300 ( .A ( copt_net_79 ) ,
|
||||
.X ( copt_net_76 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1300 ( .A ( copt_net_76 ) ,
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1301 ( .A ( copt_net_76 ) ,
|
||||
.X ( copt_net_77 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1301 ( .A ( copt_net_77 ) ,
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1302 ( .A ( copt_net_77 ) ,
|
||||
.X ( copt_net_78 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1302 ( .A ( copt_net_78 ) ,
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1303 ( .A ( ccff_head[0] ) ,
|
||||
.X ( copt_net_79 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1304 ( .A ( copt_net_78 ) ,
|
||||
.X ( copt_net_80 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1305 ( .A ( copt_net_80 ) ,
|
||||
.X ( copt_net_81 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 ropt_h_inst_1323 ( .A ( copt_net_81 ) ,
|
||||
.X ( ropt_net_102 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 ropt_h_inst_1324 ( .A ( ropt_net_102 ) ,
|
||||
.X ( ropt_net_103 ) ) ;
|
||||
endmodule
|
||||
|
||||
|
||||
|
|
@ -733,7 +733,7 @@ sky130_fd_sc_hd__mux2_1 mux_l4_in_0_ (
|
|||
.A0 ( sky130_fd_sc_hd__mux2_1_8_X[0] ) ,
|
||||
.A1 ( sky130_fd_sc_hd__mux2_1_7_X[0] ) , .S ( sram[3] ) ,
|
||||
.X ( sky130_fd_sc_hd__mux2_1_9_X[0] ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 BUFT_RR_61 ( .A ( sky130_fd_sc_hd__mux2_1_9_X[0] ) ,
|
||||
sky130_fd_sc_hd__buf_6 BUFT_RR_62 ( .A ( sky130_fd_sc_hd__mux2_1_9_X[0] ) ,
|
||||
.X ( out[0] ) ) ;
|
||||
endmodule
|
||||
|
||||
|
|
@ -756,8 +756,6 @@ wire [0:0] sky130_fd_sc_hd__mux2_1_7_X ;
|
|||
wire [0:0] sky130_fd_sc_hd__mux2_1_8_X ;
|
||||
wire [0:0] sky130_fd_sc_hd__mux2_1_9_X ;
|
||||
|
||||
sky130_fd_sc_hd__buf_6 sky130_fd_sc_hd__buf_4_0_ (
|
||||
.A ( sky130_fd_sc_hd__mux2_1_9_X[0] ) , .X ( out[0] ) ) ;
|
||||
sky130_fd_sc_hd__mux2_1 mux_l1_in_0_ ( .A0 ( in[1] ) , .A1 ( in[0] ) ,
|
||||
.S ( sram[0] ) , .X ( sky130_fd_sc_hd__mux2_1_0_X[0] ) ) ;
|
||||
sky130_fd_sc_hd__mux2_1 mux_l1_in_1_ ( .A0 ( in[3] ) , .A1 ( in[2] ) ,
|
||||
|
|
@ -787,6 +785,8 @@ sky130_fd_sc_hd__mux2_1 mux_l4_in_0_ (
|
|||
.A0 ( sky130_fd_sc_hd__mux2_1_8_X[0] ) ,
|
||||
.A1 ( sky130_fd_sc_hd__mux2_1_7_X[0] ) , .S ( sram[3] ) ,
|
||||
.X ( sky130_fd_sc_hd__mux2_1_9_X[0] ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 BUFT_RR_61 ( .A ( sky130_fd_sc_hd__mux2_1_9_X[0] ) ,
|
||||
.X ( out[0] ) ) ;
|
||||
endmodule
|
||||
|
||||
|
||||
|
|
@ -1172,7 +1172,6 @@ input clk_3_E_in ;
|
|||
output clk_3_E_out ;
|
||||
output clk_3_W_out ;
|
||||
|
||||
wire ropt_net_94 ;
|
||||
wire [0:0] prog_clk ;
|
||||
wire prog_clk_0 ;
|
||||
wire [0:3] mux_tree_tapbuf_size10_0_sram ;
|
||||
|
|
@ -1232,7 +1231,7 @@ cbx_1__1__mux_tree_tapbuf_size10_1 mux_top_ipin_3 (
|
|||
.sram ( mux_tree_tapbuf_size10_1_sram ) ,
|
||||
.sram_inv ( { SYNOPSYS_UNCONNECTED_5 , SYNOPSYS_UNCONNECTED_6 ,
|
||||
SYNOPSYS_UNCONNECTED_7 , SYNOPSYS_UNCONNECTED_8 } ) ,
|
||||
.out ( bottom_grid_pin_3_ ) , .p0 ( optlc_net_71 ) ) ;
|
||||
.out ( bottom_grid_pin_3_ ) , .p0 ( optlc_net_74 ) ) ;
|
||||
cbx_1__1__mux_tree_tapbuf_size10_2 mux_top_ipin_4 (
|
||||
.in ( { chanx_right_out[0] , chanx_left_out[0] , chanx_right_out[2] ,
|
||||
chanx_left_out[2] , chanx_right_out[4] , chanx_left_out[4] ,
|
||||
|
|
@ -1241,7 +1240,7 @@ cbx_1__1__mux_tree_tapbuf_size10_2 mux_top_ipin_4 (
|
|||
.sram ( mux_tree_tapbuf_size10_2_sram ) ,
|
||||
.sram_inv ( { SYNOPSYS_UNCONNECTED_9 , SYNOPSYS_UNCONNECTED_10 ,
|
||||
SYNOPSYS_UNCONNECTED_11 , SYNOPSYS_UNCONNECTED_12 } ) ,
|
||||
.out ( bottom_grid_pin_4_ ) , .p0 ( optlc_net_69 ) ) ;
|
||||
.out ( bottom_grid_pin_4_ ) , .p0 ( optlc_net_72 ) ) ;
|
||||
cbx_1__1__mux_tree_tapbuf_size10_3 mux_top_ipin_7 (
|
||||
.in ( { chanx_right_out[1] , chanx_left_out[1] , chanx_right_out[3] ,
|
||||
chanx_left_out[3] , chanx_right_out[7] , chanx_left_out[7] ,
|
||||
|
|
@ -1250,7 +1249,7 @@ cbx_1__1__mux_tree_tapbuf_size10_3 mux_top_ipin_7 (
|
|||
.sram ( mux_tree_tapbuf_size10_3_sram ) ,
|
||||
.sram_inv ( { SYNOPSYS_UNCONNECTED_13 , SYNOPSYS_UNCONNECTED_14 ,
|
||||
SYNOPSYS_UNCONNECTED_15 , SYNOPSYS_UNCONNECTED_16 } ) ,
|
||||
.out ( bottom_grid_pin_7_ ) , .p0 ( optlc_net_71 ) ) ;
|
||||
.out ( bottom_grid_pin_7_ ) , .p0 ( optlc_net_74 ) ) ;
|
||||
cbx_1__1__mux_tree_tapbuf_size10_4 mux_top_ipin_8 (
|
||||
.in ( { chanx_right_out[0] , chanx_left_out[0] , chanx_right_out[2] ,
|
||||
chanx_left_out[2] , chanx_right_out[8] , chanx_left_out[8] ,
|
||||
|
|
@ -1268,7 +1267,7 @@ cbx_1__1__mux_tree_tapbuf_size10_5 mux_top_ipin_11 (
|
|||
.sram ( mux_tree_tapbuf_size10_5_sram ) ,
|
||||
.sram_inv ( { SYNOPSYS_UNCONNECTED_21 , SYNOPSYS_UNCONNECTED_22 ,
|
||||
SYNOPSYS_UNCONNECTED_23 , SYNOPSYS_UNCONNECTED_24 } ) ,
|
||||
.out ( bottom_grid_pin_11_ ) , .p0 ( optlc_net_70 ) ) ;
|
||||
.out ( bottom_grid_pin_11_ ) , .p0 ( optlc_net_73 ) ) ;
|
||||
cbx_1__1__mux_tree_tapbuf_size10_6 mux_top_ipin_12 (
|
||||
.in ( { chanx_right_out[0] , chanx_left_out[0] , chanx_right_out[2] ,
|
||||
chanx_left_out[2] , chanx_right_out[6] , chanx_left_out[6] ,
|
||||
|
|
@ -1286,7 +1285,7 @@ cbx_1__1__mux_tree_tapbuf_size10 mux_top_ipin_15 (
|
|||
.sram ( mux_tree_tapbuf_size10_7_sram ) ,
|
||||
.sram_inv ( { SYNOPSYS_UNCONNECTED_29 , SYNOPSYS_UNCONNECTED_30 ,
|
||||
SYNOPSYS_UNCONNECTED_31 , SYNOPSYS_UNCONNECTED_32 } ) ,
|
||||
.out ( bottom_grid_pin_15_ ) , .p0 ( optlc_net_70 ) ) ;
|
||||
.out ( bottom_grid_pin_15_ ) , .p0 ( optlc_net_73 ) ) ;
|
||||
cbx_1__1__mux_tree_tapbuf_size10_mem_0 mem_top_ipin_0 (
|
||||
.prog_clk ( prog_clk ) , .ccff_head ( ccff_head ) ,
|
||||
.ccff_tail ( mux_tree_tapbuf_size10_mem_0_ccff_tail ) ,
|
||||
|
|
@ -1323,9 +1322,8 @@ cbx_1__1__mux_tree_tapbuf_size10_mem_6 mem_top_ipin_12 (
|
|||
.mem_out ( mux_tree_tapbuf_size10_6_sram ) ) ;
|
||||
cbx_1__1__mux_tree_tapbuf_size10_mem mem_top_ipin_15 (
|
||||
.prog_clk ( prog_clk ) ,
|
||||
.ccff_head ( mux_tree_tapbuf_size8_mem_7_ccff_tail ) ,
|
||||
.ccff_tail ( { ropt_net_100 } ) ,
|
||||
.mem_out ( mux_tree_tapbuf_size10_7_sram ) ) ;
|
||||
.ccff_head ( mux_tree_tapbuf_size8_mem_7_ccff_tail ) ,
|
||||
.ccff_tail ( ccff_tail ) , .mem_out ( mux_tree_tapbuf_size10_7_sram ) ) ;
|
||||
cbx_1__1__mux_tree_tapbuf_size8_0 mux_top_ipin_1 (
|
||||
.in ( { chanx_right_out[1] , chanx_left_out[1] , chanx_right_out[3] ,
|
||||
chanx_left_out[3] , chanx_right_out[5] , chanx_left_out[5] ,
|
||||
|
|
@ -1333,7 +1331,7 @@ cbx_1__1__mux_tree_tapbuf_size8_0 mux_top_ipin_1 (
|
|||
.sram ( mux_tree_tapbuf_size8_0_sram ) ,
|
||||
.sram_inv ( { SYNOPSYS_UNCONNECTED_33 , SYNOPSYS_UNCONNECTED_34 ,
|
||||
SYNOPSYS_UNCONNECTED_35 , SYNOPSYS_UNCONNECTED_36 } ) ,
|
||||
.out ( bottom_grid_pin_1_ ) , .p0 ( optlc_net_71 ) ) ;
|
||||
.out ( bottom_grid_pin_1_ ) , .p0 ( optlc_net_73 ) ) ;
|
||||
cbx_1__1__mux_tree_tapbuf_size8_1 mux_top_ipin_2 (
|
||||
.in ( { chanx_right_out[0] , chanx_left_out[0] , chanx_right_out[2] ,
|
||||
chanx_left_out[2] , chanx_right_out[6] , chanx_left_out[6] ,
|
||||
|
|
@ -1341,7 +1339,7 @@ cbx_1__1__mux_tree_tapbuf_size8_1 mux_top_ipin_2 (
|
|||
.sram ( mux_tree_tapbuf_size8_1_sram ) ,
|
||||
.sram_inv ( { SYNOPSYS_UNCONNECTED_37 , SYNOPSYS_UNCONNECTED_38 ,
|
||||
SYNOPSYS_UNCONNECTED_39 , SYNOPSYS_UNCONNECTED_40 } ) ,
|
||||
.out ( bottom_grid_pin_2_ ) , .p0 ( optlc_net_69 ) ) ;
|
||||
.out ( bottom_grid_pin_2_ ) , .p0 ( optlc_net_72 ) ) ;
|
||||
cbx_1__1__mux_tree_tapbuf_size8_2 mux_top_ipin_5 (
|
||||
.in ( { chanx_right_out[1] , chanx_left_out[1] , chanx_right_out[3] ,
|
||||
chanx_left_out[3] , chanx_right_out[9] , chanx_left_out[9] ,
|
||||
|
|
@ -1349,7 +1347,7 @@ cbx_1__1__mux_tree_tapbuf_size8_2 mux_top_ipin_5 (
|
|||
.sram ( mux_tree_tapbuf_size8_2_sram ) ,
|
||||
.sram_inv ( { SYNOPSYS_UNCONNECTED_41 , SYNOPSYS_UNCONNECTED_42 ,
|
||||
SYNOPSYS_UNCONNECTED_43 , SYNOPSYS_UNCONNECTED_44 } ) ,
|
||||
.out ( bottom_grid_pin_5_ ) , .p0 ( optlc_net_71 ) ) ;
|
||||
.out ( bottom_grid_pin_5_ ) , .p0 ( optlc_net_73 ) ) ;
|
||||
cbx_1__1__mux_tree_tapbuf_size8_3 mux_top_ipin_6 (
|
||||
.in ( { chanx_right_out[0] , chanx_left_out[0] , chanx_right_out[2] ,
|
||||
chanx_left_out[2] , chanx_right_out[10] , chanx_left_out[10] ,
|
||||
|
|
@ -1357,7 +1355,7 @@ cbx_1__1__mux_tree_tapbuf_size8_3 mux_top_ipin_6 (
|
|||
.sram ( mux_tree_tapbuf_size8_3_sram ) ,
|
||||
.sram_inv ( { SYNOPSYS_UNCONNECTED_45 , SYNOPSYS_UNCONNECTED_46 ,
|
||||
SYNOPSYS_UNCONNECTED_47 , SYNOPSYS_UNCONNECTED_48 } ) ,
|
||||
.out ( bottom_grid_pin_6_ ) , .p0 ( optlc_net_69 ) ) ;
|
||||
.out ( bottom_grid_pin_6_ ) , .p0 ( optlc_net_72 ) ) ;
|
||||
cbx_1__1__mux_tree_tapbuf_size8_4 mux_top_ipin_9 (
|
||||
.in ( { chanx_right_out[1] , chanx_left_out[1] , chanx_right_out[3] ,
|
||||
chanx_left_out[3] , chanx_right_out[5] , chanx_left_out[5] ,
|
||||
|
|
@ -1365,7 +1363,7 @@ cbx_1__1__mux_tree_tapbuf_size8_4 mux_top_ipin_9 (
|
|||
.sram ( mux_tree_tapbuf_size8_4_sram ) ,
|
||||
.sram_inv ( { SYNOPSYS_UNCONNECTED_49 , SYNOPSYS_UNCONNECTED_50 ,
|
||||
SYNOPSYS_UNCONNECTED_51 , SYNOPSYS_UNCONNECTED_52 } ) ,
|
||||
.out ( bottom_grid_pin_9_ ) , .p0 ( optlc_net_70 ) ) ;
|
||||
.out ( bottom_grid_pin_9_ ) , .p0 ( optlc_net_73 ) ) ;
|
||||
cbx_1__1__mux_tree_tapbuf_size8_5 mux_top_ipin_10 (
|
||||
.in ( { chanx_right_out[0] , chanx_left_out[0] , chanx_right_out[2] ,
|
||||
chanx_left_out[2] , chanx_right_out[6] , chanx_left_out[6] ,
|
||||
|
|
@ -1381,7 +1379,7 @@ cbx_1__1__mux_tree_tapbuf_size8_6 mux_top_ipin_13 (
|
|||
.sram ( mux_tree_tapbuf_size8_6_sram ) ,
|
||||
.sram_inv ( { SYNOPSYS_UNCONNECTED_57 , SYNOPSYS_UNCONNECTED_58 ,
|
||||
SYNOPSYS_UNCONNECTED_59 , SYNOPSYS_UNCONNECTED_60 } ) ,
|
||||
.out ( bottom_grid_pin_13_ ) , .p0 ( optlc_net_70 ) ) ;
|
||||
.out ( bottom_grid_pin_13_ ) , .p0 ( optlc_net_73 ) ) ;
|
||||
cbx_1__1__mux_tree_tapbuf_size8 mux_top_ipin_14 (
|
||||
.in ( { chanx_right_out[0] , chanx_left_out[0] , chanx_right_out[2] ,
|
||||
chanx_left_out[2] , chanx_right_out[10] , chanx_left_out[10] ,
|
||||
|
|
@ -1429,31 +1427,30 @@ cbx_1__1__mux_tree_tapbuf_size8_mem mem_top_ipin_14 ( .prog_clk ( prog_clk ) ,
|
|||
.ccff_head ( mux_tree_tapbuf_size8_mem_6_ccff_tail ) ,
|
||||
.ccff_tail ( mux_tree_tapbuf_size8_mem_7_ccff_tail ) ,
|
||||
.mem_out ( mux_tree_tapbuf_size8_7_sram ) ) ;
|
||||
sky130_fd_sc_hd__buf_4 prog_clk_0_FTB00 ( .A ( prog_clk_0_N_in ) ,
|
||||
sky130_fd_sc_hd__buf_1 prog_clk_0_FTB00 ( .A ( prog_clk_0_N_in ) ,
|
||||
.X ( prog_clk[0] ) ) ;
|
||||
sky130_fd_sc_hd__clkbuf_1 prog_clk_0_W_FTB01 ( .A ( prog_clk_0_N_in ) ,
|
||||
.X ( ctsbuf_net_173 ) ) ;
|
||||
.X ( ctsbuf_net_175 ) ) ;
|
||||
sky130_fd_sc_hd__buf_1 prog_clk_1_N_FTB01 ( .A ( prog_clk_1_E_in ) ,
|
||||
.X ( aps_rename_505_ ) ) ;
|
||||
sky130_fd_sc_hd__buf_1 prog_clk_1_S_FTB01 ( .A ( prog_clk_1_E_in ) ,
|
||||
.X ( aps_rename_506_ ) ) ;
|
||||
sky130_fd_sc_hd__bufbuf_16 prog_clk_2_W_FTB01 ( .A ( prog_clk_2_W_in ) ,
|
||||
.X ( prog_clk_2_W_out ) ) ;
|
||||
sky130_fd_sc_hd__bufbuf_16 prog_clk_1_S_FTB01 ( .A ( prog_clk_1_E_in ) ,
|
||||
.X ( prog_clk_1_S_out ) ) ;
|
||||
sky130_fd_sc_hd__buf_1 prog_clk_2_W_FTB01 ( .A ( prog_clk_2_W_in ) ,
|
||||
.X ( net_net_69 ) ) ;
|
||||
sky130_fd_sc_hd__bufbuf_16 prog_clk_2_E_FTB01 ( .A ( prog_clk_2_W_in ) ,
|
||||
.X ( prog_clk_2_E_out ) ) ;
|
||||
sky130_fd_sc_hd__bufbuf_16 prog_clk_3_E_FTB01 ( .A ( prog_clk_3_E_in ) ,
|
||||
.X ( prog_clk_3_E_out ) ) ;
|
||||
sky130_fd_sc_hd__bufbuf_16 prog_clk_3_W_FTB01 ( .A ( prog_clk_3_E_in ) ,
|
||||
.X ( prog_clk_3_W_out ) ) ;
|
||||
sky130_fd_sc_hd__bufbuf_16 clk_1_N_FTB01 ( .A ( clk_1_E_in ) ,
|
||||
.X ( clk_1_N_out ) ) ;
|
||||
sky130_fd_sc_hd__bufbuf_16 clk_1_S_FTB01 ( .A ( clk_1_E_in ) ,
|
||||
.X ( clk_1_S_out ) ) ;
|
||||
sky130_fd_sc_hd__buf_1 clk_1_N_FTB01 ( .A ( clk_1_E_in ) , .X ( net_net_70 ) ) ;
|
||||
sky130_fd_sc_hd__buf_1 clk_1_S_FTB01 ( .A ( clk_1_E_in ) ,
|
||||
.X ( aps_rename_506_ ) ) ;
|
||||
sky130_fd_sc_hd__bufbuf_16 clk_2_W_FTB01 ( .A ( clk_2_W_in ) ,
|
||||
.X ( clk_2_W_out ) ) ;
|
||||
sky130_fd_sc_hd__buf_1 clk_2_E_FTB01 ( .A ( clk_2_W_in ) , .X ( net_net_68 ) ) ;
|
||||
sky130_fd_sc_hd__bufbuf_16 clk_3_E_FTB01 ( .A ( clk_3_E_in ) ,
|
||||
.X ( clk_3_E_out ) ) ;
|
||||
sky130_fd_sc_hd__buf_1 clk_2_E_FTB01 ( .A ( clk_2_W_in ) , .X ( net_net_71 ) ) ;
|
||||
sky130_fd_sc_hd__buf_1 clk_3_E_FTB01 ( .A ( clk_3_E_in ) ,
|
||||
.X ( aps_rename_507_ ) ) ;
|
||||
sky130_fd_sc_hd__bufbuf_16 clk_3_W_FTB01 ( .A ( clk_3_E_in ) ,
|
||||
.X ( clk_3_W_out ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 FTB_17__16 ( .A ( chanx_left_in[0] ) ,
|
||||
|
|
@ -1537,34 +1534,29 @@ sky130_fd_sc_hd__buf_8 FTB_55__54 ( .A ( chanx_right_in[18] ) ,
|
|||
sky130_fd_sc_hd__buf_8 FTB_56__55 ( .A ( chanx_right_in[19] ) ,
|
||||
.X ( chanx_left_out[19] ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 FTB_57__56 ( .A ( SC_IN_TOP ) , .X ( SC_OUT_BOT ) ) ;
|
||||
sky130_fd_sc_hd__buf_1 FTB_58__57 ( .A ( SC_IN_BOT ) , .X ( ropt_net_94 ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 FTB_58__57 ( .A ( SC_IN_BOT ) , .X ( SC_OUT_TOP ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 FTB_59__58 ( .A ( REGIN_FEEDTHROUGH ) ,
|
||||
.X ( REGOUT_FEEDTHROUGH ) ) ;
|
||||
sky130_fd_sc_hd__inv_8 BINV_R_64 ( .A ( BUF_net_65 ) ,
|
||||
sky130_fd_sc_hd__inv_8 BINV_R_67 ( .A ( BUF_net_68 ) ,
|
||||
.Y ( prog_clk_1_N_out ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 BINV_R_65 ( .A ( aps_rename_505_ ) ,
|
||||
.Y ( BUF_net_65 ) ) ;
|
||||
sky130_fd_sc_hd__inv_8 BINV_R_66 ( .A ( BUF_net_67 ) ,
|
||||
.Y ( prog_clk_1_S_out ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 BINV_R_67 ( .A ( aps_rename_506_ ) ,
|
||||
.Y ( BUF_net_67 ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 BUFT_RR_68 ( .A ( net_net_68 ) , .X ( clk_2_E_out ) ) ;
|
||||
sky130_fd_sc_hd__conb_1 optlc_71 ( .LO ( SYNOPSYS_UNCONNECTED_65 ) ,
|
||||
.HI ( optlc_net_69 ) ) ;
|
||||
sky130_fd_sc_hd__conb_1 optlc_73 ( .LO ( SYNOPSYS_UNCONNECTED_66 ) ,
|
||||
.HI ( optlc_net_70 ) ) ;
|
||||
sky130_fd_sc_hd__conb_1 optlc_75 ( .LO ( SYNOPSYS_UNCONNECTED_67 ) ,
|
||||
.HI ( optlc_net_71 ) ) ;
|
||||
sky130_fd_sc_hd__conb_1 optlc_77 ( .LO ( SYNOPSYS_UNCONNECTED_68 ) ,
|
||||
sky130_fd_sc_hd__inv_1 BINV_R_68 ( .A ( aps_rename_505_ ) ,
|
||||
.Y ( BUF_net_68 ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 BUFT_RR_69 ( .A ( net_net_69 ) ,
|
||||
.X ( prog_clk_2_W_out ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 BUFT_RR_70 ( .A ( net_net_70 ) , .X ( clk_1_N_out ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 BUFT_RR_71 ( .A ( net_net_71 ) , .X ( clk_2_E_out ) ) ;
|
||||
sky130_fd_sc_hd__conb_1 optlc_74 ( .LO ( SYNOPSYS_UNCONNECTED_65 ) ,
|
||||
.HI ( optlc_net_72 ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 ropt_mt_inst_1318 ( .A ( ropt_net_94 ) ,
|
||||
.X ( ropt_net_104 ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 cts_buf_3521204 ( .A ( ctsbuf_net_173 ) ,
|
||||
sky130_fd_sc_hd__conb_1 optlc_76 ( .LO ( SYNOPSYS_UNCONNECTED_66 ) ,
|
||||
.HI ( optlc_net_73 ) ) ;
|
||||
sky130_fd_sc_hd__conb_1 optlc_78 ( .LO ( SYNOPSYS_UNCONNECTED_67 ) ,
|
||||
.HI ( optlc_net_74 ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 ZBUF_6_f_inst_79 ( .A ( aps_rename_507_ ) ,
|
||||
.X ( clk_3_E_out ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 ZBUF_4_f_inst_80 ( .A ( aps_rename_506_ ) ,
|
||||
.X ( clk_1_S_out ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 cts_buf_3521207 ( .A ( ctsbuf_net_175 ) ,
|
||||
.X ( prog_clk_0_W_out ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 ropt_mt_inst_1325 ( .A ( ropt_net_100 ) ,
|
||||
.X ( ccff_tail[0] ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 ropt_mt_inst_1329 ( .A ( ropt_net_104 ) ,
|
||||
.X ( SC_OUT_TOP ) ) ;
|
||||
endmodule
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -74,7 +74,6 @@ input clk_3_E_in ;
|
|||
output clk_3_E_out ;
|
||||
output clk_3_W_out ;
|
||||
|
||||
wire ropt_net_94 ;
|
||||
wire [0:0] prog_clk ;
|
||||
wire prog_clk_0 ;
|
||||
wire [0:3] mux_tree_tapbuf_size10_0_sram ;
|
||||
|
|
@ -134,7 +133,7 @@ cbx_1__1__mux_tree_tapbuf_size10_1 mux_top_ipin_3 (
|
|||
.sram ( mux_tree_tapbuf_size10_1_sram ) ,
|
||||
.sram_inv ( { SYNOPSYS_UNCONNECTED_5 , SYNOPSYS_UNCONNECTED_6 ,
|
||||
SYNOPSYS_UNCONNECTED_7 , SYNOPSYS_UNCONNECTED_8 } ) ,
|
||||
.out ( bottom_grid_pin_3_ ) , .p0 ( optlc_net_71 ) ) ;
|
||||
.out ( bottom_grid_pin_3_ ) , .p0 ( optlc_net_74 ) ) ;
|
||||
cbx_1__1__mux_tree_tapbuf_size10_2 mux_top_ipin_4 (
|
||||
.in ( { chanx_right_out[0] , chanx_left_out[0] , chanx_right_out[2] ,
|
||||
chanx_left_out[2] , chanx_right_out[4] , chanx_left_out[4] ,
|
||||
|
|
@ -143,7 +142,7 @@ cbx_1__1__mux_tree_tapbuf_size10_2 mux_top_ipin_4 (
|
|||
.sram ( mux_tree_tapbuf_size10_2_sram ) ,
|
||||
.sram_inv ( { SYNOPSYS_UNCONNECTED_9 , SYNOPSYS_UNCONNECTED_10 ,
|
||||
SYNOPSYS_UNCONNECTED_11 , SYNOPSYS_UNCONNECTED_12 } ) ,
|
||||
.out ( bottom_grid_pin_4_ ) , .p0 ( optlc_net_69 ) ) ;
|
||||
.out ( bottom_grid_pin_4_ ) , .p0 ( optlc_net_72 ) ) ;
|
||||
cbx_1__1__mux_tree_tapbuf_size10_3 mux_top_ipin_7 (
|
||||
.in ( { chanx_right_out[1] , chanx_left_out[1] , chanx_right_out[3] ,
|
||||
chanx_left_out[3] , chanx_right_out[7] , chanx_left_out[7] ,
|
||||
|
|
@ -152,7 +151,7 @@ cbx_1__1__mux_tree_tapbuf_size10_3 mux_top_ipin_7 (
|
|||
.sram ( mux_tree_tapbuf_size10_3_sram ) ,
|
||||
.sram_inv ( { SYNOPSYS_UNCONNECTED_13 , SYNOPSYS_UNCONNECTED_14 ,
|
||||
SYNOPSYS_UNCONNECTED_15 , SYNOPSYS_UNCONNECTED_16 } ) ,
|
||||
.out ( bottom_grid_pin_7_ ) , .p0 ( optlc_net_71 ) ) ;
|
||||
.out ( bottom_grid_pin_7_ ) , .p0 ( optlc_net_74 ) ) ;
|
||||
cbx_1__1__mux_tree_tapbuf_size10_4 mux_top_ipin_8 (
|
||||
.in ( { chanx_right_out[0] , chanx_left_out[0] , chanx_right_out[2] ,
|
||||
chanx_left_out[2] , chanx_right_out[8] , chanx_left_out[8] ,
|
||||
|
|
@ -170,7 +169,7 @@ cbx_1__1__mux_tree_tapbuf_size10_5 mux_top_ipin_11 (
|
|||
.sram ( mux_tree_tapbuf_size10_5_sram ) ,
|
||||
.sram_inv ( { SYNOPSYS_UNCONNECTED_21 , SYNOPSYS_UNCONNECTED_22 ,
|
||||
SYNOPSYS_UNCONNECTED_23 , SYNOPSYS_UNCONNECTED_24 } ) ,
|
||||
.out ( bottom_grid_pin_11_ ) , .p0 ( optlc_net_70 ) ) ;
|
||||
.out ( bottom_grid_pin_11_ ) , .p0 ( optlc_net_73 ) ) ;
|
||||
cbx_1__1__mux_tree_tapbuf_size10_6 mux_top_ipin_12 (
|
||||
.in ( { chanx_right_out[0] , chanx_left_out[0] , chanx_right_out[2] ,
|
||||
chanx_left_out[2] , chanx_right_out[6] , chanx_left_out[6] ,
|
||||
|
|
@ -188,7 +187,7 @@ cbx_1__1__mux_tree_tapbuf_size10 mux_top_ipin_15 (
|
|||
.sram ( mux_tree_tapbuf_size10_7_sram ) ,
|
||||
.sram_inv ( { SYNOPSYS_UNCONNECTED_29 , SYNOPSYS_UNCONNECTED_30 ,
|
||||
SYNOPSYS_UNCONNECTED_31 , SYNOPSYS_UNCONNECTED_32 } ) ,
|
||||
.out ( bottom_grid_pin_15_ ) , .p0 ( optlc_net_70 ) ) ;
|
||||
.out ( bottom_grid_pin_15_ ) , .p0 ( optlc_net_73 ) ) ;
|
||||
cbx_1__1__mux_tree_tapbuf_size10_mem_0 mem_top_ipin_0 (
|
||||
.prog_clk ( prog_clk ) , .ccff_head ( ccff_head ) ,
|
||||
.ccff_tail ( mux_tree_tapbuf_size10_mem_0_ccff_tail ) ,
|
||||
|
|
@ -225,9 +224,8 @@ cbx_1__1__mux_tree_tapbuf_size10_mem_6 mem_top_ipin_12 (
|
|||
.mem_out ( mux_tree_tapbuf_size10_6_sram ) ) ;
|
||||
cbx_1__1__mux_tree_tapbuf_size10_mem mem_top_ipin_15 (
|
||||
.prog_clk ( prog_clk ) ,
|
||||
.ccff_head ( mux_tree_tapbuf_size8_mem_7_ccff_tail ) ,
|
||||
.ccff_tail ( { ropt_net_100 } ) ,
|
||||
.mem_out ( mux_tree_tapbuf_size10_7_sram ) ) ;
|
||||
.ccff_head ( mux_tree_tapbuf_size8_mem_7_ccff_tail ) ,
|
||||
.ccff_tail ( ccff_tail ) , .mem_out ( mux_tree_tapbuf_size10_7_sram ) ) ;
|
||||
cbx_1__1__mux_tree_tapbuf_size8_0 mux_top_ipin_1 (
|
||||
.in ( { chanx_right_out[1] , chanx_left_out[1] , chanx_right_out[3] ,
|
||||
chanx_left_out[3] , chanx_right_out[5] , chanx_left_out[5] ,
|
||||
|
|
@ -235,7 +233,7 @@ cbx_1__1__mux_tree_tapbuf_size8_0 mux_top_ipin_1 (
|
|||
.sram ( mux_tree_tapbuf_size8_0_sram ) ,
|
||||
.sram_inv ( { SYNOPSYS_UNCONNECTED_33 , SYNOPSYS_UNCONNECTED_34 ,
|
||||
SYNOPSYS_UNCONNECTED_35 , SYNOPSYS_UNCONNECTED_36 } ) ,
|
||||
.out ( bottom_grid_pin_1_ ) , .p0 ( optlc_net_71 ) ) ;
|
||||
.out ( bottom_grid_pin_1_ ) , .p0 ( optlc_net_73 ) ) ;
|
||||
cbx_1__1__mux_tree_tapbuf_size8_1 mux_top_ipin_2 (
|
||||
.in ( { chanx_right_out[0] , chanx_left_out[0] , chanx_right_out[2] ,
|
||||
chanx_left_out[2] , chanx_right_out[6] , chanx_left_out[6] ,
|
||||
|
|
@ -243,7 +241,7 @@ cbx_1__1__mux_tree_tapbuf_size8_1 mux_top_ipin_2 (
|
|||
.sram ( mux_tree_tapbuf_size8_1_sram ) ,
|
||||
.sram_inv ( { SYNOPSYS_UNCONNECTED_37 , SYNOPSYS_UNCONNECTED_38 ,
|
||||
SYNOPSYS_UNCONNECTED_39 , SYNOPSYS_UNCONNECTED_40 } ) ,
|
||||
.out ( bottom_grid_pin_2_ ) , .p0 ( optlc_net_69 ) ) ;
|
||||
.out ( bottom_grid_pin_2_ ) , .p0 ( optlc_net_72 ) ) ;
|
||||
cbx_1__1__mux_tree_tapbuf_size8_2 mux_top_ipin_5 (
|
||||
.in ( { chanx_right_out[1] , chanx_left_out[1] , chanx_right_out[3] ,
|
||||
chanx_left_out[3] , chanx_right_out[9] , chanx_left_out[9] ,
|
||||
|
|
@ -251,7 +249,7 @@ cbx_1__1__mux_tree_tapbuf_size8_2 mux_top_ipin_5 (
|
|||
.sram ( mux_tree_tapbuf_size8_2_sram ) ,
|
||||
.sram_inv ( { SYNOPSYS_UNCONNECTED_41 , SYNOPSYS_UNCONNECTED_42 ,
|
||||
SYNOPSYS_UNCONNECTED_43 , SYNOPSYS_UNCONNECTED_44 } ) ,
|
||||
.out ( bottom_grid_pin_5_ ) , .p0 ( optlc_net_71 ) ) ;
|
||||
.out ( bottom_grid_pin_5_ ) , .p0 ( optlc_net_73 ) ) ;
|
||||
cbx_1__1__mux_tree_tapbuf_size8_3 mux_top_ipin_6 (
|
||||
.in ( { chanx_right_out[0] , chanx_left_out[0] , chanx_right_out[2] ,
|
||||
chanx_left_out[2] , chanx_right_out[10] , chanx_left_out[10] ,
|
||||
|
|
@ -259,7 +257,7 @@ cbx_1__1__mux_tree_tapbuf_size8_3 mux_top_ipin_6 (
|
|||
.sram ( mux_tree_tapbuf_size8_3_sram ) ,
|
||||
.sram_inv ( { SYNOPSYS_UNCONNECTED_45 , SYNOPSYS_UNCONNECTED_46 ,
|
||||
SYNOPSYS_UNCONNECTED_47 , SYNOPSYS_UNCONNECTED_48 } ) ,
|
||||
.out ( bottom_grid_pin_6_ ) , .p0 ( optlc_net_69 ) ) ;
|
||||
.out ( bottom_grid_pin_6_ ) , .p0 ( optlc_net_72 ) ) ;
|
||||
cbx_1__1__mux_tree_tapbuf_size8_4 mux_top_ipin_9 (
|
||||
.in ( { chanx_right_out[1] , chanx_left_out[1] , chanx_right_out[3] ,
|
||||
chanx_left_out[3] , chanx_right_out[5] , chanx_left_out[5] ,
|
||||
|
|
@ -267,7 +265,7 @@ cbx_1__1__mux_tree_tapbuf_size8_4 mux_top_ipin_9 (
|
|||
.sram ( mux_tree_tapbuf_size8_4_sram ) ,
|
||||
.sram_inv ( { SYNOPSYS_UNCONNECTED_49 , SYNOPSYS_UNCONNECTED_50 ,
|
||||
SYNOPSYS_UNCONNECTED_51 , SYNOPSYS_UNCONNECTED_52 } ) ,
|
||||
.out ( bottom_grid_pin_9_ ) , .p0 ( optlc_net_70 ) ) ;
|
||||
.out ( bottom_grid_pin_9_ ) , .p0 ( optlc_net_73 ) ) ;
|
||||
cbx_1__1__mux_tree_tapbuf_size8_5 mux_top_ipin_10 (
|
||||
.in ( { chanx_right_out[0] , chanx_left_out[0] , chanx_right_out[2] ,
|
||||
chanx_left_out[2] , chanx_right_out[6] , chanx_left_out[6] ,
|
||||
|
|
@ -283,7 +281,7 @@ cbx_1__1__mux_tree_tapbuf_size8_6 mux_top_ipin_13 (
|
|||
.sram ( mux_tree_tapbuf_size8_6_sram ) ,
|
||||
.sram_inv ( { SYNOPSYS_UNCONNECTED_57 , SYNOPSYS_UNCONNECTED_58 ,
|
||||
SYNOPSYS_UNCONNECTED_59 , SYNOPSYS_UNCONNECTED_60 } ) ,
|
||||
.out ( bottom_grid_pin_13_ ) , .p0 ( optlc_net_70 ) ) ;
|
||||
.out ( bottom_grid_pin_13_ ) , .p0 ( optlc_net_73 ) ) ;
|
||||
cbx_1__1__mux_tree_tapbuf_size8 mux_top_ipin_14 (
|
||||
.in ( { chanx_right_out[0] , chanx_left_out[0] , chanx_right_out[2] ,
|
||||
chanx_left_out[2] , chanx_right_out[10] , chanx_left_out[10] ,
|
||||
|
|
@ -331,31 +329,30 @@ cbx_1__1__mux_tree_tapbuf_size8_mem mem_top_ipin_14 ( .prog_clk ( prog_clk ) ,
|
|||
.ccff_head ( mux_tree_tapbuf_size8_mem_6_ccff_tail ) ,
|
||||
.ccff_tail ( mux_tree_tapbuf_size8_mem_7_ccff_tail ) ,
|
||||
.mem_out ( mux_tree_tapbuf_size8_7_sram ) ) ;
|
||||
sky130_fd_sc_hd__buf_4 prog_clk_0_FTB00 ( .A ( prog_clk_0_N_in ) ,
|
||||
sky130_fd_sc_hd__buf_1 prog_clk_0_FTB00 ( .A ( prog_clk_0_N_in ) ,
|
||||
.X ( prog_clk[0] ) ) ;
|
||||
sky130_fd_sc_hd__clkbuf_1 prog_clk_0_W_FTB01 ( .A ( prog_clk_0_N_in ) ,
|
||||
.X ( ctsbuf_net_173 ) ) ;
|
||||
.X ( ctsbuf_net_175 ) ) ;
|
||||
sky130_fd_sc_hd__buf_1 prog_clk_1_N_FTB01 ( .A ( prog_clk_1_E_in ) ,
|
||||
.X ( aps_rename_505_ ) ) ;
|
||||
sky130_fd_sc_hd__buf_1 prog_clk_1_S_FTB01 ( .A ( prog_clk_1_E_in ) ,
|
||||
.X ( aps_rename_506_ ) ) ;
|
||||
sky130_fd_sc_hd__bufbuf_16 prog_clk_2_W_FTB01 ( .A ( prog_clk_2_W_in ) ,
|
||||
.X ( prog_clk_2_W_out ) ) ;
|
||||
sky130_fd_sc_hd__bufbuf_16 prog_clk_1_S_FTB01 ( .A ( prog_clk_1_E_in ) ,
|
||||
.X ( prog_clk_1_S_out ) ) ;
|
||||
sky130_fd_sc_hd__buf_1 prog_clk_2_W_FTB01 ( .A ( prog_clk_2_W_in ) ,
|
||||
.X ( net_net_69 ) ) ;
|
||||
sky130_fd_sc_hd__bufbuf_16 prog_clk_2_E_FTB01 ( .A ( prog_clk_2_W_in ) ,
|
||||
.X ( prog_clk_2_E_out ) ) ;
|
||||
sky130_fd_sc_hd__bufbuf_16 prog_clk_3_E_FTB01 ( .A ( prog_clk_3_E_in ) ,
|
||||
.X ( prog_clk_3_E_out ) ) ;
|
||||
sky130_fd_sc_hd__bufbuf_16 prog_clk_3_W_FTB01 ( .A ( prog_clk_3_E_in ) ,
|
||||
.X ( prog_clk_3_W_out ) ) ;
|
||||
sky130_fd_sc_hd__bufbuf_16 clk_1_N_FTB01 ( .A ( clk_1_E_in ) ,
|
||||
.X ( clk_1_N_out ) ) ;
|
||||
sky130_fd_sc_hd__bufbuf_16 clk_1_S_FTB01 ( .A ( clk_1_E_in ) ,
|
||||
.X ( clk_1_S_out ) ) ;
|
||||
sky130_fd_sc_hd__buf_1 clk_1_N_FTB01 ( .A ( clk_1_E_in ) , .X ( net_net_70 ) ) ;
|
||||
sky130_fd_sc_hd__buf_1 clk_1_S_FTB01 ( .A ( clk_1_E_in ) ,
|
||||
.X ( aps_rename_506_ ) ) ;
|
||||
sky130_fd_sc_hd__bufbuf_16 clk_2_W_FTB01 ( .A ( clk_2_W_in ) ,
|
||||
.X ( clk_2_W_out ) ) ;
|
||||
sky130_fd_sc_hd__buf_1 clk_2_E_FTB01 ( .A ( clk_2_W_in ) , .X ( net_net_68 ) ) ;
|
||||
sky130_fd_sc_hd__bufbuf_16 clk_3_E_FTB01 ( .A ( clk_3_E_in ) ,
|
||||
.X ( clk_3_E_out ) ) ;
|
||||
sky130_fd_sc_hd__buf_1 clk_2_E_FTB01 ( .A ( clk_2_W_in ) , .X ( net_net_71 ) ) ;
|
||||
sky130_fd_sc_hd__buf_1 clk_3_E_FTB01 ( .A ( clk_3_E_in ) ,
|
||||
.X ( aps_rename_507_ ) ) ;
|
||||
sky130_fd_sc_hd__bufbuf_16 clk_3_W_FTB01 ( .A ( clk_3_E_in ) ,
|
||||
.X ( clk_3_W_out ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 FTB_17__16 ( .A ( chanx_left_in[0] ) ,
|
||||
|
|
@ -439,34 +436,29 @@ sky130_fd_sc_hd__buf_8 FTB_55__54 ( .A ( chanx_right_in[18] ) ,
|
|||
sky130_fd_sc_hd__buf_8 FTB_56__55 ( .A ( chanx_right_in[19] ) ,
|
||||
.X ( chanx_left_out[19] ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 FTB_57__56 ( .A ( SC_IN_TOP ) , .X ( SC_OUT_BOT ) ) ;
|
||||
sky130_fd_sc_hd__buf_1 FTB_58__57 ( .A ( SC_IN_BOT ) , .X ( ropt_net_94 ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 FTB_58__57 ( .A ( SC_IN_BOT ) , .X ( SC_OUT_TOP ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 FTB_59__58 ( .A ( REGIN_FEEDTHROUGH ) ,
|
||||
.X ( REGOUT_FEEDTHROUGH ) ) ;
|
||||
sky130_fd_sc_hd__inv_8 BINV_R_64 ( .A ( BUF_net_65 ) ,
|
||||
sky130_fd_sc_hd__inv_8 BINV_R_67 ( .A ( BUF_net_68 ) ,
|
||||
.Y ( prog_clk_1_N_out ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 BINV_R_65 ( .A ( aps_rename_505_ ) ,
|
||||
.Y ( BUF_net_65 ) ) ;
|
||||
sky130_fd_sc_hd__inv_8 BINV_R_66 ( .A ( BUF_net_67 ) ,
|
||||
.Y ( prog_clk_1_S_out ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 BINV_R_67 ( .A ( aps_rename_506_ ) ,
|
||||
.Y ( BUF_net_67 ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 BUFT_RR_68 ( .A ( net_net_68 ) , .X ( clk_2_E_out ) ) ;
|
||||
sky130_fd_sc_hd__conb_1 optlc_71 ( .LO ( SYNOPSYS_UNCONNECTED_65 ) ,
|
||||
.HI ( optlc_net_69 ) ) ;
|
||||
sky130_fd_sc_hd__conb_1 optlc_73 ( .LO ( SYNOPSYS_UNCONNECTED_66 ) ,
|
||||
.HI ( optlc_net_70 ) ) ;
|
||||
sky130_fd_sc_hd__conb_1 optlc_75 ( .LO ( SYNOPSYS_UNCONNECTED_67 ) ,
|
||||
.HI ( optlc_net_71 ) ) ;
|
||||
sky130_fd_sc_hd__conb_1 optlc_77 ( .LO ( SYNOPSYS_UNCONNECTED_68 ) ,
|
||||
sky130_fd_sc_hd__inv_1 BINV_R_68 ( .A ( aps_rename_505_ ) ,
|
||||
.Y ( BUF_net_68 ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 BUFT_RR_69 ( .A ( net_net_69 ) ,
|
||||
.X ( prog_clk_2_W_out ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 BUFT_RR_70 ( .A ( net_net_70 ) , .X ( clk_1_N_out ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 BUFT_RR_71 ( .A ( net_net_71 ) , .X ( clk_2_E_out ) ) ;
|
||||
sky130_fd_sc_hd__conb_1 optlc_74 ( .LO ( SYNOPSYS_UNCONNECTED_65 ) ,
|
||||
.HI ( optlc_net_72 ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 ropt_mt_inst_1318 ( .A ( ropt_net_94 ) ,
|
||||
.X ( ropt_net_104 ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 cts_buf_3521204 ( .A ( ctsbuf_net_173 ) ,
|
||||
sky130_fd_sc_hd__conb_1 optlc_76 ( .LO ( SYNOPSYS_UNCONNECTED_66 ) ,
|
||||
.HI ( optlc_net_73 ) ) ;
|
||||
sky130_fd_sc_hd__conb_1 optlc_78 ( .LO ( SYNOPSYS_UNCONNECTED_67 ) ,
|
||||
.HI ( optlc_net_74 ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 ZBUF_6_f_inst_79 ( .A ( aps_rename_507_ ) ,
|
||||
.X ( clk_3_E_out ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 ZBUF_4_f_inst_80 ( .A ( aps_rename_506_ ) ,
|
||||
.X ( clk_1_S_out ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 cts_buf_3521207 ( .A ( ctsbuf_net_175 ) ,
|
||||
.X ( prog_clk_0_W_out ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 ropt_mt_inst_1325 ( .A ( ropt_net_100 ) ,
|
||||
.X ( ccff_tail[0] ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 ropt_mt_inst_1329 ( .A ( ropt_net_104 ) ,
|
||||
.X ( SC_OUT_TOP ) ) ;
|
||||
endmodule
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -16,14 +16,14 @@ wire copt_net_86 ;
|
|||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ccff_head[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( copt_net_86 ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 FTB_18__17 ( .A ( mem_out[0] ) , .X ( ccff_tail[0] ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1307 ( .A ( copt_net_88 ) ,
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1304 ( .A ( copt_net_84 ) ,
|
||||
.X ( copt_net_83 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1305 ( .A ( copt_net_86 ) ,
|
||||
.X ( copt_net_84 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1309 ( .A ( copt_net_87 ) ,
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1306 ( .A ( copt_net_83 ) ,
|
||||
.X ( copt_net_85 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1307 ( .A ( copt_net_85 ) ,
|
||||
.X ( mem_out[0] ) ) ;
|
||||
sky130_fd_sc_hd__buf_2 copt_h_inst_1310 ( .A ( copt_net_84 ) ,
|
||||
.X ( copt_net_87 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1311 ( .A ( copt_net_86 ) ,
|
||||
.X ( copt_net_88 ) ) ;
|
||||
endmodule
|
||||
|
||||
|
||||
|
|
@ -39,15 +39,14 @@ input IO_ISOL_N ;
|
|||
|
||||
sky130_fd_sc_hd__nand2b_1 ISOL_EN_GATE ( .A_N ( FPGA_DIR ) ,
|
||||
.B ( IO_ISOL_N ) , .Y ( aps_rename_505_ ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 INV_SOC_DIR ( .A ( BUF_net_61 ) , .Y ( SOC_DIR_N ) ) ;
|
||||
sky130_fd_sc_hd__ebufn_4 IN_PROTECT_GATE ( .A ( SOC_IN ) ,
|
||||
.TE_B ( SOC_DIR_N ) , .Z ( FPGA_IN ) ) ;
|
||||
.TE_B ( BUF_net_64 ) , .Z ( FPGA_IN ) ) ;
|
||||
sky130_fd_sc_hd__ebufn_4 OUT_PROTECT_GATE ( .A ( FPGA_OUT ) ,
|
||||
.TE_B ( BUF_net_61 ) , .Z ( SOC_OUT ) ) ;
|
||||
sky130_fd_sc_hd__inv_4 BINV_R_61 ( .A ( BUF_net_63 ) , .Y ( BUF_net_61 ) ) ;
|
||||
sky130_fd_sc_hd__inv_8 BINV_R_62 ( .A ( BUF_net_63 ) , .Y ( SOC_DIR ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 BINV_R_63 ( .A ( aps_rename_505_ ) ,
|
||||
.Y ( BUF_net_63 ) ) ;
|
||||
.TE_B ( BUF_net_63 ) , .Z ( SOC_OUT ) ) ;
|
||||
sky130_fd_sc_hd__inv_8 BINV_R_61 ( .A ( BUF_net_64 ) , .Y ( SOC_DIR ) ) ;
|
||||
sky130_fd_sc_hd__inv_4 BINV_R_63 ( .A ( BUF_net_64 ) , .Y ( BUF_net_63 ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 BINV_R_64 ( .A ( aps_rename_505_ ) ,
|
||||
.Y ( BUF_net_64 ) ) ;
|
||||
endmodule
|
||||
|
||||
|
||||
|
|
@ -114,7 +113,7 @@ sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ccff_head[0] ) ,
|
|||
.CLK ( prog_clk[0] ) , .Q ( mem_out[0] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_1_ ( .D ( mem_out[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[1] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_2_ ( .D ( mem_out[1] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_2_ ( .D ( mem_out[1] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[2] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_3_ ( .D ( mem_out[2] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[3] ) ) ;
|
||||
|
|
@ -447,6 +446,8 @@ wire [0:0] sky130_fd_sc_hd__mux2_1_7_X ;
|
|||
|
||||
cbx_1__2__const1_13 const1_0_ (
|
||||
.const1 ( { SYNOPSYS_UNCONNECTED_1 } ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 sky130_fd_sc_hd__buf_4_0_ (
|
||||
.A ( sky130_fd_sc_hd__mux2_1_7_X[0] ) , .X ( out[0] ) ) ;
|
||||
sky130_fd_sc_hd__mux2_1 mux_l1_in_0_ ( .A0 ( in[1] ) , .A1 ( in[0] ) ,
|
||||
.S ( sram[0] ) , .X ( sky130_fd_sc_hd__mux2_1_0_X[0] ) ) ;
|
||||
sky130_fd_sc_hd__mux2_1 mux_l2_in_0_ ( .A0 ( in[2] ) ,
|
||||
|
|
@ -470,8 +471,6 @@ sky130_fd_sc_hd__mux2_1 mux_l4_in_0_ (
|
|||
.A0 ( sky130_fd_sc_hd__mux2_1_6_X[0] ) ,
|
||||
.A1 ( sky130_fd_sc_hd__mux2_1_5_X[0] ) , .S ( sram[3] ) ,
|
||||
.X ( sky130_fd_sc_hd__mux2_1_7_X[0] ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 BUFT_RR_70 ( .A ( sky130_fd_sc_hd__mux2_1_7_X[0] ) ,
|
||||
.X ( out[0] ) ) ;
|
||||
endmodule
|
||||
|
||||
|
||||
|
|
@ -635,7 +634,7 @@ sky130_fd_sc_hd__mux2_1 mux_l4_in_0_ (
|
|||
.A0 ( sky130_fd_sc_hd__mux2_1_6_X[0] ) ,
|
||||
.A1 ( sky130_fd_sc_hd__mux2_1_5_X[0] ) , .S ( sram[3] ) ,
|
||||
.X ( sky130_fd_sc_hd__mux2_1_7_X[0] ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 BUFT_RR_69 ( .A ( sky130_fd_sc_hd__mux2_1_7_X[0] ) ,
|
||||
sky130_fd_sc_hd__buf_6 BUFT_RR_70 ( .A ( sky130_fd_sc_hd__mux2_1_7_X[0] ) ,
|
||||
.X ( out[0] ) ) ;
|
||||
endmodule
|
||||
|
||||
|
|
@ -690,7 +689,7 @@ sky130_fd_sc_hd__mux2_1 mux_l4_in_0_ (
|
|||
.A0 ( sky130_fd_sc_hd__mux2_1_6_X[0] ) ,
|
||||
.A1 ( sky130_fd_sc_hd__mux2_1_5_X[0] ) , .S ( sram[3] ) ,
|
||||
.X ( sky130_fd_sc_hd__mux2_1_7_X[0] ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 BUFT_RR_68 ( .A ( sky130_fd_sc_hd__mux2_1_7_X[0] ) ,
|
||||
sky130_fd_sc_hd__buf_6 BUFT_RR_69 ( .A ( sky130_fd_sc_hd__mux2_1_7_X[0] ) ,
|
||||
.X ( out[0] ) ) ;
|
||||
endmodule
|
||||
|
||||
|
|
@ -706,7 +705,7 @@ sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ccff_head[0] ) ,
|
|||
.CLK ( prog_clk[0] ) , .Q ( mem_out[0] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_1_ ( .D ( mem_out[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[1] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_2_ ( .D ( mem_out[1] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_2_ ( .D ( mem_out[1] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[2] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_3_ ( .D ( mem_out[2] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[3] ) ) ;
|
||||
|
|
@ -835,9 +834,9 @@ input [0:0] ccff_head ;
|
|||
output [0:0] ccff_tail ;
|
||||
output [0:3] mem_out ;
|
||||
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ccff_head[0] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ccff_head[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[0] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_2 sky130_fd_sc_hd__dfxtp_1_1_ ( .D ( mem_out[0] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_1_ ( .D ( mem_out[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[1] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_2_ ( .D ( mem_out[1] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[2] ) ) ;
|
||||
|
|
@ -854,7 +853,7 @@ input [0:0] ccff_head ;
|
|||
output [0:0] ccff_tail ;
|
||||
output [0:3] mem_out ;
|
||||
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ropt_net_93 ) ,
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ropt_net_95 ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[0] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_1_ ( .D ( mem_out[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[1] ) ) ;
|
||||
|
|
@ -863,24 +862,22 @@ sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_2_ ( .D ( mem_out[1] ) ,
|
|||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_3_ ( .D ( mem_out[2] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[3] ) ) ;
|
||||
sky130_fd_sc_hd__buf_1 FTB_1__0 ( .A ( mem_out[3] ) , .X ( ccff_tail[0] ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1300 ( .A ( copt_net_79 ) ,
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1296 ( .A ( ccff_head[0] ) ,
|
||||
.X ( copt_net_75 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1297 ( .A ( copt_net_75 ) ,
|
||||
.X ( copt_net_76 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1298 ( .A ( copt_net_76 ) ,
|
||||
.X ( copt_net_77 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1301 ( .A ( ccff_head[0] ) ,
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1299 ( .A ( copt_net_77 ) ,
|
||||
.X ( copt_net_78 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1302 ( .A ( copt_net_78 ) ,
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1300 ( .A ( copt_net_78 ) ,
|
||||
.X ( copt_net_79 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1303 ( .A ( copt_net_77 ) ,
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1301 ( .A ( copt_net_79 ) ,
|
||||
.X ( copt_net_80 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1304 ( .A ( copt_net_80 ) ,
|
||||
.X ( copt_net_81 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1305 ( .A ( copt_net_81 ) ,
|
||||
.X ( copt_net_82 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 ropt_h_inst_1313 ( .A ( copt_net_82 ) ,
|
||||
.X ( ropt_net_91 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd2_1 ropt_h_inst_1314 ( .A ( ropt_net_91 ) ,
|
||||
.X ( ropt_net_92 ) ) ;
|
||||
sky130_fd_sc_hd__buf_2 ropt_h_inst_1315 ( .A ( ropt_net_92 ) ,
|
||||
.X ( ropt_net_93 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 ropt_h_inst_1313 ( .A ( copt_net_80 ) ,
|
||||
.X ( ropt_net_94 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 ropt_h_inst_1314 ( .A ( ropt_net_94 ) ,
|
||||
.X ( ropt_net_95 ) ) ;
|
||||
endmodule
|
||||
|
||||
|
||||
|
|
@ -942,7 +939,7 @@ sky130_fd_sc_hd__mux2_1 mux_l4_in_0_ (
|
|||
.A0 ( sky130_fd_sc_hd__mux2_1_8_X[0] ) ,
|
||||
.A1 ( sky130_fd_sc_hd__mux2_1_7_X[0] ) , .S ( sram[3] ) ,
|
||||
.X ( sky130_fd_sc_hd__mux2_1_9_X[0] ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 BUFT_RR_67 ( .A ( sky130_fd_sc_hd__mux2_1_9_X[0] ) ,
|
||||
sky130_fd_sc_hd__buf_6 BUFT_RR_68 ( .A ( sky130_fd_sc_hd__mux2_1_9_X[0] ) ,
|
||||
.X ( out[0] ) ) ;
|
||||
endmodule
|
||||
|
||||
|
|
@ -1068,7 +1065,7 @@ sky130_fd_sc_hd__mux2_1 mux_l4_in_0_ (
|
|||
.A0 ( sky130_fd_sc_hd__mux2_1_8_X[0] ) ,
|
||||
.A1 ( sky130_fd_sc_hd__mux2_1_7_X[0] ) , .S ( sram[3] ) ,
|
||||
.X ( sky130_fd_sc_hd__mux2_1_9_X[0] ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 BUFT_RR_66 ( .A ( sky130_fd_sc_hd__mux2_1_9_X[0] ) ,
|
||||
sky130_fd_sc_hd__buf_6 BUFT_RR_67 ( .A ( sky130_fd_sc_hd__mux2_1_9_X[0] ) ,
|
||||
.X ( out[0] ) ) ;
|
||||
endmodule
|
||||
|
||||
|
|
@ -1291,6 +1288,8 @@ wire [0:0] sky130_fd_sc_hd__mux2_1_9_X ;
|
|||
|
||||
cbx_1__2__const1_2 const1_0_ (
|
||||
.const1 ( { SYNOPSYS_UNCONNECTED_1 } ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 sky130_fd_sc_hd__buf_4_0_ (
|
||||
.A ( sky130_fd_sc_hd__mux2_1_9_X[0] ) , .X ( out[0] ) ) ;
|
||||
sky130_fd_sc_hd__mux2_1 mux_l1_in_0_ ( .A0 ( in[1] ) , .A1 ( in[0] ) ,
|
||||
.S ( sram[0] ) , .X ( sky130_fd_sc_hd__mux2_1_0_X[0] ) ) ;
|
||||
sky130_fd_sc_hd__mux2_1 mux_l1_in_1_ ( .A0 ( in[3] ) , .A1 ( in[2] ) ,
|
||||
|
|
@ -1320,8 +1319,6 @@ sky130_fd_sc_hd__mux2_1 mux_l4_in_0_ (
|
|||
.A0 ( sky130_fd_sc_hd__mux2_1_8_X[0] ) ,
|
||||
.A1 ( sky130_fd_sc_hd__mux2_1_7_X[0] ) , .S ( sram[3] ) ,
|
||||
.X ( sky130_fd_sc_hd__mux2_1_9_X[0] ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 BUFT_RR_65 ( .A ( sky130_fd_sc_hd__mux2_1_9_X[0] ) ,
|
||||
.X ( out[0] ) ) ;
|
||||
endmodule
|
||||
|
||||
|
||||
|
|
@ -1383,8 +1380,9 @@ sky130_fd_sc_hd__mux2_1 mux_l4_in_0_ (
|
|||
.A0 ( sky130_fd_sc_hd__mux2_1_8_X[0] ) ,
|
||||
.A1 ( sky130_fd_sc_hd__mux2_1_7_X[0] ) , .S ( sram[3] ) ,
|
||||
.X ( sky130_fd_sc_hd__mux2_1_9_X[0] ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 BUFT_RR_64 ( .A ( sky130_fd_sc_hd__mux2_1_9_X[0] ) ,
|
||||
.X ( out[0] ) ) ;
|
||||
sky130_fd_sc_hd__inv_8 BINV_R_65 ( .A ( BUF_net_66 ) , .Y ( out[0] ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 BINV_R_66 ( .A ( sky130_fd_sc_hd__mux2_1_9_X[0] ) ,
|
||||
.Y ( BUF_net_66 ) ) ;
|
||||
endmodule
|
||||
|
||||
|
||||
|
|
@ -1555,7 +1553,7 @@ cbx_1__2__mux_tree_tapbuf_size10_1 mux_top_ipin_0 (
|
|||
.sram ( mux_tree_tapbuf_size10_1_sram ) ,
|
||||
.sram_inv ( { SYNOPSYS_UNCONNECTED_5 , SYNOPSYS_UNCONNECTED_6 ,
|
||||
SYNOPSYS_UNCONNECTED_7 , SYNOPSYS_UNCONNECTED_8 } ) ,
|
||||
.out ( bottom_grid_pin_0_ ) , .p0 ( optlc_net_74 ) ) ;
|
||||
.out ( bottom_grid_pin_0_ ) , .p0 ( optlc_net_72 ) ) ;
|
||||
cbx_1__2__mux_tree_tapbuf_size10_2 mux_top_ipin_3 (
|
||||
.in ( { chanx_right_out[0] , chanx_left_out[0] , chanx_right_out[2] ,
|
||||
chanx_left_out[2] , chanx_right_out[4] , chanx_left_out[4] ,
|
||||
|
|
@ -1564,7 +1562,7 @@ cbx_1__2__mux_tree_tapbuf_size10_2 mux_top_ipin_3 (
|
|||
.sram ( mux_tree_tapbuf_size10_2_sram ) ,
|
||||
.sram_inv ( { SYNOPSYS_UNCONNECTED_9 , SYNOPSYS_UNCONNECTED_10 ,
|
||||
SYNOPSYS_UNCONNECTED_11 , SYNOPSYS_UNCONNECTED_12 } ) ,
|
||||
.out ( bottom_grid_pin_3_ ) , .p0 ( optlc_net_75 ) ) ;
|
||||
.out ( bottom_grid_pin_3_ ) , .p0 ( optlc_net_73 ) ) ;
|
||||
cbx_1__2__mux_tree_tapbuf_size10_3 mux_top_ipin_4 (
|
||||
.in ( { chanx_right_out[1] , chanx_left_out[1] , chanx_right_out[3] ,
|
||||
chanx_left_out[3] , chanx_right_out[5] , chanx_left_out[5] ,
|
||||
|
|
@ -1582,7 +1580,7 @@ cbx_1__2__mux_tree_tapbuf_size10_4 mux_top_ipin_7 (
|
|||
.sram ( mux_tree_tapbuf_size10_4_sram ) ,
|
||||
.sram_inv ( { SYNOPSYS_UNCONNECTED_17 , SYNOPSYS_UNCONNECTED_18 ,
|
||||
SYNOPSYS_UNCONNECTED_19 , SYNOPSYS_UNCONNECTED_20 } ) ,
|
||||
.out ( bottom_grid_pin_7_ ) , .p0 ( optlc_net_75 ) ) ;
|
||||
.out ( bottom_grid_pin_7_ ) , .p0 ( optlc_net_73 ) ) ;
|
||||
cbx_1__2__mux_tree_tapbuf_size10_5 mux_top_ipin_8 (
|
||||
.in ( { chanx_right_out[1] , chanx_left_out[1] , chanx_right_out[3] ,
|
||||
chanx_left_out[3] , chanx_right_out[9] , chanx_left_out[9] ,
|
||||
|
|
@ -1591,7 +1589,7 @@ cbx_1__2__mux_tree_tapbuf_size10_5 mux_top_ipin_8 (
|
|||
.sram ( mux_tree_tapbuf_size10_5_sram ) ,
|
||||
.sram_inv ( { SYNOPSYS_UNCONNECTED_21 , SYNOPSYS_UNCONNECTED_22 ,
|
||||
SYNOPSYS_UNCONNECTED_23 , SYNOPSYS_UNCONNECTED_24 } ) ,
|
||||
.out ( bottom_grid_pin_8_ ) , .p0 ( optlc_net_74 ) ) ;
|
||||
.out ( bottom_grid_pin_8_ ) , .p0 ( optlc_net_72 ) ) ;
|
||||
cbx_1__2__mux_tree_tapbuf_size10_6 mux_top_ipin_11 (
|
||||
.in ( { chanx_right_out[0] , chanx_left_out[0] , chanx_right_out[2] ,
|
||||
chanx_left_out[2] , chanx_right_out[6] , chanx_left_out[6] ,
|
||||
|
|
@ -1609,7 +1607,7 @@ cbx_1__2__mux_tree_tapbuf_size10_7 mux_top_ipin_12 (
|
|||
.sram ( mux_tree_tapbuf_size10_7_sram ) ,
|
||||
.sram_inv ( { SYNOPSYS_UNCONNECTED_29 , SYNOPSYS_UNCONNECTED_30 ,
|
||||
SYNOPSYS_UNCONNECTED_31 , SYNOPSYS_UNCONNECTED_32 } ) ,
|
||||
.out ( bottom_grid_pin_12_ ) , .p0 ( optlc_net_74 ) ) ;
|
||||
.out ( bottom_grid_pin_12_ ) , .p0 ( optlc_net_72 ) ) ;
|
||||
cbx_1__2__mux_tree_tapbuf_size10 mux_top_ipin_15 (
|
||||
.in ( { chanx_right_out[0] , chanx_left_out[0] , chanx_right_out[2] ,
|
||||
chanx_left_out[2] , chanx_right_out[4] , chanx_left_out[4] ,
|
||||
|
|
@ -1670,7 +1668,7 @@ cbx_1__2__mux_tree_tapbuf_size8_0 mux_top_ipin_1 (
|
|||
.sram ( mux_tree_tapbuf_size8_0_sram ) ,
|
||||
.sram_inv ( { SYNOPSYS_UNCONNECTED_37 , SYNOPSYS_UNCONNECTED_38 ,
|
||||
SYNOPSYS_UNCONNECTED_39 , SYNOPSYS_UNCONNECTED_40 } ) ,
|
||||
.out ( bottom_grid_pin_1_ ) , .p0 ( optlc_net_75 ) ) ;
|
||||
.out ( bottom_grid_pin_1_ ) , .p0 ( optlc_net_73 ) ) ;
|
||||
cbx_1__2__mux_tree_tapbuf_size8_1 mux_top_ipin_2 (
|
||||
.in ( { chanx_right_out[1] , chanx_left_out[1] , chanx_right_out[3] ,
|
||||
chanx_left_out[3] , chanx_right_out[7] , chanx_left_out[7] ,
|
||||
|
|
@ -1686,7 +1684,7 @@ cbx_1__2__mux_tree_tapbuf_size8_2 mux_top_ipin_5 (
|
|||
.sram ( mux_tree_tapbuf_size8_2_sram ) ,
|
||||
.sram_inv ( { SYNOPSYS_UNCONNECTED_45 , SYNOPSYS_UNCONNECTED_46 ,
|
||||
SYNOPSYS_UNCONNECTED_47 , SYNOPSYS_UNCONNECTED_48 } ) ,
|
||||
.out ( bottom_grid_pin_5_ ) , .p0 ( optlc_net_75 ) ) ;
|
||||
.out ( bottom_grid_pin_5_ ) , .p0 ( optlc_net_73 ) ) ;
|
||||
cbx_1__2__mux_tree_tapbuf_size8_3 mux_top_ipin_6 (
|
||||
.in ( { chanx_right_out[1] , chanx_left_out[1] , chanx_right_out[3] ,
|
||||
chanx_left_out[3] , chanx_right_out[11] , chanx_left_out[11] ,
|
||||
|
|
@ -1702,7 +1700,7 @@ cbx_1__2__mux_tree_tapbuf_size8_4 mux_top_ipin_9 (
|
|||
.sram ( mux_tree_tapbuf_size8_4_sram ) ,
|
||||
.sram_inv ( { SYNOPSYS_UNCONNECTED_53 , SYNOPSYS_UNCONNECTED_54 ,
|
||||
SYNOPSYS_UNCONNECTED_55 , SYNOPSYS_UNCONNECTED_56 } ) ,
|
||||
.out ( bottom_grid_pin_9_ ) , .p0 ( optlc_net_75 ) ) ;
|
||||
.out ( bottom_grid_pin_9_ ) , .p0 ( optlc_net_73 ) ) ;
|
||||
cbx_1__2__mux_tree_tapbuf_size8_5 mux_top_ipin_10 (
|
||||
.in ( { chanx_right_out[1] , chanx_left_out[1] , chanx_right_out[3] ,
|
||||
chanx_left_out[3] , chanx_right_out[7] , chanx_left_out[7] ,
|
||||
|
|
@ -1710,7 +1708,7 @@ cbx_1__2__mux_tree_tapbuf_size8_5 mux_top_ipin_10 (
|
|||
.sram ( mux_tree_tapbuf_size8_5_sram ) ,
|
||||
.sram_inv ( { SYNOPSYS_UNCONNECTED_57 , SYNOPSYS_UNCONNECTED_58 ,
|
||||
SYNOPSYS_UNCONNECTED_59 , SYNOPSYS_UNCONNECTED_60 } ) ,
|
||||
.out ( bottom_grid_pin_10_ ) , .p0 ( optlc_net_74 ) ) ;
|
||||
.out ( bottom_grid_pin_10_ ) , .p0 ( optlc_net_72 ) ) ;
|
||||
cbx_1__2__mux_tree_tapbuf_size8_6 mux_top_ipin_13 (
|
||||
.in ( { chanx_right_out[0] , chanx_left_out[0] , chanx_right_out[2] ,
|
||||
chanx_left_out[2] , chanx_right_out[10] , chanx_left_out[10] ,
|
||||
|
|
@ -1726,7 +1724,7 @@ cbx_1__2__mux_tree_tapbuf_size8 mux_top_ipin_14 (
|
|||
.sram ( mux_tree_tapbuf_size8_7_sram ) ,
|
||||
.sram_inv ( { SYNOPSYS_UNCONNECTED_65 , SYNOPSYS_UNCONNECTED_66 ,
|
||||
SYNOPSYS_UNCONNECTED_67 , SYNOPSYS_UNCONNECTED_68 } ) ,
|
||||
.out ( bottom_grid_pin_14_ ) , .p0 ( optlc_net_74 ) ) ;
|
||||
.out ( bottom_grid_pin_14_ ) , .p0 ( optlc_net_72 ) ) ;
|
||||
cbx_1__2__mux_tree_tapbuf_size8_mem_0 mem_top_ipin_1 (
|
||||
.prog_clk ( prog_clk ) ,
|
||||
.ccff_head ( mux_tree_tapbuf_size10_mem_1_ccff_tail ) ,
|
||||
|
|
@ -1778,10 +1776,10 @@ cbx_1__2__logical_tile_io_mode_io_ logical_tile_io_mode_io__0 (
|
|||
sky130_fd_sc_hd__buf_1 prog_clk_0_FTB00 ( .A ( prog_clk_0_S_in ) ,
|
||||
.X ( prog_clk[0] ) ) ;
|
||||
sky130_fd_sc_hd__clkbuf_1 prog_clk_0_W_FTB01 ( .A ( prog_clk_0_S_in ) ,
|
||||
.X ( ctsbuf_net_176 ) ) ;
|
||||
.X ( ctsbuf_net_174 ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 FTB_19__18 ( .A ( chanx_left_in[0] ) ,
|
||||
.X ( chanx_right_out[0] ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 FTB_20__19 ( .A ( chanx_left_in[1] ) ,
|
||||
sky130_fd_sc_hd__buf_12 FTB_20__19 ( .A ( chanx_left_in[1] ) ,
|
||||
.X ( chanx_right_out[1] ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 FTB_21__20 ( .A ( chanx_left_in[2] ) ,
|
||||
.X ( chanx_right_out[2] ) ) ;
|
||||
|
|
@ -1823,7 +1821,7 @@ sky130_fd_sc_hd__buf_8 FTB_39__38 ( .A ( chanx_right_in[0] ) ,
|
|||
.X ( chanx_left_out[0] ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 FTB_40__39 ( .A ( chanx_right_in[1] ) ,
|
||||
.X ( chanx_left_out[1] ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 FTB_41__40 ( .A ( chanx_right_in[2] ) ,
|
||||
sky130_fd_sc_hd__buf_12 FTB_41__40 ( .A ( chanx_right_in[2] ) ,
|
||||
.X ( chanx_left_out[2] ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 FTB_42__41 ( .A ( chanx_right_in[3] ) ,
|
||||
.X ( chanx_left_out[3] ) ) ;
|
||||
|
|
@ -1868,11 +1866,7 @@ sky130_fd_sc_hd__conb_1 optlc_74 ( .LO ( SYNOPSYS_UNCONNECTED_69 ) ,
|
|||
.HI ( optlc_net_72 ) ) ;
|
||||
sky130_fd_sc_hd__conb_1 optlc_76 ( .LO ( SYNOPSYS_UNCONNECTED_70 ) ,
|
||||
.HI ( optlc_net_73 ) ) ;
|
||||
sky130_fd_sc_hd__conb_1 optlc_78 ( .LO ( SYNOPSYS_UNCONNECTED_71 ) ,
|
||||
.HI ( optlc_net_74 ) ) ;
|
||||
sky130_fd_sc_hd__conb_1 optlc_80 ( .LO ( SYNOPSYS_UNCONNECTED_72 ) ,
|
||||
.HI ( optlc_net_75 ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 cts_buf_3521207 ( .A ( ctsbuf_net_176 ) ,
|
||||
sky130_fd_sc_hd__buf_6 cts_buf_3521203 ( .A ( ctsbuf_net_174 ) ,
|
||||
.X ( prog_clk_0_W_out ) ) ;
|
||||
endmodule
|
||||
|
||||
|
|
|
|||
|
|
@ -22,14 +22,14 @@ sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ccff_head[0] ) ,
|
|||
.VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 FTB_18__17 ( .A ( mem_out[0] ) , .X ( ccff_tail[0] ) ,
|
||||
.VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1307 ( .A ( copt_net_88 ) ,
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1304 ( .A ( copt_net_84 ) ,
|
||||
.X ( copt_net_83 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1305 ( .A ( copt_net_86 ) ,
|
||||
.X ( copt_net_84 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1309 ( .A ( copt_net_87 ) ,
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1306 ( .A ( copt_net_83 ) ,
|
||||
.X ( copt_net_85 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1307 ( .A ( copt_net_85 ) ,
|
||||
.X ( mem_out[0] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_2 copt_h_inst_1310 ( .A ( copt_net_84 ) ,
|
||||
.X ( copt_net_87 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1311 ( .A ( copt_net_86 ) ,
|
||||
.X ( copt_net_88 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
endmodule
|
||||
|
||||
|
||||
|
|
@ -51,18 +51,16 @@ supply0 VSS ;
|
|||
sky130_fd_sc_hd__nand2b_1 ISOL_EN_GATE ( .A_N ( FPGA_DIR ) ,
|
||||
.B ( IO_ISOL_N ) , .Y ( aps_rename_505_ ) , .VPWR ( VDD ) ,
|
||||
.VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 INV_SOC_DIR ( .A ( BUF_net_61 ) , .Y ( SOC_DIR_N ) ,
|
||||
.VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__ebufn_4 IN_PROTECT_GATE ( .A ( SOC_IN ) ,
|
||||
.TE_B ( SOC_DIR_N ) , .Z ( FPGA_IN ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
.TE_B ( BUF_net_64 ) , .Z ( FPGA_IN ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__ebufn_4 OUT_PROTECT_GATE ( .A ( FPGA_OUT ) ,
|
||||
.TE_B ( BUF_net_61 ) , .Z ( SOC_OUT ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__inv_4 BINV_R_61 ( .A ( BUF_net_63 ) , .Y ( BUF_net_61 ) ,
|
||||
.TE_B ( BUF_net_63 ) , .Z ( SOC_OUT ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__inv_8 BINV_R_61 ( .A ( BUF_net_64 ) , .Y ( SOC_DIR ) ,
|
||||
.VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__inv_8 BINV_R_62 ( .A ( BUF_net_63 ) , .Y ( SOC_DIR ) ,
|
||||
sky130_fd_sc_hd__inv_4 BINV_R_63 ( .A ( BUF_net_64 ) , .Y ( BUF_net_63 ) ,
|
||||
.VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 BINV_R_63 ( .A ( aps_rename_505_ ) ,
|
||||
.Y ( BUF_net_63 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 BINV_R_64 ( .A ( aps_rename_505_ ) ,
|
||||
.Y ( BUF_net_64 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
endmodule
|
||||
|
||||
|
||||
|
|
@ -146,7 +144,7 @@ sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ccff_head[0] ) ,
|
|||
.CLK ( prog_clk[0] ) , .Q ( mem_out[0] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_1_ ( .D ( mem_out[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[1] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_2_ ( .D ( mem_out[1] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_2_ ( .D ( mem_out[1] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[2] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_3_ ( .D ( mem_out[2] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[3] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
|
|
@ -512,6 +510,9 @@ wire [0:0] sky130_fd_sc_hd__mux2_1_7_X ;
|
|||
supply1 VDD ;
|
||||
supply0 VSS ;
|
||||
|
||||
sky130_fd_sc_hd__buf_6 sky130_fd_sc_hd__buf_4_0_ (
|
||||
.A ( sky130_fd_sc_hd__mux2_1_7_X[0] ) , .X ( out[0] ) , .VPWR ( VDD ) ,
|
||||
.VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__mux2_1 mux_l1_in_0_ ( .A0 ( in[1] ) , .A1 ( in[0] ) ,
|
||||
.S ( sram[0] ) , .X ( sky130_fd_sc_hd__mux2_1_0_X[0] ) , .VPWR ( VDD ) ,
|
||||
.VGND ( VSS ) ) ;
|
||||
|
|
@ -539,8 +540,6 @@ sky130_fd_sc_hd__mux2_1 mux_l4_in_0_ (
|
|||
.A0 ( sky130_fd_sc_hd__mux2_1_6_X[0] ) ,
|
||||
.A1 ( sky130_fd_sc_hd__mux2_1_5_X[0] ) , .S ( sram[3] ) ,
|
||||
.X ( sky130_fd_sc_hd__mux2_1_7_X[0] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 BUFT_RR_70 ( .A ( sky130_fd_sc_hd__mux2_1_7_X[0] ) ,
|
||||
.X ( out[0] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
endmodule
|
||||
|
||||
|
||||
|
|
@ -700,7 +699,7 @@ sky130_fd_sc_hd__mux2_1 mux_l4_in_0_ (
|
|||
.A0 ( sky130_fd_sc_hd__mux2_1_6_X[0] ) ,
|
||||
.A1 ( sky130_fd_sc_hd__mux2_1_5_X[0] ) , .S ( sram[3] ) ,
|
||||
.X ( sky130_fd_sc_hd__mux2_1_7_X[0] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 BUFT_RR_69 ( .A ( sky130_fd_sc_hd__mux2_1_7_X[0] ) ,
|
||||
sky130_fd_sc_hd__buf_6 BUFT_RR_70 ( .A ( sky130_fd_sc_hd__mux2_1_7_X[0] ) ,
|
||||
.X ( out[0] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
endmodule
|
||||
|
||||
|
|
@ -753,7 +752,7 @@ sky130_fd_sc_hd__mux2_1 mux_l4_in_0_ (
|
|||
.A0 ( sky130_fd_sc_hd__mux2_1_6_X[0] ) ,
|
||||
.A1 ( sky130_fd_sc_hd__mux2_1_5_X[0] ) , .S ( sram[3] ) ,
|
||||
.X ( sky130_fd_sc_hd__mux2_1_7_X[0] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 BUFT_RR_68 ( .A ( sky130_fd_sc_hd__mux2_1_7_X[0] ) ,
|
||||
sky130_fd_sc_hd__buf_6 BUFT_RR_69 ( .A ( sky130_fd_sc_hd__mux2_1_7_X[0] ) ,
|
||||
.X ( out[0] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
endmodule
|
||||
|
||||
|
|
@ -774,7 +773,7 @@ sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ccff_head[0] ) ,
|
|||
.CLK ( prog_clk[0] ) , .Q ( mem_out[0] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_1_ ( .D ( mem_out[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[1] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_2_ ( .D ( mem_out[1] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_2_ ( .D ( mem_out[1] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[2] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_3_ ( .D ( mem_out[2] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[3] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
|
|
@ -945,9 +944,9 @@ input VSS ;
|
|||
supply1 VDD ;
|
||||
supply0 VSS ;
|
||||
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ccff_head[0] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ccff_head[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[0] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_2 sky130_fd_sc_hd__dfxtp_1_1_ ( .D ( mem_out[0] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_1_ ( .D ( mem_out[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[1] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_2_ ( .D ( mem_out[1] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[2] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
|
|
@ -970,7 +969,7 @@ input VSS ;
|
|||
supply1 VDD ;
|
||||
supply0 VSS ;
|
||||
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ropt_net_93 ) ,
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ropt_net_95 ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[0] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_1_ ( .D ( mem_out[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[1] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
|
|
@ -980,24 +979,22 @@ sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_3_ ( .D ( mem_out[2] ) ,
|
|||
.CLK ( prog_clk[0] ) , .Q ( mem_out[3] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_1 FTB_1__0 ( .A ( mem_out[3] ) , .X ( ccff_tail[0] ) ,
|
||||
.VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1300 ( .A ( copt_net_79 ) ,
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1296 ( .A ( ccff_head[0] ) ,
|
||||
.X ( copt_net_75 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1297 ( .A ( copt_net_75 ) ,
|
||||
.X ( copt_net_76 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1298 ( .A ( copt_net_76 ) ,
|
||||
.X ( copt_net_77 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1301 ( .A ( ccff_head[0] ) ,
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1299 ( .A ( copt_net_77 ) ,
|
||||
.X ( copt_net_78 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1302 ( .A ( copt_net_78 ) ,
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1300 ( .A ( copt_net_78 ) ,
|
||||
.X ( copt_net_79 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1303 ( .A ( copt_net_77 ) ,
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1301 ( .A ( copt_net_79 ) ,
|
||||
.X ( copt_net_80 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1304 ( .A ( copt_net_80 ) ,
|
||||
.X ( copt_net_81 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1305 ( .A ( copt_net_81 ) ,
|
||||
.X ( copt_net_82 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 ropt_h_inst_1313 ( .A ( copt_net_82 ) ,
|
||||
.X ( ropt_net_91 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd2_1 ropt_h_inst_1314 ( .A ( ropt_net_91 ) ,
|
||||
.X ( ropt_net_92 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_2 ropt_h_inst_1315 ( .A ( ropt_net_92 ) ,
|
||||
.X ( ropt_net_93 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 ropt_h_inst_1313 ( .A ( copt_net_80 ) ,
|
||||
.X ( ropt_net_94 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 ropt_h_inst_1314 ( .A ( ropt_net_94 ) ,
|
||||
.X ( ropt_net_95 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
endmodule
|
||||
|
||||
|
||||
|
|
@ -1058,7 +1055,7 @@ sky130_fd_sc_hd__mux2_1 mux_l4_in_0_ (
|
|||
.A0 ( sky130_fd_sc_hd__mux2_1_8_X[0] ) ,
|
||||
.A1 ( sky130_fd_sc_hd__mux2_1_7_X[0] ) , .S ( sram[3] ) ,
|
||||
.X ( sky130_fd_sc_hd__mux2_1_9_X[0] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 BUFT_RR_67 ( .A ( sky130_fd_sc_hd__mux2_1_9_X[0] ) ,
|
||||
sky130_fd_sc_hd__buf_6 BUFT_RR_68 ( .A ( sky130_fd_sc_hd__mux2_1_9_X[0] ) ,
|
||||
.X ( out[0] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
endmodule
|
||||
|
||||
|
|
@ -1183,7 +1180,7 @@ sky130_fd_sc_hd__mux2_1 mux_l4_in_0_ (
|
|||
.A0 ( sky130_fd_sc_hd__mux2_1_8_X[0] ) ,
|
||||
.A1 ( sky130_fd_sc_hd__mux2_1_7_X[0] ) , .S ( sram[3] ) ,
|
||||
.X ( sky130_fd_sc_hd__mux2_1_9_X[0] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 BUFT_RR_66 ( .A ( sky130_fd_sc_hd__mux2_1_9_X[0] ) ,
|
||||
sky130_fd_sc_hd__buf_6 BUFT_RR_67 ( .A ( sky130_fd_sc_hd__mux2_1_9_X[0] ) ,
|
||||
.X ( out[0] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
endmodule
|
||||
|
||||
|
|
@ -1400,6 +1397,9 @@ wire [0:0] sky130_fd_sc_hd__mux2_1_9_X ;
|
|||
supply1 VDD ;
|
||||
supply0 VSS ;
|
||||
|
||||
sky130_fd_sc_hd__buf_6 sky130_fd_sc_hd__buf_4_0_ (
|
||||
.A ( sky130_fd_sc_hd__mux2_1_9_X[0] ) , .X ( out[0] ) , .VPWR ( VDD ) ,
|
||||
.VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__mux2_1 mux_l1_in_0_ ( .A0 ( in[1] ) , .A1 ( in[0] ) ,
|
||||
.S ( sram[0] ) , .X ( sky130_fd_sc_hd__mux2_1_0_X[0] ) , .VPWR ( VDD ) ,
|
||||
.VGND ( VSS ) ) ;
|
||||
|
|
@ -1434,8 +1434,6 @@ sky130_fd_sc_hd__mux2_1 mux_l4_in_0_ (
|
|||
.A0 ( sky130_fd_sc_hd__mux2_1_8_X[0] ) ,
|
||||
.A1 ( sky130_fd_sc_hd__mux2_1_7_X[0] ) , .S ( sram[3] ) ,
|
||||
.X ( sky130_fd_sc_hd__mux2_1_9_X[0] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 BUFT_RR_65 ( .A ( sky130_fd_sc_hd__mux2_1_9_X[0] ) ,
|
||||
.X ( out[0] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
endmodule
|
||||
|
||||
|
||||
|
|
@ -1496,8 +1494,10 @@ sky130_fd_sc_hd__mux2_1 mux_l4_in_0_ (
|
|||
.A0 ( sky130_fd_sc_hd__mux2_1_8_X[0] ) ,
|
||||
.A1 ( sky130_fd_sc_hd__mux2_1_7_X[0] ) , .S ( sram[3] ) ,
|
||||
.X ( sky130_fd_sc_hd__mux2_1_9_X[0] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 BUFT_RR_64 ( .A ( sky130_fd_sc_hd__mux2_1_9_X[0] ) ,
|
||||
.X ( out[0] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__inv_8 BINV_R_65 ( .A ( BUF_net_66 ) , .Y ( out[0] ) ,
|
||||
.VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 BINV_R_66 ( .A ( sky130_fd_sc_hd__mux2_1_9_X[0] ) ,
|
||||
.Y ( BUF_net_66 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
endmodule
|
||||
|
||||
|
||||
|
|
@ -1674,7 +1674,7 @@ cbx_1__2__mux_tree_tapbuf_size10_1 mux_top_ipin_0 (
|
|||
.sram_inv ( { SYNOPSYS_UNCONNECTED_5 , SYNOPSYS_UNCONNECTED_6 ,
|
||||
SYNOPSYS_UNCONNECTED_7 , SYNOPSYS_UNCONNECTED_8 } ) ,
|
||||
.out ( bottom_grid_pin_0_ ) , .VDD ( VDD ) , .VSS ( VSS ) ,
|
||||
.p0 ( optlc_net_74 ) ) ;
|
||||
.p0 ( optlc_net_72 ) ) ;
|
||||
cbx_1__2__mux_tree_tapbuf_size10_2 mux_top_ipin_3 (
|
||||
.in ( { chanx_right_out[0] , chanx_left_out[0] , chanx_right_out[2] ,
|
||||
chanx_left_out[2] , chanx_right_out[4] , chanx_left_out[4] ,
|
||||
|
|
@ -1684,7 +1684,7 @@ cbx_1__2__mux_tree_tapbuf_size10_2 mux_top_ipin_3 (
|
|||
.sram_inv ( { SYNOPSYS_UNCONNECTED_9 , SYNOPSYS_UNCONNECTED_10 ,
|
||||
SYNOPSYS_UNCONNECTED_11 , SYNOPSYS_UNCONNECTED_12 } ) ,
|
||||
.out ( bottom_grid_pin_3_ ) , .VDD ( VDD ) , .VSS ( VSS ) ,
|
||||
.p0 ( optlc_net_75 ) ) ;
|
||||
.p0 ( optlc_net_73 ) ) ;
|
||||
cbx_1__2__mux_tree_tapbuf_size10_3 mux_top_ipin_4 (
|
||||
.in ( { chanx_right_out[1] , chanx_left_out[1] , chanx_right_out[3] ,
|
||||
chanx_left_out[3] , chanx_right_out[5] , chanx_left_out[5] ,
|
||||
|
|
@ -1704,7 +1704,7 @@ cbx_1__2__mux_tree_tapbuf_size10_4 mux_top_ipin_7 (
|
|||
.sram_inv ( { SYNOPSYS_UNCONNECTED_17 , SYNOPSYS_UNCONNECTED_18 ,
|
||||
SYNOPSYS_UNCONNECTED_19 , SYNOPSYS_UNCONNECTED_20 } ) ,
|
||||
.out ( bottom_grid_pin_7_ ) , .VDD ( VDD ) , .VSS ( VSS ) ,
|
||||
.p0 ( optlc_net_75 ) ) ;
|
||||
.p0 ( optlc_net_73 ) ) ;
|
||||
cbx_1__2__mux_tree_tapbuf_size10_5 mux_top_ipin_8 (
|
||||
.in ( { chanx_right_out[1] , chanx_left_out[1] , chanx_right_out[3] ,
|
||||
chanx_left_out[3] , chanx_right_out[9] , chanx_left_out[9] ,
|
||||
|
|
@ -1714,7 +1714,7 @@ cbx_1__2__mux_tree_tapbuf_size10_5 mux_top_ipin_8 (
|
|||
.sram_inv ( { SYNOPSYS_UNCONNECTED_21 , SYNOPSYS_UNCONNECTED_22 ,
|
||||
SYNOPSYS_UNCONNECTED_23 , SYNOPSYS_UNCONNECTED_24 } ) ,
|
||||
.out ( bottom_grid_pin_8_ ) , .VDD ( VDD ) , .VSS ( VSS ) ,
|
||||
.p0 ( optlc_net_74 ) ) ;
|
||||
.p0 ( optlc_net_72 ) ) ;
|
||||
cbx_1__2__mux_tree_tapbuf_size10_6 mux_top_ipin_11 (
|
||||
.in ( { chanx_right_out[0] , chanx_left_out[0] , chanx_right_out[2] ,
|
||||
chanx_left_out[2] , chanx_right_out[6] , chanx_left_out[6] ,
|
||||
|
|
@ -1734,7 +1734,7 @@ cbx_1__2__mux_tree_tapbuf_size10_7 mux_top_ipin_12 (
|
|||
.sram_inv ( { SYNOPSYS_UNCONNECTED_29 , SYNOPSYS_UNCONNECTED_30 ,
|
||||
SYNOPSYS_UNCONNECTED_31 , SYNOPSYS_UNCONNECTED_32 } ) ,
|
||||
.out ( bottom_grid_pin_12_ ) , .VDD ( VDD ) , .VSS ( VSS ) ,
|
||||
.p0 ( optlc_net_74 ) ) ;
|
||||
.p0 ( optlc_net_72 ) ) ;
|
||||
cbx_1__2__mux_tree_tapbuf_size10 mux_top_ipin_15 (
|
||||
.in ( { chanx_right_out[0] , chanx_left_out[0] , chanx_right_out[2] ,
|
||||
chanx_left_out[2] , chanx_right_out[4] , chanx_left_out[4] ,
|
||||
|
|
@ -1797,7 +1797,7 @@ cbx_1__2__mux_tree_tapbuf_size8_0 mux_top_ipin_1 (
|
|||
.sram_inv ( { SYNOPSYS_UNCONNECTED_37 , SYNOPSYS_UNCONNECTED_38 ,
|
||||
SYNOPSYS_UNCONNECTED_39 , SYNOPSYS_UNCONNECTED_40 } ) ,
|
||||
.out ( bottom_grid_pin_1_ ) , .VDD ( VDD ) , .VSS ( VSS ) ,
|
||||
.p0 ( optlc_net_75 ) ) ;
|
||||
.p0 ( optlc_net_73 ) ) ;
|
||||
cbx_1__2__mux_tree_tapbuf_size8_1 mux_top_ipin_2 (
|
||||
.in ( { chanx_right_out[1] , chanx_left_out[1] , chanx_right_out[3] ,
|
||||
chanx_left_out[3] , chanx_right_out[7] , chanx_left_out[7] ,
|
||||
|
|
@ -1815,7 +1815,7 @@ cbx_1__2__mux_tree_tapbuf_size8_2 mux_top_ipin_5 (
|
|||
.sram_inv ( { SYNOPSYS_UNCONNECTED_45 , SYNOPSYS_UNCONNECTED_46 ,
|
||||
SYNOPSYS_UNCONNECTED_47 , SYNOPSYS_UNCONNECTED_48 } ) ,
|
||||
.out ( bottom_grid_pin_5_ ) , .VDD ( VDD ) , .VSS ( VSS ) ,
|
||||
.p0 ( optlc_net_75 ) ) ;
|
||||
.p0 ( optlc_net_73 ) ) ;
|
||||
cbx_1__2__mux_tree_tapbuf_size8_3 mux_top_ipin_6 (
|
||||
.in ( { chanx_right_out[1] , chanx_left_out[1] , chanx_right_out[3] ,
|
||||
chanx_left_out[3] , chanx_right_out[11] , chanx_left_out[11] ,
|
||||
|
|
@ -1833,7 +1833,7 @@ cbx_1__2__mux_tree_tapbuf_size8_4 mux_top_ipin_9 (
|
|||
.sram_inv ( { SYNOPSYS_UNCONNECTED_53 , SYNOPSYS_UNCONNECTED_54 ,
|
||||
SYNOPSYS_UNCONNECTED_55 , SYNOPSYS_UNCONNECTED_56 } ) ,
|
||||
.out ( bottom_grid_pin_9_ ) , .VDD ( VDD ) , .VSS ( VSS ) ,
|
||||
.p0 ( optlc_net_75 ) ) ;
|
||||
.p0 ( optlc_net_73 ) ) ;
|
||||
cbx_1__2__mux_tree_tapbuf_size8_5 mux_top_ipin_10 (
|
||||
.in ( { chanx_right_out[1] , chanx_left_out[1] , chanx_right_out[3] ,
|
||||
chanx_left_out[3] , chanx_right_out[7] , chanx_left_out[7] ,
|
||||
|
|
@ -1842,7 +1842,7 @@ cbx_1__2__mux_tree_tapbuf_size8_5 mux_top_ipin_10 (
|
|||
.sram_inv ( { SYNOPSYS_UNCONNECTED_57 , SYNOPSYS_UNCONNECTED_58 ,
|
||||
SYNOPSYS_UNCONNECTED_59 , SYNOPSYS_UNCONNECTED_60 } ) ,
|
||||
.out ( bottom_grid_pin_10_ ) , .VDD ( VDD ) , .VSS ( VSS ) ,
|
||||
.p0 ( optlc_net_74 ) ) ;
|
||||
.p0 ( optlc_net_72 ) ) ;
|
||||
cbx_1__2__mux_tree_tapbuf_size8_6 mux_top_ipin_13 (
|
||||
.in ( { chanx_right_out[0] , chanx_left_out[0] , chanx_right_out[2] ,
|
||||
chanx_left_out[2] , chanx_right_out[10] , chanx_left_out[10] ,
|
||||
|
|
@ -1860,7 +1860,7 @@ cbx_1__2__mux_tree_tapbuf_size8 mux_top_ipin_14 (
|
|||
.sram_inv ( { SYNOPSYS_UNCONNECTED_65 , SYNOPSYS_UNCONNECTED_66 ,
|
||||
SYNOPSYS_UNCONNECTED_67 , SYNOPSYS_UNCONNECTED_68 } ) ,
|
||||
.out ( bottom_grid_pin_14_ ) , .VDD ( VDD ) , .VSS ( VSS ) ,
|
||||
.p0 ( optlc_net_74 ) ) ;
|
||||
.p0 ( optlc_net_72 ) ) ;
|
||||
cbx_1__2__mux_tree_tapbuf_size8_mem_0 mem_top_ipin_1 (
|
||||
.prog_clk ( prog_clk ) ,
|
||||
.ccff_head ( mux_tree_tapbuf_size10_mem_1_ccff_tail ) ,
|
||||
|
|
@ -1912,10 +1912,10 @@ cbx_1__2__logical_tile_io_mode_io_ logical_tile_io_mode_io__0 (
|
|||
sky130_fd_sc_hd__buf_1 prog_clk_0_FTB00 ( .A ( prog_clk_0_S_in ) ,
|
||||
.X ( prog_clk[0] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__clkbuf_1 prog_clk_0_W_FTB01 ( .A ( prog_clk_0_S_in ) ,
|
||||
.X ( ctsbuf_net_176 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
.X ( ctsbuf_net_174 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 FTB_19__18 ( .A ( chanx_left_in[0] ) ,
|
||||
.X ( chanx_right_out[0] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 FTB_20__19 ( .A ( chanx_left_in[1] ) ,
|
||||
sky130_fd_sc_hd__buf_12 FTB_20__19 ( .A ( chanx_left_in[1] ) ,
|
||||
.X ( chanx_right_out[1] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 FTB_21__20 ( .A ( chanx_left_in[2] ) ,
|
||||
.X ( chanx_right_out[2] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
|
|
@ -1957,7 +1957,7 @@ sky130_fd_sc_hd__buf_8 FTB_39__38 ( .A ( chanx_right_in[0] ) ,
|
|||
.X ( chanx_left_out[0] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 FTB_40__39 ( .A ( chanx_right_in[1] ) ,
|
||||
.X ( chanx_left_out[1] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 FTB_41__40 ( .A ( chanx_right_in[2] ) ,
|
||||
sky130_fd_sc_hd__buf_12 FTB_41__40 ( .A ( chanx_right_in[2] ) ,
|
||||
.X ( chanx_left_out[2] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 FTB_42__41 ( .A ( chanx_right_in[3] ) ,
|
||||
.X ( chanx_left_out[3] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
|
|
@ -2005,11 +2005,7 @@ sky130_fd_sc_hd__conb_1 optlc_74 ( .LO ( SYNOPSYS_UNCONNECTED_69 ) ,
|
|||
.HI ( optlc_net_72 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__conb_1 optlc_76 ( .LO ( SYNOPSYS_UNCONNECTED_70 ) ,
|
||||
.HI ( optlc_net_73 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__conb_1 optlc_78 ( .LO ( SYNOPSYS_UNCONNECTED_71 ) ,
|
||||
.HI ( optlc_net_74 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__conb_1 optlc_80 ( .LO ( SYNOPSYS_UNCONNECTED_72 ) ,
|
||||
.HI ( optlc_net_75 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 cts_buf_3521207 ( .A ( ctsbuf_net_176 ) ,
|
||||
sky130_fd_sc_hd__buf_6 cts_buf_3521203 ( .A ( ctsbuf_net_174 ) ,
|
||||
.X ( prog_clk_0_W_out ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
endmodule
|
||||
|
||||
|
|
|
|||
|
|
@ -16,14 +16,14 @@ wire copt_net_86 ;
|
|||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ccff_head[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( copt_net_86 ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 FTB_18__17 ( .A ( mem_out[0] ) , .X ( ccff_tail[0] ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1307 ( .A ( copt_net_88 ) ,
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1304 ( .A ( copt_net_84 ) ,
|
||||
.X ( copt_net_83 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1305 ( .A ( copt_net_86 ) ,
|
||||
.X ( copt_net_84 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1309 ( .A ( copt_net_87 ) ,
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1306 ( .A ( copt_net_83 ) ,
|
||||
.X ( copt_net_85 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1307 ( .A ( copt_net_85 ) ,
|
||||
.X ( mem_out[0] ) ) ;
|
||||
sky130_fd_sc_hd__buf_2 copt_h_inst_1310 ( .A ( copt_net_84 ) ,
|
||||
.X ( copt_net_87 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1311 ( .A ( copt_net_86 ) ,
|
||||
.X ( copt_net_88 ) ) ;
|
||||
endmodule
|
||||
|
||||
|
||||
|
|
@ -39,15 +39,14 @@ input IO_ISOL_N ;
|
|||
|
||||
sky130_fd_sc_hd__nand2b_1 ISOL_EN_GATE ( .A_N ( FPGA_DIR ) ,
|
||||
.B ( IO_ISOL_N ) , .Y ( aps_rename_505_ ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 INV_SOC_DIR ( .A ( BUF_net_61 ) , .Y ( SOC_DIR_N ) ) ;
|
||||
sky130_fd_sc_hd__ebufn_4 IN_PROTECT_GATE ( .A ( SOC_IN ) ,
|
||||
.TE_B ( SOC_DIR_N ) , .Z ( FPGA_IN ) ) ;
|
||||
.TE_B ( BUF_net_64 ) , .Z ( FPGA_IN ) ) ;
|
||||
sky130_fd_sc_hd__ebufn_4 OUT_PROTECT_GATE ( .A ( FPGA_OUT ) ,
|
||||
.TE_B ( BUF_net_61 ) , .Z ( SOC_OUT ) ) ;
|
||||
sky130_fd_sc_hd__inv_4 BINV_R_61 ( .A ( BUF_net_63 ) , .Y ( BUF_net_61 ) ) ;
|
||||
sky130_fd_sc_hd__inv_8 BINV_R_62 ( .A ( BUF_net_63 ) , .Y ( SOC_DIR ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 BINV_R_63 ( .A ( aps_rename_505_ ) ,
|
||||
.Y ( BUF_net_63 ) ) ;
|
||||
.TE_B ( BUF_net_63 ) , .Z ( SOC_OUT ) ) ;
|
||||
sky130_fd_sc_hd__inv_8 BINV_R_61 ( .A ( BUF_net_64 ) , .Y ( SOC_DIR ) ) ;
|
||||
sky130_fd_sc_hd__inv_4 BINV_R_63 ( .A ( BUF_net_64 ) , .Y ( BUF_net_63 ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 BINV_R_64 ( .A ( aps_rename_505_ ) ,
|
||||
.Y ( BUF_net_64 ) ) ;
|
||||
endmodule
|
||||
|
||||
|
||||
|
|
@ -114,7 +113,7 @@ sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ccff_head[0] ) ,
|
|||
.CLK ( prog_clk[0] ) , .Q ( mem_out[0] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_1_ ( .D ( mem_out[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[1] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_2_ ( .D ( mem_out[1] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_2_ ( .D ( mem_out[1] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[2] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_3_ ( .D ( mem_out[2] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[3] ) ) ;
|
||||
|
|
@ -403,6 +402,8 @@ wire [0:0] sky130_fd_sc_hd__mux2_1_5_X ;
|
|||
wire [0:0] sky130_fd_sc_hd__mux2_1_6_X ;
|
||||
wire [0:0] sky130_fd_sc_hd__mux2_1_7_X ;
|
||||
|
||||
sky130_fd_sc_hd__buf_6 sky130_fd_sc_hd__buf_4_0_ (
|
||||
.A ( sky130_fd_sc_hd__mux2_1_7_X[0] ) , .X ( out[0] ) ) ;
|
||||
sky130_fd_sc_hd__mux2_1 mux_l1_in_0_ ( .A0 ( in[1] ) , .A1 ( in[0] ) ,
|
||||
.S ( sram[0] ) , .X ( sky130_fd_sc_hd__mux2_1_0_X[0] ) ) ;
|
||||
sky130_fd_sc_hd__mux2_1 mux_l2_in_0_ ( .A0 ( in[2] ) ,
|
||||
|
|
@ -426,8 +427,6 @@ sky130_fd_sc_hd__mux2_1 mux_l4_in_0_ (
|
|||
.A0 ( sky130_fd_sc_hd__mux2_1_6_X[0] ) ,
|
||||
.A1 ( sky130_fd_sc_hd__mux2_1_5_X[0] ) , .S ( sram[3] ) ,
|
||||
.X ( sky130_fd_sc_hd__mux2_1_7_X[0] ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 BUFT_RR_70 ( .A ( sky130_fd_sc_hd__mux2_1_7_X[0] ) ,
|
||||
.X ( out[0] ) ) ;
|
||||
endmodule
|
||||
|
||||
|
||||
|
|
@ -558,7 +557,7 @@ sky130_fd_sc_hd__mux2_1 mux_l4_in_0_ (
|
|||
.A0 ( sky130_fd_sc_hd__mux2_1_6_X[0] ) ,
|
||||
.A1 ( sky130_fd_sc_hd__mux2_1_5_X[0] ) , .S ( sram[3] ) ,
|
||||
.X ( sky130_fd_sc_hd__mux2_1_7_X[0] ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 BUFT_RR_69 ( .A ( sky130_fd_sc_hd__mux2_1_7_X[0] ) ,
|
||||
sky130_fd_sc_hd__buf_6 BUFT_RR_70 ( .A ( sky130_fd_sc_hd__mux2_1_7_X[0] ) ,
|
||||
.X ( out[0] ) ) ;
|
||||
endmodule
|
||||
|
||||
|
|
@ -602,7 +601,7 @@ sky130_fd_sc_hd__mux2_1 mux_l4_in_0_ (
|
|||
.A0 ( sky130_fd_sc_hd__mux2_1_6_X[0] ) ,
|
||||
.A1 ( sky130_fd_sc_hd__mux2_1_5_X[0] ) , .S ( sram[3] ) ,
|
||||
.X ( sky130_fd_sc_hd__mux2_1_7_X[0] ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 BUFT_RR_68 ( .A ( sky130_fd_sc_hd__mux2_1_7_X[0] ) ,
|
||||
sky130_fd_sc_hd__buf_6 BUFT_RR_69 ( .A ( sky130_fd_sc_hd__mux2_1_7_X[0] ) ,
|
||||
.X ( out[0] ) ) ;
|
||||
endmodule
|
||||
|
||||
|
|
@ -618,7 +617,7 @@ sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ccff_head[0] ) ,
|
|||
.CLK ( prog_clk[0] ) , .Q ( mem_out[0] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_1_ ( .D ( mem_out[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[1] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_2_ ( .D ( mem_out[1] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_2_ ( .D ( mem_out[1] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[2] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_3_ ( .D ( mem_out[2] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[3] ) ) ;
|
||||
|
|
@ -747,9 +746,9 @@ input [0:0] ccff_head ;
|
|||
output [0:0] ccff_tail ;
|
||||
output [0:3] mem_out ;
|
||||
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ccff_head[0] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ccff_head[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[0] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_2 sky130_fd_sc_hd__dfxtp_1_1_ ( .D ( mem_out[0] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_1_ ( .D ( mem_out[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[1] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_2_ ( .D ( mem_out[1] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[2] ) ) ;
|
||||
|
|
@ -766,7 +765,7 @@ input [0:0] ccff_head ;
|
|||
output [0:0] ccff_tail ;
|
||||
output [0:3] mem_out ;
|
||||
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ropt_net_93 ) ,
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ropt_net_95 ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[0] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_1_ ( .D ( mem_out[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[1] ) ) ;
|
||||
|
|
@ -775,24 +774,22 @@ sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_2_ ( .D ( mem_out[1] ) ,
|
|||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_3_ ( .D ( mem_out[2] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[3] ) ) ;
|
||||
sky130_fd_sc_hd__buf_1 FTB_1__0 ( .A ( mem_out[3] ) , .X ( ccff_tail[0] ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1300 ( .A ( copt_net_79 ) ,
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1296 ( .A ( ccff_head[0] ) ,
|
||||
.X ( copt_net_75 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1297 ( .A ( copt_net_75 ) ,
|
||||
.X ( copt_net_76 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1298 ( .A ( copt_net_76 ) ,
|
||||
.X ( copt_net_77 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1301 ( .A ( ccff_head[0] ) ,
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1299 ( .A ( copt_net_77 ) ,
|
||||
.X ( copt_net_78 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1302 ( .A ( copt_net_78 ) ,
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1300 ( .A ( copt_net_78 ) ,
|
||||
.X ( copt_net_79 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1303 ( .A ( copt_net_77 ) ,
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1301 ( .A ( copt_net_79 ) ,
|
||||
.X ( copt_net_80 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1304 ( .A ( copt_net_80 ) ,
|
||||
.X ( copt_net_81 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1305 ( .A ( copt_net_81 ) ,
|
||||
.X ( copt_net_82 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 ropt_h_inst_1313 ( .A ( copt_net_82 ) ,
|
||||
.X ( ropt_net_91 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd2_1 ropt_h_inst_1314 ( .A ( ropt_net_91 ) ,
|
||||
.X ( ropt_net_92 ) ) ;
|
||||
sky130_fd_sc_hd__buf_2 ropt_h_inst_1315 ( .A ( ropt_net_92 ) ,
|
||||
.X ( ropt_net_93 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 ropt_h_inst_1313 ( .A ( copt_net_80 ) ,
|
||||
.X ( ropt_net_94 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 ropt_h_inst_1314 ( .A ( ropt_net_94 ) ,
|
||||
.X ( ropt_net_95 ) ) ;
|
||||
endmodule
|
||||
|
||||
|
||||
|
|
@ -843,7 +840,7 @@ sky130_fd_sc_hd__mux2_1 mux_l4_in_0_ (
|
|||
.A0 ( sky130_fd_sc_hd__mux2_1_8_X[0] ) ,
|
||||
.A1 ( sky130_fd_sc_hd__mux2_1_7_X[0] ) , .S ( sram[3] ) ,
|
||||
.X ( sky130_fd_sc_hd__mux2_1_9_X[0] ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 BUFT_RR_67 ( .A ( sky130_fd_sc_hd__mux2_1_9_X[0] ) ,
|
||||
sky130_fd_sc_hd__buf_6 BUFT_RR_68 ( .A ( sky130_fd_sc_hd__mux2_1_9_X[0] ) ,
|
||||
.X ( out[0] ) ) ;
|
||||
endmodule
|
||||
|
||||
|
|
@ -947,7 +944,7 @@ sky130_fd_sc_hd__mux2_1 mux_l4_in_0_ (
|
|||
.A0 ( sky130_fd_sc_hd__mux2_1_8_X[0] ) ,
|
||||
.A1 ( sky130_fd_sc_hd__mux2_1_7_X[0] ) , .S ( sram[3] ) ,
|
||||
.X ( sky130_fd_sc_hd__mux2_1_9_X[0] ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 BUFT_RR_66 ( .A ( sky130_fd_sc_hd__mux2_1_9_X[0] ) ,
|
||||
sky130_fd_sc_hd__buf_6 BUFT_RR_67 ( .A ( sky130_fd_sc_hd__mux2_1_9_X[0] ) ,
|
||||
.X ( out[0] ) ) ;
|
||||
endmodule
|
||||
|
||||
|
|
@ -1126,6 +1123,8 @@ wire [0:0] sky130_fd_sc_hd__mux2_1_7_X ;
|
|||
wire [0:0] sky130_fd_sc_hd__mux2_1_8_X ;
|
||||
wire [0:0] sky130_fd_sc_hd__mux2_1_9_X ;
|
||||
|
||||
sky130_fd_sc_hd__buf_6 sky130_fd_sc_hd__buf_4_0_ (
|
||||
.A ( sky130_fd_sc_hd__mux2_1_9_X[0] ) , .X ( out[0] ) ) ;
|
||||
sky130_fd_sc_hd__mux2_1 mux_l1_in_0_ ( .A0 ( in[1] ) , .A1 ( in[0] ) ,
|
||||
.S ( sram[0] ) , .X ( sky130_fd_sc_hd__mux2_1_0_X[0] ) ) ;
|
||||
sky130_fd_sc_hd__mux2_1 mux_l1_in_1_ ( .A0 ( in[3] ) , .A1 ( in[2] ) ,
|
||||
|
|
@ -1155,8 +1154,6 @@ sky130_fd_sc_hd__mux2_1 mux_l4_in_0_ (
|
|||
.A0 ( sky130_fd_sc_hd__mux2_1_8_X[0] ) ,
|
||||
.A1 ( sky130_fd_sc_hd__mux2_1_7_X[0] ) , .S ( sram[3] ) ,
|
||||
.X ( sky130_fd_sc_hd__mux2_1_9_X[0] ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 BUFT_RR_65 ( .A ( sky130_fd_sc_hd__mux2_1_9_X[0] ) ,
|
||||
.X ( out[0] ) ) ;
|
||||
endmodule
|
||||
|
||||
|
||||
|
|
@ -1207,8 +1204,9 @@ sky130_fd_sc_hd__mux2_1 mux_l4_in_0_ (
|
|||
.A0 ( sky130_fd_sc_hd__mux2_1_8_X[0] ) ,
|
||||
.A1 ( sky130_fd_sc_hd__mux2_1_7_X[0] ) , .S ( sram[3] ) ,
|
||||
.X ( sky130_fd_sc_hd__mux2_1_9_X[0] ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 BUFT_RR_64 ( .A ( sky130_fd_sc_hd__mux2_1_9_X[0] ) ,
|
||||
.X ( out[0] ) ) ;
|
||||
sky130_fd_sc_hd__inv_8 BINV_R_65 ( .A ( BUF_net_66 ) , .Y ( out[0] ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 BINV_R_66 ( .A ( sky130_fd_sc_hd__mux2_1_9_X[0] ) ,
|
||||
.Y ( BUF_net_66 ) ) ;
|
||||
endmodule
|
||||
|
||||
|
||||
|
|
@ -1368,7 +1366,7 @@ cbx_1__2__mux_tree_tapbuf_size10_1 mux_top_ipin_0 (
|
|||
.sram ( mux_tree_tapbuf_size10_1_sram ) ,
|
||||
.sram_inv ( { SYNOPSYS_UNCONNECTED_5 , SYNOPSYS_UNCONNECTED_6 ,
|
||||
SYNOPSYS_UNCONNECTED_7 , SYNOPSYS_UNCONNECTED_8 } ) ,
|
||||
.out ( bottom_grid_pin_0_ ) , .p0 ( optlc_net_74 ) ) ;
|
||||
.out ( bottom_grid_pin_0_ ) , .p0 ( optlc_net_72 ) ) ;
|
||||
cbx_1__2__mux_tree_tapbuf_size10_2 mux_top_ipin_3 (
|
||||
.in ( { chanx_right_out[0] , chanx_left_out[0] , chanx_right_out[2] ,
|
||||
chanx_left_out[2] , chanx_right_out[4] , chanx_left_out[4] ,
|
||||
|
|
@ -1377,7 +1375,7 @@ cbx_1__2__mux_tree_tapbuf_size10_2 mux_top_ipin_3 (
|
|||
.sram ( mux_tree_tapbuf_size10_2_sram ) ,
|
||||
.sram_inv ( { SYNOPSYS_UNCONNECTED_9 , SYNOPSYS_UNCONNECTED_10 ,
|
||||
SYNOPSYS_UNCONNECTED_11 , SYNOPSYS_UNCONNECTED_12 } ) ,
|
||||
.out ( bottom_grid_pin_3_ ) , .p0 ( optlc_net_75 ) ) ;
|
||||
.out ( bottom_grid_pin_3_ ) , .p0 ( optlc_net_73 ) ) ;
|
||||
cbx_1__2__mux_tree_tapbuf_size10_3 mux_top_ipin_4 (
|
||||
.in ( { chanx_right_out[1] , chanx_left_out[1] , chanx_right_out[3] ,
|
||||
chanx_left_out[3] , chanx_right_out[5] , chanx_left_out[5] ,
|
||||
|
|
@ -1395,7 +1393,7 @@ cbx_1__2__mux_tree_tapbuf_size10_4 mux_top_ipin_7 (
|
|||
.sram ( mux_tree_tapbuf_size10_4_sram ) ,
|
||||
.sram_inv ( { SYNOPSYS_UNCONNECTED_17 , SYNOPSYS_UNCONNECTED_18 ,
|
||||
SYNOPSYS_UNCONNECTED_19 , SYNOPSYS_UNCONNECTED_20 } ) ,
|
||||
.out ( bottom_grid_pin_7_ ) , .p0 ( optlc_net_75 ) ) ;
|
||||
.out ( bottom_grid_pin_7_ ) , .p0 ( optlc_net_73 ) ) ;
|
||||
cbx_1__2__mux_tree_tapbuf_size10_5 mux_top_ipin_8 (
|
||||
.in ( { chanx_right_out[1] , chanx_left_out[1] , chanx_right_out[3] ,
|
||||
chanx_left_out[3] , chanx_right_out[9] , chanx_left_out[9] ,
|
||||
|
|
@ -1404,7 +1402,7 @@ cbx_1__2__mux_tree_tapbuf_size10_5 mux_top_ipin_8 (
|
|||
.sram ( mux_tree_tapbuf_size10_5_sram ) ,
|
||||
.sram_inv ( { SYNOPSYS_UNCONNECTED_21 , SYNOPSYS_UNCONNECTED_22 ,
|
||||
SYNOPSYS_UNCONNECTED_23 , SYNOPSYS_UNCONNECTED_24 } ) ,
|
||||
.out ( bottom_grid_pin_8_ ) , .p0 ( optlc_net_74 ) ) ;
|
||||
.out ( bottom_grid_pin_8_ ) , .p0 ( optlc_net_72 ) ) ;
|
||||
cbx_1__2__mux_tree_tapbuf_size10_6 mux_top_ipin_11 (
|
||||
.in ( { chanx_right_out[0] , chanx_left_out[0] , chanx_right_out[2] ,
|
||||
chanx_left_out[2] , chanx_right_out[6] , chanx_left_out[6] ,
|
||||
|
|
@ -1422,7 +1420,7 @@ cbx_1__2__mux_tree_tapbuf_size10_7 mux_top_ipin_12 (
|
|||
.sram ( mux_tree_tapbuf_size10_7_sram ) ,
|
||||
.sram_inv ( { SYNOPSYS_UNCONNECTED_29 , SYNOPSYS_UNCONNECTED_30 ,
|
||||
SYNOPSYS_UNCONNECTED_31 , SYNOPSYS_UNCONNECTED_32 } ) ,
|
||||
.out ( bottom_grid_pin_12_ ) , .p0 ( optlc_net_74 ) ) ;
|
||||
.out ( bottom_grid_pin_12_ ) , .p0 ( optlc_net_72 ) ) ;
|
||||
cbx_1__2__mux_tree_tapbuf_size10 mux_top_ipin_15 (
|
||||
.in ( { chanx_right_out[0] , chanx_left_out[0] , chanx_right_out[2] ,
|
||||
chanx_left_out[2] , chanx_right_out[4] , chanx_left_out[4] ,
|
||||
|
|
@ -1483,7 +1481,7 @@ cbx_1__2__mux_tree_tapbuf_size8_0 mux_top_ipin_1 (
|
|||
.sram ( mux_tree_tapbuf_size8_0_sram ) ,
|
||||
.sram_inv ( { SYNOPSYS_UNCONNECTED_37 , SYNOPSYS_UNCONNECTED_38 ,
|
||||
SYNOPSYS_UNCONNECTED_39 , SYNOPSYS_UNCONNECTED_40 } ) ,
|
||||
.out ( bottom_grid_pin_1_ ) , .p0 ( optlc_net_75 ) ) ;
|
||||
.out ( bottom_grid_pin_1_ ) , .p0 ( optlc_net_73 ) ) ;
|
||||
cbx_1__2__mux_tree_tapbuf_size8_1 mux_top_ipin_2 (
|
||||
.in ( { chanx_right_out[1] , chanx_left_out[1] , chanx_right_out[3] ,
|
||||
chanx_left_out[3] , chanx_right_out[7] , chanx_left_out[7] ,
|
||||
|
|
@ -1499,7 +1497,7 @@ cbx_1__2__mux_tree_tapbuf_size8_2 mux_top_ipin_5 (
|
|||
.sram ( mux_tree_tapbuf_size8_2_sram ) ,
|
||||
.sram_inv ( { SYNOPSYS_UNCONNECTED_45 , SYNOPSYS_UNCONNECTED_46 ,
|
||||
SYNOPSYS_UNCONNECTED_47 , SYNOPSYS_UNCONNECTED_48 } ) ,
|
||||
.out ( bottom_grid_pin_5_ ) , .p0 ( optlc_net_75 ) ) ;
|
||||
.out ( bottom_grid_pin_5_ ) , .p0 ( optlc_net_73 ) ) ;
|
||||
cbx_1__2__mux_tree_tapbuf_size8_3 mux_top_ipin_6 (
|
||||
.in ( { chanx_right_out[1] , chanx_left_out[1] , chanx_right_out[3] ,
|
||||
chanx_left_out[3] , chanx_right_out[11] , chanx_left_out[11] ,
|
||||
|
|
@ -1515,7 +1513,7 @@ cbx_1__2__mux_tree_tapbuf_size8_4 mux_top_ipin_9 (
|
|||
.sram ( mux_tree_tapbuf_size8_4_sram ) ,
|
||||
.sram_inv ( { SYNOPSYS_UNCONNECTED_53 , SYNOPSYS_UNCONNECTED_54 ,
|
||||
SYNOPSYS_UNCONNECTED_55 , SYNOPSYS_UNCONNECTED_56 } ) ,
|
||||
.out ( bottom_grid_pin_9_ ) , .p0 ( optlc_net_75 ) ) ;
|
||||
.out ( bottom_grid_pin_9_ ) , .p0 ( optlc_net_73 ) ) ;
|
||||
cbx_1__2__mux_tree_tapbuf_size8_5 mux_top_ipin_10 (
|
||||
.in ( { chanx_right_out[1] , chanx_left_out[1] , chanx_right_out[3] ,
|
||||
chanx_left_out[3] , chanx_right_out[7] , chanx_left_out[7] ,
|
||||
|
|
@ -1523,7 +1521,7 @@ cbx_1__2__mux_tree_tapbuf_size8_5 mux_top_ipin_10 (
|
|||
.sram ( mux_tree_tapbuf_size8_5_sram ) ,
|
||||
.sram_inv ( { SYNOPSYS_UNCONNECTED_57 , SYNOPSYS_UNCONNECTED_58 ,
|
||||
SYNOPSYS_UNCONNECTED_59 , SYNOPSYS_UNCONNECTED_60 } ) ,
|
||||
.out ( bottom_grid_pin_10_ ) , .p0 ( optlc_net_74 ) ) ;
|
||||
.out ( bottom_grid_pin_10_ ) , .p0 ( optlc_net_72 ) ) ;
|
||||
cbx_1__2__mux_tree_tapbuf_size8_6 mux_top_ipin_13 (
|
||||
.in ( { chanx_right_out[0] , chanx_left_out[0] , chanx_right_out[2] ,
|
||||
chanx_left_out[2] , chanx_right_out[10] , chanx_left_out[10] ,
|
||||
|
|
@ -1539,7 +1537,7 @@ cbx_1__2__mux_tree_tapbuf_size8 mux_top_ipin_14 (
|
|||
.sram ( mux_tree_tapbuf_size8_7_sram ) ,
|
||||
.sram_inv ( { SYNOPSYS_UNCONNECTED_65 , SYNOPSYS_UNCONNECTED_66 ,
|
||||
SYNOPSYS_UNCONNECTED_67 , SYNOPSYS_UNCONNECTED_68 } ) ,
|
||||
.out ( bottom_grid_pin_14_ ) , .p0 ( optlc_net_74 ) ) ;
|
||||
.out ( bottom_grid_pin_14_ ) , .p0 ( optlc_net_72 ) ) ;
|
||||
cbx_1__2__mux_tree_tapbuf_size8_mem_0 mem_top_ipin_1 (
|
||||
.prog_clk ( prog_clk ) ,
|
||||
.ccff_head ( mux_tree_tapbuf_size10_mem_1_ccff_tail ) ,
|
||||
|
|
@ -1591,10 +1589,10 @@ cbx_1__2__logical_tile_io_mode_io_ logical_tile_io_mode_io__0 (
|
|||
sky130_fd_sc_hd__buf_1 prog_clk_0_FTB00 ( .A ( prog_clk_0_S_in ) ,
|
||||
.X ( prog_clk[0] ) ) ;
|
||||
sky130_fd_sc_hd__clkbuf_1 prog_clk_0_W_FTB01 ( .A ( prog_clk_0_S_in ) ,
|
||||
.X ( ctsbuf_net_176 ) ) ;
|
||||
.X ( ctsbuf_net_174 ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 FTB_19__18 ( .A ( chanx_left_in[0] ) ,
|
||||
.X ( chanx_right_out[0] ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 FTB_20__19 ( .A ( chanx_left_in[1] ) ,
|
||||
sky130_fd_sc_hd__buf_12 FTB_20__19 ( .A ( chanx_left_in[1] ) ,
|
||||
.X ( chanx_right_out[1] ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 FTB_21__20 ( .A ( chanx_left_in[2] ) ,
|
||||
.X ( chanx_right_out[2] ) ) ;
|
||||
|
|
@ -1636,7 +1634,7 @@ sky130_fd_sc_hd__buf_8 FTB_39__38 ( .A ( chanx_right_in[0] ) ,
|
|||
.X ( chanx_left_out[0] ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 FTB_40__39 ( .A ( chanx_right_in[1] ) ,
|
||||
.X ( chanx_left_out[1] ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 FTB_41__40 ( .A ( chanx_right_in[2] ) ,
|
||||
sky130_fd_sc_hd__buf_12 FTB_41__40 ( .A ( chanx_right_in[2] ) ,
|
||||
.X ( chanx_left_out[2] ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 FTB_42__41 ( .A ( chanx_right_in[3] ) ,
|
||||
.X ( chanx_left_out[3] ) ) ;
|
||||
|
|
@ -1681,11 +1679,7 @@ sky130_fd_sc_hd__conb_1 optlc_74 ( .LO ( SYNOPSYS_UNCONNECTED_69 ) ,
|
|||
.HI ( optlc_net_72 ) ) ;
|
||||
sky130_fd_sc_hd__conb_1 optlc_76 ( .LO ( SYNOPSYS_UNCONNECTED_70 ) ,
|
||||
.HI ( optlc_net_73 ) ) ;
|
||||
sky130_fd_sc_hd__conb_1 optlc_78 ( .LO ( SYNOPSYS_UNCONNECTED_71 ) ,
|
||||
.HI ( optlc_net_74 ) ) ;
|
||||
sky130_fd_sc_hd__conb_1 optlc_80 ( .LO ( SYNOPSYS_UNCONNECTED_72 ) ,
|
||||
.HI ( optlc_net_75 ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 cts_buf_3521207 ( .A ( ctsbuf_net_176 ) ,
|
||||
sky130_fd_sc_hd__buf_6 cts_buf_3521203 ( .A ( ctsbuf_net_174 ) ,
|
||||
.X ( prog_clk_0_W_out ) ) ;
|
||||
endmodule
|
||||
|
||||
|
|
|
|||
|
|
@ -108,7 +108,7 @@ cbx_1__2__mux_tree_tapbuf_size10_1 mux_top_ipin_0 (
|
|||
.sram ( mux_tree_tapbuf_size10_1_sram ) ,
|
||||
.sram_inv ( { SYNOPSYS_UNCONNECTED_5 , SYNOPSYS_UNCONNECTED_6 ,
|
||||
SYNOPSYS_UNCONNECTED_7 , SYNOPSYS_UNCONNECTED_8 } ) ,
|
||||
.out ( bottom_grid_pin_0_ ) , .p0 ( optlc_net_74 ) ) ;
|
||||
.out ( bottom_grid_pin_0_ ) , .p0 ( optlc_net_72 ) ) ;
|
||||
cbx_1__2__mux_tree_tapbuf_size10_2 mux_top_ipin_3 (
|
||||
.in ( { chanx_right_out[0] , chanx_left_out[0] , chanx_right_out[2] ,
|
||||
chanx_left_out[2] , chanx_right_out[4] , chanx_left_out[4] ,
|
||||
|
|
@ -117,7 +117,7 @@ cbx_1__2__mux_tree_tapbuf_size10_2 mux_top_ipin_3 (
|
|||
.sram ( mux_tree_tapbuf_size10_2_sram ) ,
|
||||
.sram_inv ( { SYNOPSYS_UNCONNECTED_9 , SYNOPSYS_UNCONNECTED_10 ,
|
||||
SYNOPSYS_UNCONNECTED_11 , SYNOPSYS_UNCONNECTED_12 } ) ,
|
||||
.out ( bottom_grid_pin_3_ ) , .p0 ( optlc_net_75 ) ) ;
|
||||
.out ( bottom_grid_pin_3_ ) , .p0 ( optlc_net_73 ) ) ;
|
||||
cbx_1__2__mux_tree_tapbuf_size10_3 mux_top_ipin_4 (
|
||||
.in ( { chanx_right_out[1] , chanx_left_out[1] , chanx_right_out[3] ,
|
||||
chanx_left_out[3] , chanx_right_out[5] , chanx_left_out[5] ,
|
||||
|
|
@ -135,7 +135,7 @@ cbx_1__2__mux_tree_tapbuf_size10_4 mux_top_ipin_7 (
|
|||
.sram ( mux_tree_tapbuf_size10_4_sram ) ,
|
||||
.sram_inv ( { SYNOPSYS_UNCONNECTED_17 , SYNOPSYS_UNCONNECTED_18 ,
|
||||
SYNOPSYS_UNCONNECTED_19 , SYNOPSYS_UNCONNECTED_20 } ) ,
|
||||
.out ( bottom_grid_pin_7_ ) , .p0 ( optlc_net_75 ) ) ;
|
||||
.out ( bottom_grid_pin_7_ ) , .p0 ( optlc_net_73 ) ) ;
|
||||
cbx_1__2__mux_tree_tapbuf_size10_5 mux_top_ipin_8 (
|
||||
.in ( { chanx_right_out[1] , chanx_left_out[1] , chanx_right_out[3] ,
|
||||
chanx_left_out[3] , chanx_right_out[9] , chanx_left_out[9] ,
|
||||
|
|
@ -144,7 +144,7 @@ cbx_1__2__mux_tree_tapbuf_size10_5 mux_top_ipin_8 (
|
|||
.sram ( mux_tree_tapbuf_size10_5_sram ) ,
|
||||
.sram_inv ( { SYNOPSYS_UNCONNECTED_21 , SYNOPSYS_UNCONNECTED_22 ,
|
||||
SYNOPSYS_UNCONNECTED_23 , SYNOPSYS_UNCONNECTED_24 } ) ,
|
||||
.out ( bottom_grid_pin_8_ ) , .p0 ( optlc_net_74 ) ) ;
|
||||
.out ( bottom_grid_pin_8_ ) , .p0 ( optlc_net_72 ) ) ;
|
||||
cbx_1__2__mux_tree_tapbuf_size10_6 mux_top_ipin_11 (
|
||||
.in ( { chanx_right_out[0] , chanx_left_out[0] , chanx_right_out[2] ,
|
||||
chanx_left_out[2] , chanx_right_out[6] , chanx_left_out[6] ,
|
||||
|
|
@ -162,7 +162,7 @@ cbx_1__2__mux_tree_tapbuf_size10_7 mux_top_ipin_12 (
|
|||
.sram ( mux_tree_tapbuf_size10_7_sram ) ,
|
||||
.sram_inv ( { SYNOPSYS_UNCONNECTED_29 , SYNOPSYS_UNCONNECTED_30 ,
|
||||
SYNOPSYS_UNCONNECTED_31 , SYNOPSYS_UNCONNECTED_32 } ) ,
|
||||
.out ( bottom_grid_pin_12_ ) , .p0 ( optlc_net_74 ) ) ;
|
||||
.out ( bottom_grid_pin_12_ ) , .p0 ( optlc_net_72 ) ) ;
|
||||
cbx_1__2__mux_tree_tapbuf_size10 mux_top_ipin_15 (
|
||||
.in ( { chanx_right_out[0] , chanx_left_out[0] , chanx_right_out[2] ,
|
||||
chanx_left_out[2] , chanx_right_out[4] , chanx_left_out[4] ,
|
||||
|
|
@ -223,7 +223,7 @@ cbx_1__2__mux_tree_tapbuf_size8_0 mux_top_ipin_1 (
|
|||
.sram ( mux_tree_tapbuf_size8_0_sram ) ,
|
||||
.sram_inv ( { SYNOPSYS_UNCONNECTED_37 , SYNOPSYS_UNCONNECTED_38 ,
|
||||
SYNOPSYS_UNCONNECTED_39 , SYNOPSYS_UNCONNECTED_40 } ) ,
|
||||
.out ( bottom_grid_pin_1_ ) , .p0 ( optlc_net_75 ) ) ;
|
||||
.out ( bottom_grid_pin_1_ ) , .p0 ( optlc_net_73 ) ) ;
|
||||
cbx_1__2__mux_tree_tapbuf_size8_1 mux_top_ipin_2 (
|
||||
.in ( { chanx_right_out[1] , chanx_left_out[1] , chanx_right_out[3] ,
|
||||
chanx_left_out[3] , chanx_right_out[7] , chanx_left_out[7] ,
|
||||
|
|
@ -239,7 +239,7 @@ cbx_1__2__mux_tree_tapbuf_size8_2 mux_top_ipin_5 (
|
|||
.sram ( mux_tree_tapbuf_size8_2_sram ) ,
|
||||
.sram_inv ( { SYNOPSYS_UNCONNECTED_45 , SYNOPSYS_UNCONNECTED_46 ,
|
||||
SYNOPSYS_UNCONNECTED_47 , SYNOPSYS_UNCONNECTED_48 } ) ,
|
||||
.out ( bottom_grid_pin_5_ ) , .p0 ( optlc_net_75 ) ) ;
|
||||
.out ( bottom_grid_pin_5_ ) , .p0 ( optlc_net_73 ) ) ;
|
||||
cbx_1__2__mux_tree_tapbuf_size8_3 mux_top_ipin_6 (
|
||||
.in ( { chanx_right_out[1] , chanx_left_out[1] , chanx_right_out[3] ,
|
||||
chanx_left_out[3] , chanx_right_out[11] , chanx_left_out[11] ,
|
||||
|
|
@ -255,7 +255,7 @@ cbx_1__2__mux_tree_tapbuf_size8_4 mux_top_ipin_9 (
|
|||
.sram ( mux_tree_tapbuf_size8_4_sram ) ,
|
||||
.sram_inv ( { SYNOPSYS_UNCONNECTED_53 , SYNOPSYS_UNCONNECTED_54 ,
|
||||
SYNOPSYS_UNCONNECTED_55 , SYNOPSYS_UNCONNECTED_56 } ) ,
|
||||
.out ( bottom_grid_pin_9_ ) , .p0 ( optlc_net_75 ) ) ;
|
||||
.out ( bottom_grid_pin_9_ ) , .p0 ( optlc_net_73 ) ) ;
|
||||
cbx_1__2__mux_tree_tapbuf_size8_5 mux_top_ipin_10 (
|
||||
.in ( { chanx_right_out[1] , chanx_left_out[1] , chanx_right_out[3] ,
|
||||
chanx_left_out[3] , chanx_right_out[7] , chanx_left_out[7] ,
|
||||
|
|
@ -263,7 +263,7 @@ cbx_1__2__mux_tree_tapbuf_size8_5 mux_top_ipin_10 (
|
|||
.sram ( mux_tree_tapbuf_size8_5_sram ) ,
|
||||
.sram_inv ( { SYNOPSYS_UNCONNECTED_57 , SYNOPSYS_UNCONNECTED_58 ,
|
||||
SYNOPSYS_UNCONNECTED_59 , SYNOPSYS_UNCONNECTED_60 } ) ,
|
||||
.out ( bottom_grid_pin_10_ ) , .p0 ( optlc_net_74 ) ) ;
|
||||
.out ( bottom_grid_pin_10_ ) , .p0 ( optlc_net_72 ) ) ;
|
||||
cbx_1__2__mux_tree_tapbuf_size8_6 mux_top_ipin_13 (
|
||||
.in ( { chanx_right_out[0] , chanx_left_out[0] , chanx_right_out[2] ,
|
||||
chanx_left_out[2] , chanx_right_out[10] , chanx_left_out[10] ,
|
||||
|
|
@ -279,7 +279,7 @@ cbx_1__2__mux_tree_tapbuf_size8 mux_top_ipin_14 (
|
|||
.sram ( mux_tree_tapbuf_size8_7_sram ) ,
|
||||
.sram_inv ( { SYNOPSYS_UNCONNECTED_65 , SYNOPSYS_UNCONNECTED_66 ,
|
||||
SYNOPSYS_UNCONNECTED_67 , SYNOPSYS_UNCONNECTED_68 } ) ,
|
||||
.out ( bottom_grid_pin_14_ ) , .p0 ( optlc_net_74 ) ) ;
|
||||
.out ( bottom_grid_pin_14_ ) , .p0 ( optlc_net_72 ) ) ;
|
||||
cbx_1__2__mux_tree_tapbuf_size8_mem_0 mem_top_ipin_1 (
|
||||
.prog_clk ( prog_clk ) ,
|
||||
.ccff_head ( mux_tree_tapbuf_size10_mem_1_ccff_tail ) ,
|
||||
|
|
@ -331,10 +331,10 @@ cbx_1__2__logical_tile_io_mode_io_ logical_tile_io_mode_io__0 (
|
|||
sky130_fd_sc_hd__buf_1 prog_clk_0_FTB00 ( .A ( prog_clk_0_S_in ) ,
|
||||
.X ( prog_clk[0] ) ) ;
|
||||
sky130_fd_sc_hd__clkbuf_1 prog_clk_0_W_FTB01 ( .A ( prog_clk_0_S_in ) ,
|
||||
.X ( ctsbuf_net_176 ) ) ;
|
||||
.X ( ctsbuf_net_174 ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 FTB_19__18 ( .A ( chanx_left_in[0] ) ,
|
||||
.X ( chanx_right_out[0] ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 FTB_20__19 ( .A ( chanx_left_in[1] ) ,
|
||||
sky130_fd_sc_hd__buf_12 FTB_20__19 ( .A ( chanx_left_in[1] ) ,
|
||||
.X ( chanx_right_out[1] ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 FTB_21__20 ( .A ( chanx_left_in[2] ) ,
|
||||
.X ( chanx_right_out[2] ) ) ;
|
||||
|
|
@ -376,7 +376,7 @@ sky130_fd_sc_hd__buf_8 FTB_39__38 ( .A ( chanx_right_in[0] ) ,
|
|||
.X ( chanx_left_out[0] ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 FTB_40__39 ( .A ( chanx_right_in[1] ) ,
|
||||
.X ( chanx_left_out[1] ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 FTB_41__40 ( .A ( chanx_right_in[2] ) ,
|
||||
sky130_fd_sc_hd__buf_12 FTB_41__40 ( .A ( chanx_right_in[2] ) ,
|
||||
.X ( chanx_left_out[2] ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 FTB_42__41 ( .A ( chanx_right_in[3] ) ,
|
||||
.X ( chanx_left_out[3] ) ) ;
|
||||
|
|
@ -421,11 +421,7 @@ sky130_fd_sc_hd__conb_1 optlc_74 ( .LO ( SYNOPSYS_UNCONNECTED_69 ) ,
|
|||
.HI ( optlc_net_72 ) ) ;
|
||||
sky130_fd_sc_hd__conb_1 optlc_76 ( .LO ( SYNOPSYS_UNCONNECTED_70 ) ,
|
||||
.HI ( optlc_net_73 ) ) ;
|
||||
sky130_fd_sc_hd__conb_1 optlc_78 ( .LO ( SYNOPSYS_UNCONNECTED_71 ) ,
|
||||
.HI ( optlc_net_74 ) ) ;
|
||||
sky130_fd_sc_hd__conb_1 optlc_80 ( .LO ( SYNOPSYS_UNCONNECTED_72 ) ,
|
||||
.HI ( optlc_net_75 ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 cts_buf_3521207 ( .A ( ctsbuf_net_176 ) ,
|
||||
sky130_fd_sc_hd__buf_6 cts_buf_3521203 ( .A ( ctsbuf_net_174 ) ,
|
||||
.X ( prog_clk_0_W_out ) ) ;
|
||||
endmodule
|
||||
|
||||
|
|
|
|||
|
|
@ -11,23 +11,23 @@ input [0:0] ccff_head ;
|
|||
output [0:0] ccff_tail ;
|
||||
output [0:0] mem_out ;
|
||||
|
||||
wire copt_net_55 ;
|
||||
wire copt_net_60 ;
|
||||
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ccff_head[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( copt_net_55 ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 FTB_2__1 ( .A ( copt_net_59 ) , .X ( ccff_tail[0] ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1187 ( .A ( copt_net_55 ) ,
|
||||
.X ( mem_out[0] ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1188 ( .A ( mem_out[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( copt_net_60 ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 FTB_2__1 ( .A ( mem_out[0] ) , .X ( ccff_tail[0] ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1187 ( .A ( copt_net_60 ) ,
|
||||
.X ( copt_net_55 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1188 ( .A ( copt_net_55 ) ,
|
||||
.X ( copt_net_56 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1189 ( .A ( copt_net_60 ) ,
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1189 ( .A ( copt_net_56 ) ,
|
||||
.X ( copt_net_57 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1190 ( .A ( copt_net_57 ) ,
|
||||
.X ( copt_net_58 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1191 ( .A ( copt_net_58 ) ,
|
||||
.X ( copt_net_59 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1192 ( .A ( copt_net_56 ) ,
|
||||
.X ( copt_net_60 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1192 ( .A ( copt_net_61 ) ,
|
||||
.X ( mem_out[0] ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1193 ( .A ( copt_net_58 ) ,
|
||||
.X ( copt_net_61 ) ) ;
|
||||
endmodule
|
||||
|
||||
|
||||
|
|
@ -123,17 +123,17 @@ sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_2_ ( .D ( mem_out[1] ) ,
|
|||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_3_ ( .D ( mem_out[2] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[3] ) ) ;
|
||||
sky130_fd_sc_hd__buf_1 FTB_1__0 ( .A ( mem_out[3] ) , .X ( ccff_tail[0] ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1181 ( .A ( copt_net_51 ) ,
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1181 ( .A ( ccff_head[0] ) ,
|
||||
.X ( copt_net_49 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1182 ( .A ( copt_net_52 ) ,
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1182 ( .A ( copt_net_49 ) ,
|
||||
.X ( copt_net_50 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1183 ( .A ( copt_net_53 ) ,
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1183 ( .A ( copt_net_50 ) ,
|
||||
.X ( copt_net_51 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1184 ( .A ( ccff_head[0] ) ,
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1184 ( .A ( copt_net_51 ) ,
|
||||
.X ( copt_net_52 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1185 ( .A ( copt_net_50 ) ,
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1185 ( .A ( copt_net_52 ) ,
|
||||
.X ( copt_net_53 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1186 ( .A ( copt_net_49 ) ,
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1186 ( .A ( copt_net_53 ) ,
|
||||
.X ( copt_net_54 ) ) ;
|
||||
endmodule
|
||||
|
||||
|
|
@ -224,10 +224,14 @@ output [0:0] right_width_0_height_0__pin_1_upper ;
|
|||
output [0:0] right_width_0_height_0__pin_1_lower ;
|
||||
input prog_clk_0_E_in ;
|
||||
|
||||
wire ropt_net_73 ;
|
||||
wire ropt_net_75 ;
|
||||
wire ropt_net_74 ;
|
||||
wire ropt_net_72 ;
|
||||
wire ropt_net_67 ;
|
||||
wire ropt_net_68 ;
|
||||
wire ropt_net_66 ;
|
||||
wire ropt_net_65 ;
|
||||
wire ropt_net_63 ;
|
||||
wire ropt_net_69 ;
|
||||
wire ropt_net_64 ;
|
||||
wire ropt_net_62 ;
|
||||
wire [0:0] prog_clk ;
|
||||
wire prog_clk_0 ;
|
||||
wire [0:3] mux_tree_tapbuf_size10_0_sram ;
|
||||
|
|
@ -270,12 +274,12 @@ sky130_fd_sc_hd__buf_8 FTB_7__6 ( .A ( chany_bottom_in[4] ) ,
|
|||
.X ( chany_top_out[4] ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 FTB_8__7 ( .A ( chany_bottom_in[5] ) ,
|
||||
.X ( chany_top_out[5] ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 FTB_9__8 ( .A ( chany_bottom_in[6] ) ,
|
||||
sky130_fd_sc_hd__buf_6 FTB_9__8 ( .A ( chany_bottom_in[6] ) ,
|
||||
.X ( chany_top_out[6] ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 FTB_10__9 ( .A ( chany_bottom_in[7] ) ,
|
||||
.X ( ropt_net_73 ) ) ;
|
||||
.X ( ropt_net_67 ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 FTB_11__10 ( .A ( chany_bottom_in[8] ) ,
|
||||
.X ( ropt_net_75 ) ) ;
|
||||
.X ( ropt_net_68 ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 FTB_12__11 ( .A ( chany_bottom_in[9] ) ,
|
||||
.X ( chany_top_out[9] ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 FTB_13__12 ( .A ( chany_bottom_in[10] ) ,
|
||||
|
|
@ -283,18 +287,18 @@ sky130_fd_sc_hd__buf_8 FTB_13__12 ( .A ( chany_bottom_in[10] ) ,
|
|||
sky130_fd_sc_hd__buf_6 FTB_14__13 ( .A ( chany_bottom_in[11] ) ,
|
||||
.X ( chany_top_out[11] ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 FTB_15__14 ( .A ( chany_bottom_in[12] ) ,
|
||||
.X ( chany_top_out[12] ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 FTB_16__15 ( .A ( chany_bottom_in[13] ) ,
|
||||
.X ( chany_top_out[13] ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 FTB_17__16 ( .A ( chany_bottom_in[14] ) ,
|
||||
.X ( chany_top_out[14] ) ) ;
|
||||
.X ( ropt_net_66 ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 FTB_16__15 ( .A ( chany_bottom_in[13] ) ,
|
||||
.X ( ropt_net_65 ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 FTB_17__16 ( .A ( chany_bottom_in[14] ) ,
|
||||
.X ( ropt_net_63 ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 FTB_18__17 ( .A ( chany_bottom_in[15] ) ,
|
||||
.X ( chany_top_out[15] ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 FTB_19__18 ( .A ( chany_bottom_in[16] ) ,
|
||||
.X ( chany_top_out[16] ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 FTB_20__19 ( .A ( chany_bottom_in[17] ) ,
|
||||
.X ( chany_top_out[17] ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 FTB_21__20 ( .A ( chany_bottom_in[18] ) ,
|
||||
sky130_fd_sc_hd__buf_6 FTB_21__20 ( .A ( chany_bottom_in[18] ) ,
|
||||
.X ( chany_top_out[18] ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 FTB_22__21 ( .A ( chany_bottom_in[19] ) ,
|
||||
.X ( chany_top_out[19] ) ) ;
|
||||
|
|
@ -305,7 +309,7 @@ sky130_fd_sc_hd__buf_6 FTB_24__23 ( .A ( chany_top_in[1] ) ,
|
|||
sky130_fd_sc_hd__buf_8 FTB_25__24 ( .A ( chany_top_in[2] ) ,
|
||||
.X ( chany_bottom_out[2] ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 FTB_26__25 ( .A ( chany_top_in[3] ) ,
|
||||
.X ( ropt_net_74 ) ) ;
|
||||
.X ( chany_bottom_out[3] ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 FTB_27__26 ( .A ( chany_top_in[4] ) ,
|
||||
.X ( chany_bottom_out[4] ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 FTB_28__27 ( .A ( chany_top_in[5] ) ,
|
||||
|
|
@ -321,10 +325,10 @@ sky130_fd_sc_hd__buf_6 FTB_32__31 ( .A ( chany_top_in[9] ) ,
|
|||
sky130_fd_sc_hd__buf_8 FTB_33__32 ( .A ( chany_top_in[10] ) ,
|
||||
.X ( chany_bottom_out[10] ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 FTB_34__33 ( .A ( chany_top_in[11] ) ,
|
||||
.X ( chany_bottom_out[11] ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 FTB_35__34 ( .A ( chany_top_in[12] ) ,
|
||||
.X ( chany_bottom_out[12] ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 FTB_36__35 ( .A ( chany_top_in[13] ) ,
|
||||
.X ( ropt_net_69 ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 FTB_35__34 ( .A ( chany_top_in[12] ) ,
|
||||
.X ( ropt_net_64 ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 FTB_36__35 ( .A ( chany_top_in[13] ) ,
|
||||
.X ( chany_bottom_out[13] ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 FTB_37__36 ( .A ( chany_top_in[14] ) ,
|
||||
.X ( chany_bottom_out[14] ) ) ;
|
||||
|
|
@ -335,7 +339,7 @@ sky130_fd_sc_hd__buf_8 FTB_39__38 ( .A ( chany_top_in[16] ) ,
|
|||
sky130_fd_sc_hd__buf_6 FTB_40__39 ( .A ( chany_top_in[17] ) ,
|
||||
.X ( chany_bottom_out[17] ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 FTB_41__40 ( .A ( chany_top_in[18] ) ,
|
||||
.X ( ropt_net_72 ) ) ;
|
||||
.X ( ropt_net_62 ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 FTB_42__41 ( .A ( chany_top_in[19] ) ,
|
||||
.X ( chany_bottom_out[19] ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 FTB_43__42 (
|
||||
|
|
@ -343,14 +347,22 @@ sky130_fd_sc_hd__buf_6 FTB_43__42 (
|
|||
.X ( right_width_0_height_0__pin_1_upper[0] ) ) ;
|
||||
sky130_fd_sc_hd__conb_1 optlc_49 ( .LO ( SYNOPSYS_UNCONNECTED_5 ) ,
|
||||
.HI ( optlc_net_48 ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 ropt_mt_inst_1204 ( .A ( ropt_net_72 ) ,
|
||||
sky130_fd_sc_hd__buf_8 ropt_mt_inst_1194 ( .A ( ropt_net_62 ) ,
|
||||
.X ( chany_bottom_out[18] ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 ropt_mt_inst_1205 ( .A ( ropt_net_73 ) ,
|
||||
sky130_fd_sc_hd__buf_8 ropt_mt_inst_1195 ( .A ( ropt_net_63 ) ,
|
||||
.X ( chany_top_out[14] ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 ropt_mt_inst_1196 ( .A ( ropt_net_64 ) ,
|
||||
.X ( chany_bottom_out[12] ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 ropt_mt_inst_1197 ( .A ( ropt_net_65 ) ,
|
||||
.X ( chany_top_out[13] ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 ropt_mt_inst_1198 ( .A ( ropt_net_66 ) ,
|
||||
.X ( chany_top_out[12] ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 ropt_mt_inst_1199 ( .A ( ropt_net_67 ) ,
|
||||
.X ( chany_top_out[7] ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 ropt_mt_inst_1206 ( .A ( ropt_net_74 ) ,
|
||||
.X ( chany_bottom_out[3] ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 ropt_mt_inst_1207 ( .A ( ropt_net_75 ) ,
|
||||
sky130_fd_sc_hd__buf_8 ropt_mt_inst_1200 ( .A ( ropt_net_68 ) ,
|
||||
.X ( chany_top_out[8] ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 ropt_mt_inst_1201 ( .A ( ropt_net_69 ) ,
|
||||
.X ( chany_bottom_out[11] ) ) ;
|
||||
endmodule
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -13,27 +13,27 @@ output [0:0] mem_out ;
|
|||
input VDD ;
|
||||
input VSS ;
|
||||
|
||||
wire copt_net_55 ;
|
||||
wire copt_net_60 ;
|
||||
supply1 VDD ;
|
||||
supply0 VSS ;
|
||||
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ccff_head[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( copt_net_55 ) , .VPWR ( VDD ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( copt_net_60 ) , .VPWR ( VDD ) ,
|
||||
.VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 FTB_2__1 ( .A ( copt_net_59 ) , .X ( ccff_tail[0] ) ,
|
||||
sky130_fd_sc_hd__buf_6 FTB_2__1 ( .A ( mem_out[0] ) , .X ( ccff_tail[0] ) ,
|
||||
.VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1187 ( .A ( copt_net_55 ) ,
|
||||
.X ( mem_out[0] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1188 ( .A ( mem_out[0] ) ,
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1187 ( .A ( copt_net_60 ) ,
|
||||
.X ( copt_net_55 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1188 ( .A ( copt_net_55 ) ,
|
||||
.X ( copt_net_56 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1189 ( .A ( copt_net_60 ) ,
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1189 ( .A ( copt_net_56 ) ,
|
||||
.X ( copt_net_57 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1190 ( .A ( copt_net_57 ) ,
|
||||
.X ( copt_net_58 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1191 ( .A ( copt_net_58 ) ,
|
||||
.X ( copt_net_59 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1192 ( .A ( copt_net_56 ) ,
|
||||
.X ( copt_net_60 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1192 ( .A ( copt_net_61 ) ,
|
||||
.X ( mem_out[0] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1193 ( .A ( copt_net_58 ) ,
|
||||
.X ( copt_net_61 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
endmodule
|
||||
|
||||
|
||||
|
|
@ -156,17 +156,17 @@ sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_3_ ( .D ( mem_out[2] ) ,
|
|||
.CLK ( prog_clk[0] ) , .Q ( mem_out[3] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_1 FTB_1__0 ( .A ( mem_out[3] ) , .X ( ccff_tail[0] ) ,
|
||||
.VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1181 ( .A ( copt_net_51 ) ,
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1181 ( .A ( ccff_head[0] ) ,
|
||||
.X ( copt_net_49 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1182 ( .A ( copt_net_52 ) ,
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1182 ( .A ( copt_net_49 ) ,
|
||||
.X ( copt_net_50 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1183 ( .A ( copt_net_53 ) ,
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1183 ( .A ( copt_net_50 ) ,
|
||||
.X ( copt_net_51 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1184 ( .A ( ccff_head[0] ) ,
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1184 ( .A ( copt_net_51 ) ,
|
||||
.X ( copt_net_52 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1185 ( .A ( copt_net_50 ) ,
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1185 ( .A ( copt_net_52 ) ,
|
||||
.X ( copt_net_53 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1186 ( .A ( copt_net_49 ) ,
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1186 ( .A ( copt_net_53 ) ,
|
||||
.X ( copt_net_54 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
endmodule
|
||||
|
||||
|
|
@ -259,10 +259,14 @@ input prog_clk_0_E_in ;
|
|||
input VDD ;
|
||||
input VSS ;
|
||||
|
||||
wire ropt_net_73 ;
|
||||
wire ropt_net_75 ;
|
||||
wire ropt_net_74 ;
|
||||
wire ropt_net_72 ;
|
||||
wire ropt_net_67 ;
|
||||
wire ropt_net_68 ;
|
||||
wire ropt_net_66 ;
|
||||
wire ropt_net_65 ;
|
||||
wire ropt_net_63 ;
|
||||
wire ropt_net_69 ;
|
||||
wire ropt_net_64 ;
|
||||
wire ropt_net_62 ;
|
||||
wire [0:0] prog_clk ;
|
||||
wire prog_clk_0 ;
|
||||
wire [0:3] mux_tree_tapbuf_size10_0_sram ;
|
||||
|
|
@ -308,12 +312,12 @@ sky130_fd_sc_hd__buf_8 FTB_7__6 ( .A ( chany_bottom_in[4] ) ,
|
|||
.X ( chany_top_out[4] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 FTB_8__7 ( .A ( chany_bottom_in[5] ) ,
|
||||
.X ( chany_top_out[5] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 FTB_9__8 ( .A ( chany_bottom_in[6] ) ,
|
||||
sky130_fd_sc_hd__buf_6 FTB_9__8 ( .A ( chany_bottom_in[6] ) ,
|
||||
.X ( chany_top_out[6] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 FTB_10__9 ( .A ( chany_bottom_in[7] ) ,
|
||||
.X ( ropt_net_73 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
.X ( ropt_net_67 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 FTB_11__10 ( .A ( chany_bottom_in[8] ) ,
|
||||
.X ( ropt_net_75 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
.X ( ropt_net_68 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 FTB_12__11 ( .A ( chany_bottom_in[9] ) ,
|
||||
.X ( chany_top_out[9] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 FTB_13__12 ( .A ( chany_bottom_in[10] ) ,
|
||||
|
|
@ -321,18 +325,18 @@ sky130_fd_sc_hd__buf_8 FTB_13__12 ( .A ( chany_bottom_in[10] ) ,
|
|||
sky130_fd_sc_hd__buf_6 FTB_14__13 ( .A ( chany_bottom_in[11] ) ,
|
||||
.X ( chany_top_out[11] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 FTB_15__14 ( .A ( chany_bottom_in[12] ) ,
|
||||
.X ( chany_top_out[12] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 FTB_16__15 ( .A ( chany_bottom_in[13] ) ,
|
||||
.X ( chany_top_out[13] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 FTB_17__16 ( .A ( chany_bottom_in[14] ) ,
|
||||
.X ( chany_top_out[14] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
.X ( ropt_net_66 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 FTB_16__15 ( .A ( chany_bottom_in[13] ) ,
|
||||
.X ( ropt_net_65 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 FTB_17__16 ( .A ( chany_bottom_in[14] ) ,
|
||||
.X ( ropt_net_63 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 FTB_18__17 ( .A ( chany_bottom_in[15] ) ,
|
||||
.X ( chany_top_out[15] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 FTB_19__18 ( .A ( chany_bottom_in[16] ) ,
|
||||
.X ( chany_top_out[16] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 FTB_20__19 ( .A ( chany_bottom_in[17] ) ,
|
||||
.X ( chany_top_out[17] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 FTB_21__20 ( .A ( chany_bottom_in[18] ) ,
|
||||
sky130_fd_sc_hd__buf_6 FTB_21__20 ( .A ( chany_bottom_in[18] ) ,
|
||||
.X ( chany_top_out[18] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 FTB_22__21 ( .A ( chany_bottom_in[19] ) ,
|
||||
.X ( chany_top_out[19] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
|
|
@ -343,7 +347,7 @@ sky130_fd_sc_hd__buf_6 FTB_24__23 ( .A ( chany_top_in[1] ) ,
|
|||
sky130_fd_sc_hd__buf_8 FTB_25__24 ( .A ( chany_top_in[2] ) ,
|
||||
.X ( chany_bottom_out[2] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 FTB_26__25 ( .A ( chany_top_in[3] ) ,
|
||||
.X ( ropt_net_74 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
.X ( chany_bottom_out[3] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 FTB_27__26 ( .A ( chany_top_in[4] ) ,
|
||||
.X ( chany_bottom_out[4] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 FTB_28__27 ( .A ( chany_top_in[5] ) ,
|
||||
|
|
@ -359,10 +363,10 @@ sky130_fd_sc_hd__buf_6 FTB_32__31 ( .A ( chany_top_in[9] ) ,
|
|||
sky130_fd_sc_hd__buf_8 FTB_33__32 ( .A ( chany_top_in[10] ) ,
|
||||
.X ( chany_bottom_out[10] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 FTB_34__33 ( .A ( chany_top_in[11] ) ,
|
||||
.X ( chany_bottom_out[11] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 FTB_35__34 ( .A ( chany_top_in[12] ) ,
|
||||
.X ( chany_bottom_out[12] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 FTB_36__35 ( .A ( chany_top_in[13] ) ,
|
||||
.X ( ropt_net_69 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 FTB_35__34 ( .A ( chany_top_in[12] ) ,
|
||||
.X ( ropt_net_64 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 FTB_36__35 ( .A ( chany_top_in[13] ) ,
|
||||
.X ( chany_bottom_out[13] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 FTB_37__36 ( .A ( chany_top_in[14] ) ,
|
||||
.X ( chany_bottom_out[14] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
|
|
@ -373,7 +377,7 @@ sky130_fd_sc_hd__buf_8 FTB_39__38 ( .A ( chany_top_in[16] ) ,
|
|||
sky130_fd_sc_hd__buf_6 FTB_40__39 ( .A ( chany_top_in[17] ) ,
|
||||
.X ( chany_bottom_out[17] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 FTB_41__40 ( .A ( chany_top_in[18] ) ,
|
||||
.X ( ropt_net_72 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
.X ( ropt_net_62 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 FTB_42__41 ( .A ( chany_top_in[19] ) ,
|
||||
.X ( chany_bottom_out[19] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 FTB_43__42 (
|
||||
|
|
@ -382,14 +386,22 @@ sky130_fd_sc_hd__buf_6 FTB_43__42 (
|
|||
.VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__conb_1 optlc_49 ( .LO ( SYNOPSYS_UNCONNECTED_5 ) ,
|
||||
.HI ( optlc_net_48 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 ropt_mt_inst_1204 ( .A ( ropt_net_72 ) ,
|
||||
sky130_fd_sc_hd__buf_8 ropt_mt_inst_1194 ( .A ( ropt_net_62 ) ,
|
||||
.X ( chany_bottom_out[18] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 ropt_mt_inst_1205 ( .A ( ropt_net_73 ) ,
|
||||
sky130_fd_sc_hd__buf_8 ropt_mt_inst_1195 ( .A ( ropt_net_63 ) ,
|
||||
.X ( chany_top_out[14] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 ropt_mt_inst_1196 ( .A ( ropt_net_64 ) ,
|
||||
.X ( chany_bottom_out[12] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 ropt_mt_inst_1197 ( .A ( ropt_net_65 ) ,
|
||||
.X ( chany_top_out[13] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 ropt_mt_inst_1198 ( .A ( ropt_net_66 ) ,
|
||||
.X ( chany_top_out[12] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 ropt_mt_inst_1199 ( .A ( ropt_net_67 ) ,
|
||||
.X ( chany_top_out[7] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 ropt_mt_inst_1206 ( .A ( ropt_net_74 ) ,
|
||||
.X ( chany_bottom_out[3] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 ropt_mt_inst_1207 ( .A ( ropt_net_75 ) ,
|
||||
sky130_fd_sc_hd__buf_8 ropt_mt_inst_1200 ( .A ( ropt_net_68 ) ,
|
||||
.X ( chany_top_out[8] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 ropt_mt_inst_1201 ( .A ( ropt_net_69 ) ,
|
||||
.X ( chany_bottom_out[11] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
endmodule
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -11,23 +11,23 @@ input [0:0] ccff_head ;
|
|||
output [0:0] ccff_tail ;
|
||||
output [0:0] mem_out ;
|
||||
|
||||
wire copt_net_55 ;
|
||||
wire copt_net_60 ;
|
||||
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ccff_head[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( copt_net_55 ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 FTB_2__1 ( .A ( copt_net_59 ) , .X ( ccff_tail[0] ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1187 ( .A ( copt_net_55 ) ,
|
||||
.X ( mem_out[0] ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1188 ( .A ( mem_out[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( copt_net_60 ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 FTB_2__1 ( .A ( mem_out[0] ) , .X ( ccff_tail[0] ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1187 ( .A ( copt_net_60 ) ,
|
||||
.X ( copt_net_55 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1188 ( .A ( copt_net_55 ) ,
|
||||
.X ( copt_net_56 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1189 ( .A ( copt_net_60 ) ,
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1189 ( .A ( copt_net_56 ) ,
|
||||
.X ( copt_net_57 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1190 ( .A ( copt_net_57 ) ,
|
||||
.X ( copt_net_58 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1191 ( .A ( copt_net_58 ) ,
|
||||
.X ( copt_net_59 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1192 ( .A ( copt_net_56 ) ,
|
||||
.X ( copt_net_60 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1192 ( .A ( copt_net_61 ) ,
|
||||
.X ( mem_out[0] ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1193 ( .A ( copt_net_58 ) ,
|
||||
.X ( copt_net_61 ) ) ;
|
||||
endmodule
|
||||
|
||||
|
||||
|
|
@ -123,17 +123,17 @@ sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_2_ ( .D ( mem_out[1] ) ,
|
|||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_3_ ( .D ( mem_out[2] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[3] ) ) ;
|
||||
sky130_fd_sc_hd__buf_1 FTB_1__0 ( .A ( mem_out[3] ) , .X ( ccff_tail[0] ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1181 ( .A ( copt_net_51 ) ,
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1181 ( .A ( ccff_head[0] ) ,
|
||||
.X ( copt_net_49 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1182 ( .A ( copt_net_52 ) ,
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1182 ( .A ( copt_net_49 ) ,
|
||||
.X ( copt_net_50 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1183 ( .A ( copt_net_53 ) ,
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1183 ( .A ( copt_net_50 ) ,
|
||||
.X ( copt_net_51 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1184 ( .A ( ccff_head[0] ) ,
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1184 ( .A ( copt_net_51 ) ,
|
||||
.X ( copt_net_52 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1185 ( .A ( copt_net_50 ) ,
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1185 ( .A ( copt_net_52 ) ,
|
||||
.X ( copt_net_53 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1186 ( .A ( copt_net_49 ) ,
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1186 ( .A ( copt_net_53 ) ,
|
||||
.X ( copt_net_54 ) ) ;
|
||||
endmodule
|
||||
|
||||
|
|
@ -213,10 +213,14 @@ output [0:0] right_width_0_height_0__pin_1_upper ;
|
|||
output [0:0] right_width_0_height_0__pin_1_lower ;
|
||||
input prog_clk_0_E_in ;
|
||||
|
||||
wire ropt_net_73 ;
|
||||
wire ropt_net_75 ;
|
||||
wire ropt_net_74 ;
|
||||
wire ropt_net_72 ;
|
||||
wire ropt_net_67 ;
|
||||
wire ropt_net_68 ;
|
||||
wire ropt_net_66 ;
|
||||
wire ropt_net_65 ;
|
||||
wire ropt_net_63 ;
|
||||
wire ropt_net_69 ;
|
||||
wire ropt_net_64 ;
|
||||
wire ropt_net_62 ;
|
||||
wire [0:0] prog_clk ;
|
||||
wire prog_clk_0 ;
|
||||
wire [0:3] mux_tree_tapbuf_size10_0_sram ;
|
||||
|
|
@ -259,12 +263,12 @@ sky130_fd_sc_hd__buf_8 FTB_7__6 ( .A ( chany_bottom_in[4] ) ,
|
|||
.X ( chany_top_out[4] ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 FTB_8__7 ( .A ( chany_bottom_in[5] ) ,
|
||||
.X ( chany_top_out[5] ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 FTB_9__8 ( .A ( chany_bottom_in[6] ) ,
|
||||
sky130_fd_sc_hd__buf_6 FTB_9__8 ( .A ( chany_bottom_in[6] ) ,
|
||||
.X ( chany_top_out[6] ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 FTB_10__9 ( .A ( chany_bottom_in[7] ) ,
|
||||
.X ( ropt_net_73 ) ) ;
|
||||
.X ( ropt_net_67 ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 FTB_11__10 ( .A ( chany_bottom_in[8] ) ,
|
||||
.X ( ropt_net_75 ) ) ;
|
||||
.X ( ropt_net_68 ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 FTB_12__11 ( .A ( chany_bottom_in[9] ) ,
|
||||
.X ( chany_top_out[9] ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 FTB_13__12 ( .A ( chany_bottom_in[10] ) ,
|
||||
|
|
@ -272,18 +276,18 @@ sky130_fd_sc_hd__buf_8 FTB_13__12 ( .A ( chany_bottom_in[10] ) ,
|
|||
sky130_fd_sc_hd__buf_6 FTB_14__13 ( .A ( chany_bottom_in[11] ) ,
|
||||
.X ( chany_top_out[11] ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 FTB_15__14 ( .A ( chany_bottom_in[12] ) ,
|
||||
.X ( chany_top_out[12] ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 FTB_16__15 ( .A ( chany_bottom_in[13] ) ,
|
||||
.X ( chany_top_out[13] ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 FTB_17__16 ( .A ( chany_bottom_in[14] ) ,
|
||||
.X ( chany_top_out[14] ) ) ;
|
||||
.X ( ropt_net_66 ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 FTB_16__15 ( .A ( chany_bottom_in[13] ) ,
|
||||
.X ( ropt_net_65 ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 FTB_17__16 ( .A ( chany_bottom_in[14] ) ,
|
||||
.X ( ropt_net_63 ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 FTB_18__17 ( .A ( chany_bottom_in[15] ) ,
|
||||
.X ( chany_top_out[15] ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 FTB_19__18 ( .A ( chany_bottom_in[16] ) ,
|
||||
.X ( chany_top_out[16] ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 FTB_20__19 ( .A ( chany_bottom_in[17] ) ,
|
||||
.X ( chany_top_out[17] ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 FTB_21__20 ( .A ( chany_bottom_in[18] ) ,
|
||||
sky130_fd_sc_hd__buf_6 FTB_21__20 ( .A ( chany_bottom_in[18] ) ,
|
||||
.X ( chany_top_out[18] ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 FTB_22__21 ( .A ( chany_bottom_in[19] ) ,
|
||||
.X ( chany_top_out[19] ) ) ;
|
||||
|
|
@ -294,7 +298,7 @@ sky130_fd_sc_hd__buf_6 FTB_24__23 ( .A ( chany_top_in[1] ) ,
|
|||
sky130_fd_sc_hd__buf_8 FTB_25__24 ( .A ( chany_top_in[2] ) ,
|
||||
.X ( chany_bottom_out[2] ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 FTB_26__25 ( .A ( chany_top_in[3] ) ,
|
||||
.X ( ropt_net_74 ) ) ;
|
||||
.X ( chany_bottom_out[3] ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 FTB_27__26 ( .A ( chany_top_in[4] ) ,
|
||||
.X ( chany_bottom_out[4] ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 FTB_28__27 ( .A ( chany_top_in[5] ) ,
|
||||
|
|
@ -310,10 +314,10 @@ sky130_fd_sc_hd__buf_6 FTB_32__31 ( .A ( chany_top_in[9] ) ,
|
|||
sky130_fd_sc_hd__buf_8 FTB_33__32 ( .A ( chany_top_in[10] ) ,
|
||||
.X ( chany_bottom_out[10] ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 FTB_34__33 ( .A ( chany_top_in[11] ) ,
|
||||
.X ( chany_bottom_out[11] ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 FTB_35__34 ( .A ( chany_top_in[12] ) ,
|
||||
.X ( chany_bottom_out[12] ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 FTB_36__35 ( .A ( chany_top_in[13] ) ,
|
||||
.X ( ropt_net_69 ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 FTB_35__34 ( .A ( chany_top_in[12] ) ,
|
||||
.X ( ropt_net_64 ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 FTB_36__35 ( .A ( chany_top_in[13] ) ,
|
||||
.X ( chany_bottom_out[13] ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 FTB_37__36 ( .A ( chany_top_in[14] ) ,
|
||||
.X ( chany_bottom_out[14] ) ) ;
|
||||
|
|
@ -324,7 +328,7 @@ sky130_fd_sc_hd__buf_8 FTB_39__38 ( .A ( chany_top_in[16] ) ,
|
|||
sky130_fd_sc_hd__buf_6 FTB_40__39 ( .A ( chany_top_in[17] ) ,
|
||||
.X ( chany_bottom_out[17] ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 FTB_41__40 ( .A ( chany_top_in[18] ) ,
|
||||
.X ( ropt_net_72 ) ) ;
|
||||
.X ( ropt_net_62 ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 FTB_42__41 ( .A ( chany_top_in[19] ) ,
|
||||
.X ( chany_bottom_out[19] ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 FTB_43__42 (
|
||||
|
|
@ -332,14 +336,22 @@ sky130_fd_sc_hd__buf_6 FTB_43__42 (
|
|||
.X ( right_width_0_height_0__pin_1_upper[0] ) ) ;
|
||||
sky130_fd_sc_hd__conb_1 optlc_49 ( .LO ( SYNOPSYS_UNCONNECTED_5 ) ,
|
||||
.HI ( optlc_net_48 ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 ropt_mt_inst_1204 ( .A ( ropt_net_72 ) ,
|
||||
sky130_fd_sc_hd__buf_8 ropt_mt_inst_1194 ( .A ( ropt_net_62 ) ,
|
||||
.X ( chany_bottom_out[18] ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 ropt_mt_inst_1205 ( .A ( ropt_net_73 ) ,
|
||||
sky130_fd_sc_hd__buf_8 ropt_mt_inst_1195 ( .A ( ropt_net_63 ) ,
|
||||
.X ( chany_top_out[14] ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 ropt_mt_inst_1196 ( .A ( ropt_net_64 ) ,
|
||||
.X ( chany_bottom_out[12] ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 ropt_mt_inst_1197 ( .A ( ropt_net_65 ) ,
|
||||
.X ( chany_top_out[13] ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 ropt_mt_inst_1198 ( .A ( ropt_net_66 ) ,
|
||||
.X ( chany_top_out[12] ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 ropt_mt_inst_1199 ( .A ( ropt_net_67 ) ,
|
||||
.X ( chany_top_out[7] ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 ropt_mt_inst_1206 ( .A ( ropt_net_74 ) ,
|
||||
.X ( chany_bottom_out[3] ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 ropt_mt_inst_1207 ( .A ( ropt_net_75 ) ,
|
||||
sky130_fd_sc_hd__buf_8 ropt_mt_inst_1200 ( .A ( ropt_net_68 ) ,
|
||||
.X ( chany_top_out[8] ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 ropt_mt_inst_1201 ( .A ( ropt_net_69 ) ,
|
||||
.X ( chany_bottom_out[11] ) ) ;
|
||||
endmodule
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -26,10 +26,14 @@ output [0:0] right_width_0_height_0__pin_1_upper ;
|
|||
output [0:0] right_width_0_height_0__pin_1_lower ;
|
||||
input prog_clk_0_E_in ;
|
||||
|
||||
wire ropt_net_73 ;
|
||||
wire ropt_net_75 ;
|
||||
wire ropt_net_74 ;
|
||||
wire ropt_net_72 ;
|
||||
wire ropt_net_67 ;
|
||||
wire ropt_net_68 ;
|
||||
wire ropt_net_66 ;
|
||||
wire ropt_net_65 ;
|
||||
wire ropt_net_63 ;
|
||||
wire ropt_net_69 ;
|
||||
wire ropt_net_64 ;
|
||||
wire ropt_net_62 ;
|
||||
wire [0:0] prog_clk ;
|
||||
wire prog_clk_0 ;
|
||||
wire [0:3] mux_tree_tapbuf_size10_0_sram ;
|
||||
|
|
@ -72,12 +76,12 @@ sky130_fd_sc_hd__buf_8 FTB_7__6 ( .A ( chany_bottom_in[4] ) ,
|
|||
.X ( chany_top_out[4] ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 FTB_8__7 ( .A ( chany_bottom_in[5] ) ,
|
||||
.X ( chany_top_out[5] ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 FTB_9__8 ( .A ( chany_bottom_in[6] ) ,
|
||||
sky130_fd_sc_hd__buf_6 FTB_9__8 ( .A ( chany_bottom_in[6] ) ,
|
||||
.X ( chany_top_out[6] ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 FTB_10__9 ( .A ( chany_bottom_in[7] ) ,
|
||||
.X ( ropt_net_73 ) ) ;
|
||||
.X ( ropt_net_67 ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 FTB_11__10 ( .A ( chany_bottom_in[8] ) ,
|
||||
.X ( ropt_net_75 ) ) ;
|
||||
.X ( ropt_net_68 ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 FTB_12__11 ( .A ( chany_bottom_in[9] ) ,
|
||||
.X ( chany_top_out[9] ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 FTB_13__12 ( .A ( chany_bottom_in[10] ) ,
|
||||
|
|
@ -85,18 +89,18 @@ sky130_fd_sc_hd__buf_8 FTB_13__12 ( .A ( chany_bottom_in[10] ) ,
|
|||
sky130_fd_sc_hd__buf_6 FTB_14__13 ( .A ( chany_bottom_in[11] ) ,
|
||||
.X ( chany_top_out[11] ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 FTB_15__14 ( .A ( chany_bottom_in[12] ) ,
|
||||
.X ( chany_top_out[12] ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 FTB_16__15 ( .A ( chany_bottom_in[13] ) ,
|
||||
.X ( chany_top_out[13] ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 FTB_17__16 ( .A ( chany_bottom_in[14] ) ,
|
||||
.X ( chany_top_out[14] ) ) ;
|
||||
.X ( ropt_net_66 ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 FTB_16__15 ( .A ( chany_bottom_in[13] ) ,
|
||||
.X ( ropt_net_65 ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 FTB_17__16 ( .A ( chany_bottom_in[14] ) ,
|
||||
.X ( ropt_net_63 ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 FTB_18__17 ( .A ( chany_bottom_in[15] ) ,
|
||||
.X ( chany_top_out[15] ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 FTB_19__18 ( .A ( chany_bottom_in[16] ) ,
|
||||
.X ( chany_top_out[16] ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 FTB_20__19 ( .A ( chany_bottom_in[17] ) ,
|
||||
.X ( chany_top_out[17] ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 FTB_21__20 ( .A ( chany_bottom_in[18] ) ,
|
||||
sky130_fd_sc_hd__buf_6 FTB_21__20 ( .A ( chany_bottom_in[18] ) ,
|
||||
.X ( chany_top_out[18] ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 FTB_22__21 ( .A ( chany_bottom_in[19] ) ,
|
||||
.X ( chany_top_out[19] ) ) ;
|
||||
|
|
@ -107,7 +111,7 @@ sky130_fd_sc_hd__buf_6 FTB_24__23 ( .A ( chany_top_in[1] ) ,
|
|||
sky130_fd_sc_hd__buf_8 FTB_25__24 ( .A ( chany_top_in[2] ) ,
|
||||
.X ( chany_bottom_out[2] ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 FTB_26__25 ( .A ( chany_top_in[3] ) ,
|
||||
.X ( ropt_net_74 ) ) ;
|
||||
.X ( chany_bottom_out[3] ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 FTB_27__26 ( .A ( chany_top_in[4] ) ,
|
||||
.X ( chany_bottom_out[4] ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 FTB_28__27 ( .A ( chany_top_in[5] ) ,
|
||||
|
|
@ -123,10 +127,10 @@ sky130_fd_sc_hd__buf_6 FTB_32__31 ( .A ( chany_top_in[9] ) ,
|
|||
sky130_fd_sc_hd__buf_8 FTB_33__32 ( .A ( chany_top_in[10] ) ,
|
||||
.X ( chany_bottom_out[10] ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 FTB_34__33 ( .A ( chany_top_in[11] ) ,
|
||||
.X ( chany_bottom_out[11] ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 FTB_35__34 ( .A ( chany_top_in[12] ) ,
|
||||
.X ( chany_bottom_out[12] ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 FTB_36__35 ( .A ( chany_top_in[13] ) ,
|
||||
.X ( ropt_net_69 ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 FTB_35__34 ( .A ( chany_top_in[12] ) ,
|
||||
.X ( ropt_net_64 ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 FTB_36__35 ( .A ( chany_top_in[13] ) ,
|
||||
.X ( chany_bottom_out[13] ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 FTB_37__36 ( .A ( chany_top_in[14] ) ,
|
||||
.X ( chany_bottom_out[14] ) ) ;
|
||||
|
|
@ -137,7 +141,7 @@ sky130_fd_sc_hd__buf_8 FTB_39__38 ( .A ( chany_top_in[16] ) ,
|
|||
sky130_fd_sc_hd__buf_6 FTB_40__39 ( .A ( chany_top_in[17] ) ,
|
||||
.X ( chany_bottom_out[17] ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 FTB_41__40 ( .A ( chany_top_in[18] ) ,
|
||||
.X ( ropt_net_72 ) ) ;
|
||||
.X ( ropt_net_62 ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 FTB_42__41 ( .A ( chany_top_in[19] ) ,
|
||||
.X ( chany_bottom_out[19] ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 FTB_43__42 (
|
||||
|
|
@ -145,14 +149,22 @@ sky130_fd_sc_hd__buf_6 FTB_43__42 (
|
|||
.X ( right_width_0_height_0__pin_1_upper[0] ) ) ;
|
||||
sky130_fd_sc_hd__conb_1 optlc_49 ( .LO ( SYNOPSYS_UNCONNECTED_5 ) ,
|
||||
.HI ( optlc_net_48 ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 ropt_mt_inst_1204 ( .A ( ropt_net_72 ) ,
|
||||
sky130_fd_sc_hd__buf_8 ropt_mt_inst_1194 ( .A ( ropt_net_62 ) ,
|
||||
.X ( chany_bottom_out[18] ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 ropt_mt_inst_1205 ( .A ( ropt_net_73 ) ,
|
||||
sky130_fd_sc_hd__buf_8 ropt_mt_inst_1195 ( .A ( ropt_net_63 ) ,
|
||||
.X ( chany_top_out[14] ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 ropt_mt_inst_1196 ( .A ( ropt_net_64 ) ,
|
||||
.X ( chany_bottom_out[12] ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 ropt_mt_inst_1197 ( .A ( ropt_net_65 ) ,
|
||||
.X ( chany_top_out[13] ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 ropt_mt_inst_1198 ( .A ( ropt_net_66 ) ,
|
||||
.X ( chany_top_out[12] ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 ropt_mt_inst_1199 ( .A ( ropt_net_67 ) ,
|
||||
.X ( chany_top_out[7] ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 ropt_mt_inst_1206 ( .A ( ropt_net_74 ) ,
|
||||
.X ( chany_bottom_out[3] ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 ropt_mt_inst_1207 ( .A ( ropt_net_75 ) ,
|
||||
sky130_fd_sc_hd__buf_8 ropt_mt_inst_1200 ( .A ( ropt_net_68 ) ,
|
||||
.X ( chany_top_out[8] ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 ropt_mt_inst_1201 ( .A ( ropt_net_69 ) ,
|
||||
.X ( chany_bottom_out[11] ) ) ;
|
||||
endmodule
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -11,13 +11,13 @@ input [0:0] ccff_head ;
|
|||
output [0:0] ccff_tail ;
|
||||
output [0:3] mem_out ;
|
||||
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ccff_head[0] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ccff_head[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[0] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_1_ ( .D ( mem_out[0] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_1_ ( .D ( mem_out[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[1] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_2_ ( .D ( mem_out[1] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[2] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_3_ ( .D ( mem_out[2] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_3_ ( .D ( mem_out[2] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[3] ) ) ;
|
||||
sky130_fd_sc_hd__buf_1 FTB_16__15 ( .A ( mem_out[3] ) , .X ( ccff_tail[0] ) ) ;
|
||||
endmodule
|
||||
|
|
@ -34,9 +34,9 @@ sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ccff_head[0] ) ,
|
|||
.CLK ( prog_clk[0] ) , .Q ( mem_out[0] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_1_ ( .D ( mem_out[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[1] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_2_ ( .D ( mem_out[1] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_2_ ( .D ( mem_out[1] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[2] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_3_ ( .D ( mem_out[2] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_3_ ( .D ( mem_out[2] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[3] ) ) ;
|
||||
sky130_fd_sc_hd__buf_1 FTB_15__14 ( .A ( mem_out[3] ) , .X ( ccff_tail[0] ) ) ;
|
||||
endmodule
|
||||
|
|
@ -68,13 +68,13 @@ input [0:0] ccff_head ;
|
|||
output [0:0] ccff_tail ;
|
||||
output [0:3] mem_out ;
|
||||
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ccff_head[0] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ccff_head[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[0] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_1_ ( .D ( mem_out[0] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_1_ ( .D ( mem_out[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[1] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_2_ ( .D ( mem_out[1] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[2] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_3_ ( .D ( mem_out[2] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_3_ ( .D ( mem_out[2] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[3] ) ) ;
|
||||
sky130_fd_sc_hd__buf_1 FTB_13__12 ( .A ( mem_out[3] ) , .X ( ccff_tail[0] ) ) ;
|
||||
endmodule
|
||||
|
|
@ -87,11 +87,11 @@ input [0:0] ccff_head ;
|
|||
output [0:0] ccff_tail ;
|
||||
output [0:3] mem_out ;
|
||||
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ccff_head[0] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ccff_head[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[0] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_1_ ( .D ( mem_out[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[1] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_2 sky130_fd_sc_hd__dfxtp_1_2_ ( .D ( mem_out[1] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_2_ ( .D ( mem_out[1] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[2] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_3_ ( .D ( mem_out[2] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[3] ) ) ;
|
||||
|
|
@ -106,7 +106,7 @@ input [0:0] ccff_head ;
|
|||
output [0:0] ccff_tail ;
|
||||
output [0:3] mem_out ;
|
||||
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ccff_head[0] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ccff_head[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[0] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_1_ ( .D ( mem_out[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[1] ) ) ;
|
||||
|
|
@ -125,7 +125,7 @@ input [0:0] ccff_head ;
|
|||
output [0:0] ccff_tail ;
|
||||
output [0:3] mem_out ;
|
||||
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ccff_head[0] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ccff_head[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[0] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_1_ ( .D ( mem_out[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[1] ) ) ;
|
||||
|
|
@ -148,7 +148,7 @@ sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ccff_head[0] ) ,
|
|||
.CLK ( prog_clk[0] ) , .Q ( mem_out[0] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_1_ ( .D ( mem_out[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[1] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_2_ ( .D ( mem_out[1] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_2_ ( .D ( mem_out[1] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[2] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_3_ ( .D ( mem_out[2] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[3] ) ) ;
|
||||
|
|
@ -183,6 +183,8 @@ wire [0:0] sky130_fd_sc_hd__mux2_1_7_X ;
|
|||
|
||||
cby_1__1__const1 const1_0_ (
|
||||
.const1 ( { SYNOPSYS_UNCONNECTED_1 } ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 sky130_fd_sc_hd__buf_4_0_ (
|
||||
.A ( sky130_fd_sc_hd__mux2_1_7_X[0] ) , .X ( out[0] ) ) ;
|
||||
sky130_fd_sc_hd__mux2_1 mux_l1_in_0_ ( .A0 ( in[1] ) , .A1 ( in[0] ) ,
|
||||
.S ( sram[0] ) , .X ( sky130_fd_sc_hd__mux2_1_0_X[0] ) ) ;
|
||||
sky130_fd_sc_hd__mux2_1 mux_l2_in_0_ ( .A0 ( in[2] ) ,
|
||||
|
|
@ -206,8 +208,6 @@ sky130_fd_sc_hd__mux2_1 mux_l4_in_0_ (
|
|||
.A0 ( sky130_fd_sc_hd__mux2_1_6_X[0] ) ,
|
||||
.A1 ( sky130_fd_sc_hd__mux2_1_5_X[0] ) , .S ( sram[3] ) ,
|
||||
.X ( sky130_fd_sc_hd__mux2_1_7_X[0] ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 BUFT_RR_64 ( .A ( sky130_fd_sc_hd__mux2_1_7_X[0] ) ,
|
||||
.X ( out[0] ) ) ;
|
||||
endmodule
|
||||
|
||||
|
||||
|
|
@ -238,8 +238,6 @@ wire [0:0] sky130_fd_sc_hd__mux2_1_7_X ;
|
|||
|
||||
cby_1__1__const1_14 const1_0_ (
|
||||
.const1 ( { SYNOPSYS_UNCONNECTED_1 } ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 sky130_fd_sc_hd__buf_4_0_ (
|
||||
.A ( sky130_fd_sc_hd__mux2_1_7_X[0] ) , .X ( out[0] ) ) ;
|
||||
sky130_fd_sc_hd__mux2_1 mux_l1_in_0_ ( .A0 ( in[1] ) , .A1 ( in[0] ) ,
|
||||
.S ( sram[0] ) , .X ( sky130_fd_sc_hd__mux2_1_0_X[0] ) ) ;
|
||||
sky130_fd_sc_hd__mux2_1 mux_l2_in_0_ ( .A0 ( in[2] ) ,
|
||||
|
|
@ -263,6 +261,8 @@ sky130_fd_sc_hd__mux2_1 mux_l4_in_0_ (
|
|||
.A0 ( sky130_fd_sc_hd__mux2_1_6_X[0] ) ,
|
||||
.A1 ( sky130_fd_sc_hd__mux2_1_5_X[0] ) , .S ( sram[3] ) ,
|
||||
.X ( sky130_fd_sc_hd__mux2_1_7_X[0] ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 BUFT_RR_65 ( .A ( sky130_fd_sc_hd__mux2_1_7_X[0] ) ,
|
||||
.X ( out[0] ) ) ;
|
||||
endmodule
|
||||
|
||||
|
||||
|
|
@ -371,8 +371,9 @@ sky130_fd_sc_hd__mux2_1 mux_l4_in_0_ (
|
|||
.A0 ( sky130_fd_sc_hd__mux2_1_6_X[0] ) ,
|
||||
.A1 ( sky130_fd_sc_hd__mux2_1_5_X[0] ) , .S ( sram[3] ) ,
|
||||
.X ( sky130_fd_sc_hd__mux2_1_7_X[0] ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 BUFT_RR_63 ( .A ( sky130_fd_sc_hd__mux2_1_7_X[0] ) ,
|
||||
.X ( out[0] ) ) ;
|
||||
sky130_fd_sc_hd__inv_6 BINV_R_73 ( .A ( BUF_net_74 ) , .Y ( out[0] ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 BINV_R_74 ( .A ( sky130_fd_sc_hd__mux2_1_7_X[0] ) ,
|
||||
.Y ( BUF_net_74 ) ) ;
|
||||
endmodule
|
||||
|
||||
|
||||
|
|
@ -403,8 +404,6 @@ wire [0:0] sky130_fd_sc_hd__mux2_1_7_X ;
|
|||
|
||||
cby_1__1__const1_11 const1_0_ (
|
||||
.const1 ( { SYNOPSYS_UNCONNECTED_1 } ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 sky130_fd_sc_hd__buf_4_0_ (
|
||||
.A ( sky130_fd_sc_hd__mux2_1_7_X[0] ) , .X ( out[0] ) ) ;
|
||||
sky130_fd_sc_hd__mux2_1 mux_l1_in_0_ ( .A0 ( in[1] ) , .A1 ( in[0] ) ,
|
||||
.S ( sram[0] ) , .X ( sky130_fd_sc_hd__mux2_1_0_X[0] ) ) ;
|
||||
sky130_fd_sc_hd__mux2_1 mux_l2_in_0_ ( .A0 ( in[2] ) ,
|
||||
|
|
@ -428,6 +427,8 @@ sky130_fd_sc_hd__mux2_1 mux_l4_in_0_ (
|
|||
.A0 ( sky130_fd_sc_hd__mux2_1_6_X[0] ) ,
|
||||
.A1 ( sky130_fd_sc_hd__mux2_1_5_X[0] ) , .S ( sram[3] ) ,
|
||||
.X ( sky130_fd_sc_hd__mux2_1_7_X[0] ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 BUFT_RR_62 ( .A ( sky130_fd_sc_hd__mux2_1_7_X[0] ) ,
|
||||
.X ( out[0] ) ) ;
|
||||
endmodule
|
||||
|
||||
|
||||
|
|
@ -568,8 +569,6 @@ wire [0:0] sky130_fd_sc_hd__mux2_1_7_X ;
|
|||
|
||||
cby_1__1__const1_8 const1_0_ (
|
||||
.const1 ( { SYNOPSYS_UNCONNECTED_1 } ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 sky130_fd_sc_hd__buf_4_0_ (
|
||||
.A ( sky130_fd_sc_hd__mux2_1_7_X[0] ) , .X ( out[0] ) ) ;
|
||||
sky130_fd_sc_hd__mux2_1 mux_l1_in_0_ ( .A0 ( in[1] ) , .A1 ( in[0] ) ,
|
||||
.S ( sram[0] ) , .X ( sky130_fd_sc_hd__mux2_1_0_X[0] ) ) ;
|
||||
sky130_fd_sc_hd__mux2_1 mux_l2_in_0_ ( .A0 ( in[2] ) ,
|
||||
|
|
@ -593,6 +592,8 @@ sky130_fd_sc_hd__mux2_1 mux_l4_in_0_ (
|
|||
.A0 ( sky130_fd_sc_hd__mux2_1_6_X[0] ) ,
|
||||
.A1 ( sky130_fd_sc_hd__mux2_1_5_X[0] ) , .S ( sram[3] ) ,
|
||||
.X ( sky130_fd_sc_hd__mux2_1_7_X[0] ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 BUFT_RR_61 ( .A ( sky130_fd_sc_hd__mux2_1_7_X[0] ) ,
|
||||
.X ( out[0] ) ) ;
|
||||
endmodule
|
||||
|
||||
|
||||
|
|
@ -603,15 +604,29 @@ input [0:0] ccff_head ;
|
|||
output [0:0] ccff_tail ;
|
||||
output [0:3] mem_out ;
|
||||
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ccff_head[0] ) ,
|
||||
wire copt_net_84 ;
|
||||
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ccff_head[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[0] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_1_ ( .D ( mem_out[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[1] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_2_ ( .D ( mem_out[1] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[2] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_3_ ( .D ( mem_out[2] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[3] ) ) ;
|
||||
sky130_fd_sc_hd__buf_1 FTB_8__7 ( .A ( mem_out[3] ) , .X ( ccff_tail[0] ) ) ;
|
||||
.CLK ( prog_clk[0] ) , .Q ( copt_net_84 ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 FTB_8__7 ( .A ( mem_out[3] ) , .X ( ccff_tail[0] ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1315 ( .A ( copt_net_84 ) ,
|
||||
.X ( copt_net_79 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1316 ( .A ( copt_net_79 ) ,
|
||||
.X ( copt_net_80 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1317 ( .A ( copt_net_80 ) ,
|
||||
.X ( copt_net_81 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1318 ( .A ( copt_net_81 ) ,
|
||||
.X ( copt_net_82 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1319 ( .A ( copt_net_82 ) ,
|
||||
.X ( copt_net_83 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1321 ( .A ( copt_net_83 ) ,
|
||||
.X ( mem_out[3] ) ) ;
|
||||
endmodule
|
||||
|
||||
|
||||
|
|
@ -622,7 +637,7 @@ input [0:0] ccff_head ;
|
|||
output [0:0] ccff_tail ;
|
||||
output [0:3] mem_out ;
|
||||
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ccff_head[0] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ccff_head[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[0] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_1_ ( .D ( mem_out[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[1] ) ) ;
|
||||
|
|
@ -643,7 +658,7 @@ output [0:3] mem_out ;
|
|||
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ccff_head[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[0] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_1_ ( .D ( mem_out[0] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_1_ ( .D ( mem_out[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[1] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_2_ ( .D ( mem_out[1] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[2] ) ) ;
|
||||
|
|
@ -660,13 +675,13 @@ input [0:0] ccff_head ;
|
|||
output [0:0] ccff_tail ;
|
||||
output [0:3] mem_out ;
|
||||
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ccff_head[0] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ccff_head[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[0] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_1_ ( .D ( mem_out[0] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_1_ ( .D ( mem_out[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[1] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_2_ ( .D ( mem_out[1] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_2_ ( .D ( mem_out[1] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[2] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_3_ ( .D ( mem_out[2] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_3_ ( .D ( mem_out[2] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[3] ) ) ;
|
||||
sky130_fd_sc_hd__buf_1 FTB_5__4 ( .A ( mem_out[3] ) , .X ( ccff_tail[0] ) ) ;
|
||||
endmodule
|
||||
|
|
@ -679,13 +694,13 @@ input [0:0] ccff_head ;
|
|||
output [0:0] ccff_tail ;
|
||||
output [0:3] mem_out ;
|
||||
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ccff_head[0] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ccff_head[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[0] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_1_ ( .D ( mem_out[0] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_1_ ( .D ( mem_out[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[1] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_2_ ( .D ( mem_out[1] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_2_ ( .D ( mem_out[1] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[2] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_3_ ( .D ( mem_out[2] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_3_ ( .D ( mem_out[2] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[3] ) ) ;
|
||||
sky130_fd_sc_hd__buf_1 FTB_4__3 ( .A ( mem_out[3] ) , .X ( ccff_tail[0] ) ) ;
|
||||
endmodule
|
||||
|
|
@ -698,11 +713,11 @@ input [0:0] ccff_head ;
|
|||
output [0:0] ccff_tail ;
|
||||
output [0:3] mem_out ;
|
||||
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ccff_head[0] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ccff_head[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[0] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_1_ ( .D ( mem_out[0] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_1_ ( .D ( mem_out[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[1] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_2_ ( .D ( mem_out[1] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_2_ ( .D ( mem_out[1] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[2] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_3_ ( .D ( mem_out[2] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[3] ) ) ;
|
||||
|
|
@ -717,13 +732,13 @@ input [0:0] ccff_head ;
|
|||
output [0:0] ccff_tail ;
|
||||
output [0:3] mem_out ;
|
||||
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ccff_head[0] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ccff_head[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[0] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_1_ ( .D ( mem_out[0] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_1_ ( .D ( mem_out[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[1] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_2_ ( .D ( mem_out[1] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[2] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_3_ ( .D ( mem_out[2] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_3_ ( .D ( mem_out[2] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[3] ) ) ;
|
||||
sky130_fd_sc_hd__buf_1 FTB_2__1 ( .A ( mem_out[3] ) , .X ( ccff_tail[0] ) ) ;
|
||||
endmodule
|
||||
|
|
@ -736,35 +751,25 @@ input [0:0] ccff_head ;
|
|||
output [0:0] ccff_tail ;
|
||||
output [0:3] mem_out ;
|
||||
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ropt_net_100 ) ,
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ropt_net_91 ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[0] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_1_ ( .D ( mem_out[0] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_1_ ( .D ( mem_out[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[1] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_2_ ( .D ( mem_out[1] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[2] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_3_ ( .D ( mem_out[2] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_3_ ( .D ( mem_out[2] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[3] ) ) ;
|
||||
sky130_fd_sc_hd__buf_1 FTB_1__0 ( .A ( mem_out[3] ) , .X ( ccff_tail[0] ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1305 ( .A ( ccff_head[0] ) ,
|
||||
.X ( copt_net_81 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1306 ( .A ( copt_net_81 ) ,
|
||||
.X ( copt_net_82 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1314 ( .A ( copt_net_82 ) ,
|
||||
.X ( copt_net_83 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1315 ( .A ( copt_net_83 ) ,
|
||||
.X ( copt_net_84 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1323 ( .A ( copt_net_84 ) ,
|
||||
.X ( copt_net_85 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd2_1 copt_h_inst_1324 ( .A ( copt_net_85 ) ,
|
||||
.X ( copt_net_86 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 ropt_h_inst_1334 ( .A ( ropt_net_97 ) ,
|
||||
.X ( ropt_net_96 ) ) ;
|
||||
sky130_fd_sc_hd__buf_1 ropt_h_inst_1335 ( .A ( ropt_net_98 ) ,
|
||||
.X ( ropt_net_97 ) ) ;
|
||||
sky130_fd_sc_hd__buf_1 ropt_h_inst_1336 ( .A ( copt_net_86 ) ,
|
||||
.X ( ropt_net_98 ) ) ;
|
||||
sky130_fd_sc_hd__buf_2 ropt_h_inst_1339 ( .A ( ropt_net_96 ) ,
|
||||
.X ( ropt_net_100 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 ropt_h_inst_1359 ( .A ( ccff_head[0] ) ,
|
||||
.X ( ropt_net_88 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 ropt_h_inst_1360 ( .A ( ropt_net_92 ) ,
|
||||
.X ( ropt_net_89 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 ropt_h_inst_1361 ( .A ( ropt_net_88 ) ,
|
||||
.X ( ropt_net_90 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd2_1 ropt_h_inst_1362 ( .A ( ropt_net_89 ) ,
|
||||
.X ( ropt_net_91 ) ) ;
|
||||
sky130_fd_sc_hd__buf_1 ropt_h_inst_1363 ( .A ( ropt_net_90 ) ,
|
||||
.X ( ropt_net_92 ) ) ;
|
||||
endmodule
|
||||
|
||||
|
||||
|
|
@ -797,6 +802,8 @@ wire [0:0] sky130_fd_sc_hd__mux2_1_9_X ;
|
|||
|
||||
cby_1__1__const1_7 const1_0_ (
|
||||
.const1 ( { SYNOPSYS_UNCONNECTED_1 } ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 sky130_fd_sc_hd__buf_4_0_ (
|
||||
.A ( sky130_fd_sc_hd__mux2_1_9_X[0] ) , .X ( out[0] ) ) ;
|
||||
sky130_fd_sc_hd__mux2_1 mux_l1_in_0_ ( .A0 ( in[1] ) , .A1 ( in[0] ) ,
|
||||
.S ( sram[0] ) , .X ( sky130_fd_sc_hd__mux2_1_0_X[0] ) ) ;
|
||||
sky130_fd_sc_hd__mux2_1 mux_l1_in_1_ ( .A0 ( in[3] ) , .A1 ( in[2] ) ,
|
||||
|
|
@ -826,9 +833,6 @@ sky130_fd_sc_hd__mux2_1 mux_l4_in_0_ (
|
|||
.A0 ( sky130_fd_sc_hd__mux2_1_8_X[0] ) ,
|
||||
.A1 ( sky130_fd_sc_hd__mux2_1_7_X[0] ) , .S ( sram[3] ) ,
|
||||
.X ( sky130_fd_sc_hd__mux2_1_9_X[0] ) ) ;
|
||||
sky130_fd_sc_hd__inv_6 BINV_R_74 ( .A ( BUF_net_75 ) , .Y ( out[0] ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 BINV_R_75 ( .A ( sky130_fd_sc_hd__mux2_1_9_X[0] ) ,
|
||||
.Y ( BUF_net_75 ) ) ;
|
||||
endmodule
|
||||
|
||||
|
||||
|
|
@ -1079,8 +1083,9 @@ sky130_fd_sc_hd__mux2_1 mux_l4_in_0_ (
|
|||
.A0 ( sky130_fd_sc_hd__mux2_1_8_X[0] ) ,
|
||||
.A1 ( sky130_fd_sc_hd__mux2_1_7_X[0] ) , .S ( sram[3] ) ,
|
||||
.X ( sky130_fd_sc_hd__mux2_1_9_X[0] ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 BUFT_RR_71 ( .A ( sky130_fd_sc_hd__mux2_1_9_X[0] ) ,
|
||||
.X ( out[0] ) ) ;
|
||||
sky130_fd_sc_hd__inv_8 BINV_R_58 ( .A ( BUF_net_59 ) , .Y ( out[0] ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 BINV_R_59 ( .A ( sky130_fd_sc_hd__mux2_1_9_X[0] ) ,
|
||||
.Y ( BUF_net_59 ) ) ;
|
||||
endmodule
|
||||
|
||||
|
||||
|
|
@ -1268,8 +1273,9 @@ sky130_fd_sc_hd__mux2_1 mux_l4_in_0_ (
|
|||
.A0 ( sky130_fd_sc_hd__mux2_1_8_X[0] ) ,
|
||||
.A1 ( sky130_fd_sc_hd__mux2_1_7_X[0] ) , .S ( sram[3] ) ,
|
||||
.X ( sky130_fd_sc_hd__mux2_1_9_X[0] ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 BUFT_RR_70 ( .A ( sky130_fd_sc_hd__mux2_1_9_X[0] ) ,
|
||||
.X ( out[0] ) ) ;
|
||||
sky130_fd_sc_hd__inv_8 BINV_R_56 ( .A ( BUF_net_57 ) , .Y ( out[0] ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 BINV_R_57 ( .A ( sky130_fd_sc_hd__mux2_1_9_X[0] ) ,
|
||||
.Y ( BUF_net_57 ) ) ;
|
||||
endmodule
|
||||
|
||||
|
||||
|
|
@ -1384,7 +1390,7 @@ cby_1__1__mux_tree_tapbuf_size10_0 mux_right_ipin_0 (
|
|||
.sram ( mux_tree_tapbuf_size10_0_sram ) ,
|
||||
.sram_inv ( { SYNOPSYS_UNCONNECTED_1 , SYNOPSYS_UNCONNECTED_2 ,
|
||||
SYNOPSYS_UNCONNECTED_3 , SYNOPSYS_UNCONNECTED_4 } ) ,
|
||||
.out ( left_grid_pin_16_ ) , .p0 ( optlc_net_78 ) ) ;
|
||||
.out ( left_grid_pin_16_ ) , .p0 ( optlc_net_76 ) ) ;
|
||||
cby_1__1__mux_tree_tapbuf_size10_1 mux_right_ipin_3 (
|
||||
.in ( { chany_top_out[1] , chany_bottom_out[1] , chany_top_out[3] ,
|
||||
chany_bottom_out[3] , chany_top_out[7] , chany_bottom_out[7] ,
|
||||
|
|
@ -1393,7 +1399,7 @@ cby_1__1__mux_tree_tapbuf_size10_1 mux_right_ipin_3 (
|
|||
.sram ( mux_tree_tapbuf_size10_1_sram ) ,
|
||||
.sram_inv ( { SYNOPSYS_UNCONNECTED_5 , SYNOPSYS_UNCONNECTED_6 ,
|
||||
SYNOPSYS_UNCONNECTED_7 , SYNOPSYS_UNCONNECTED_8 } ) ,
|
||||
.out ( left_grid_pin_19_ ) , .p0 ( optlc_net_77 ) ) ;
|
||||
.out ( left_grid_pin_19_ ) , .p0 ( optlc_net_75 ) ) ;
|
||||
cby_1__1__mux_tree_tapbuf_size10_2 mux_right_ipin_4 (
|
||||
.in ( { chany_top_out[0] , chany_bottom_out[0] , chany_top_out[2] ,
|
||||
chany_bottom_out[2] , chany_top_out[4] , chany_bottom_out[4] ,
|
||||
|
|
@ -1402,7 +1408,7 @@ cby_1__1__mux_tree_tapbuf_size10_2 mux_right_ipin_4 (
|
|||
.sram ( mux_tree_tapbuf_size10_2_sram ) ,
|
||||
.sram_inv ( { SYNOPSYS_UNCONNECTED_9 , SYNOPSYS_UNCONNECTED_10 ,
|
||||
SYNOPSYS_UNCONNECTED_11 , SYNOPSYS_UNCONNECTED_12 } ) ,
|
||||
.out ( left_grid_pin_20_ ) , .p0 ( optlc_net_77 ) ) ;
|
||||
.out ( left_grid_pin_20_ ) , .p0 ( optlc_net_75 ) ) ;
|
||||
cby_1__1__mux_tree_tapbuf_size10_3 mux_right_ipin_7 (
|
||||
.in ( { chany_top_out[1] , chany_bottom_out[1] , chany_top_out[3] ,
|
||||
chany_bottom_out[3] , chany_top_out[7] , chany_bottom_out[7] ,
|
||||
|
|
@ -1411,7 +1417,7 @@ cby_1__1__mux_tree_tapbuf_size10_3 mux_right_ipin_7 (
|
|||
.sram ( mux_tree_tapbuf_size10_3_sram ) ,
|
||||
.sram_inv ( { SYNOPSYS_UNCONNECTED_13 , SYNOPSYS_UNCONNECTED_14 ,
|
||||
SYNOPSYS_UNCONNECTED_15 , SYNOPSYS_UNCONNECTED_16 } ) ,
|
||||
.out ( left_grid_pin_23_ ) , .p0 ( optlc_net_77 ) ) ;
|
||||
.out ( left_grid_pin_23_ ) , .p0 ( optlc_net_75 ) ) ;
|
||||
cby_1__1__mux_tree_tapbuf_size10_4 mux_right_ipin_8 (
|
||||
.in ( { chany_top_out[0] , chany_bottom_out[0] , chany_top_out[2] ,
|
||||
chany_bottom_out[2] , chany_top_out[8] , chany_bottom_out[8] ,
|
||||
|
|
@ -1420,7 +1426,7 @@ cby_1__1__mux_tree_tapbuf_size10_4 mux_right_ipin_8 (
|
|||
.sram ( mux_tree_tapbuf_size10_4_sram ) ,
|
||||
.sram_inv ( { SYNOPSYS_UNCONNECTED_17 , SYNOPSYS_UNCONNECTED_18 ,
|
||||
SYNOPSYS_UNCONNECTED_19 , SYNOPSYS_UNCONNECTED_20 } ) ,
|
||||
.out ( left_grid_pin_24_ ) , .p0 ( optlc_net_77 ) ) ;
|
||||
.out ( left_grid_pin_24_ ) , .p0 ( optlc_net_75 ) ) ;
|
||||
cby_1__1__mux_tree_tapbuf_size10_5 mux_right_ipin_11 (
|
||||
.in ( { chany_top_out[1] , chany_bottom_out[1] , chany_top_out[3] ,
|
||||
chany_bottom_out[3] , chany_top_out[5] , chany_bottom_out[5] ,
|
||||
|
|
@ -1484,9 +1490,8 @@ cby_1__1__mux_tree_tapbuf_size10_mem_6 mem_right_ipin_12 (
|
|||
.mem_out ( mux_tree_tapbuf_size10_6_sram ) ) ;
|
||||
cby_1__1__mux_tree_tapbuf_size10_mem mem_right_ipin_15 (
|
||||
.prog_clk ( prog_clk ) ,
|
||||
.ccff_head ( mux_tree_tapbuf_size8_mem_7_ccff_tail ) ,
|
||||
.ccff_tail ( { copt_net_87 } ) ,
|
||||
.mem_out ( mux_tree_tapbuf_size10_7_sram ) ) ;
|
||||
.ccff_head ( mux_tree_tapbuf_size8_mem_7_ccff_tail ) ,
|
||||
.ccff_tail ( ccff_tail ) , .mem_out ( mux_tree_tapbuf_size10_7_sram ) ) ;
|
||||
cby_1__1__mux_tree_tapbuf_size8_0 mux_right_ipin_1 (
|
||||
.in ( { chany_top_out[1] , chany_bottom_out[1] , chany_top_out[3] ,
|
||||
chany_bottom_out[3] , chany_top_out[5] , chany_bottom_out[5] ,
|
||||
|
|
@ -1502,7 +1507,7 @@ cby_1__1__mux_tree_tapbuf_size8_1 mux_right_ipin_2 (
|
|||
.sram ( mux_tree_tapbuf_size8_1_sram ) ,
|
||||
.sram_inv ( { SYNOPSYS_UNCONNECTED_37 , SYNOPSYS_UNCONNECTED_38 ,
|
||||
SYNOPSYS_UNCONNECTED_39 , SYNOPSYS_UNCONNECTED_40 } ) ,
|
||||
.out ( left_grid_pin_18_ ) , .p0 ( optlc_net_78 ) ) ;
|
||||
.out ( left_grid_pin_18_ ) , .p0 ( optlc_net_76 ) ) ;
|
||||
cby_1__1__mux_tree_tapbuf_size8_2 mux_right_ipin_5 (
|
||||
.in ( { chany_top_out[1] , chany_bottom_out[1] , chany_top_out[3] ,
|
||||
chany_bottom_out[3] , chany_top_out[9] , chany_bottom_out[9] ,
|
||||
|
|
@ -1518,7 +1523,7 @@ cby_1__1__mux_tree_tapbuf_size8_3 mux_right_ipin_6 (
|
|||
.sram ( mux_tree_tapbuf_size8_3_sram ) ,
|
||||
.sram_inv ( { SYNOPSYS_UNCONNECTED_45 , SYNOPSYS_UNCONNECTED_46 ,
|
||||
SYNOPSYS_UNCONNECTED_47 , SYNOPSYS_UNCONNECTED_48 } ) ,
|
||||
.out ( left_grid_pin_22_ ) , .p0 ( optlc_net_77 ) ) ;
|
||||
.out ( left_grid_pin_22_ ) , .p0 ( optlc_net_75 ) ) ;
|
||||
cby_1__1__mux_tree_tapbuf_size8_4 mux_right_ipin_9 (
|
||||
.in ( { chany_top_out[1] , chany_bottom_out[1] , chany_top_out[3] ,
|
||||
chany_bottom_out[3] , chany_top_out[5] , chany_bottom_out[5] ,
|
||||
|
|
@ -1526,7 +1531,7 @@ cby_1__1__mux_tree_tapbuf_size8_4 mux_right_ipin_9 (
|
|||
.sram ( mux_tree_tapbuf_size8_4_sram ) ,
|
||||
.sram_inv ( { SYNOPSYS_UNCONNECTED_49 , SYNOPSYS_UNCONNECTED_50 ,
|
||||
SYNOPSYS_UNCONNECTED_51 , SYNOPSYS_UNCONNECTED_52 } ) ,
|
||||
.out ( left_grid_pin_25_ ) , .p0 ( optlc_net_77 ) ) ;
|
||||
.out ( left_grid_pin_25_ ) , .p0 ( optlc_net_75 ) ) ;
|
||||
cby_1__1__mux_tree_tapbuf_size8_5 mux_right_ipin_10 (
|
||||
.in ( { chany_top_out[0] , chany_bottom_out[0] , chany_top_out[2] ,
|
||||
chany_bottom_out[2] , chany_top_out[6] , chany_bottom_out[6] ,
|
||||
|
|
@ -1534,7 +1539,7 @@ cby_1__1__mux_tree_tapbuf_size8_5 mux_right_ipin_10 (
|
|||
.sram ( mux_tree_tapbuf_size8_5_sram ) ,
|
||||
.sram_inv ( { SYNOPSYS_UNCONNECTED_53 , SYNOPSYS_UNCONNECTED_54 ,
|
||||
SYNOPSYS_UNCONNECTED_55 , SYNOPSYS_UNCONNECTED_56 } ) ,
|
||||
.out ( left_grid_pin_26_ ) , .p0 ( optlc_net_78 ) ) ;
|
||||
.out ( left_grid_pin_26_ ) , .p0 ( optlc_net_76 ) ) ;
|
||||
cby_1__1__mux_tree_tapbuf_size8_6 mux_right_ipin_13 (
|
||||
.in ( { chany_top_out[1] , chany_bottom_out[1] , chany_top_out[3] ,
|
||||
chany_bottom_out[3] , chany_top_out[9] , chany_bottom_out[9] ,
|
||||
|
|
@ -1550,7 +1555,7 @@ cby_1__1__mux_tree_tapbuf_size8 mux_right_ipin_14 (
|
|||
.sram ( mux_tree_tapbuf_size8_7_sram ) ,
|
||||
.sram_inv ( { SYNOPSYS_UNCONNECTED_61 , SYNOPSYS_UNCONNECTED_62 ,
|
||||
SYNOPSYS_UNCONNECTED_63 , SYNOPSYS_UNCONNECTED_64 } ) ,
|
||||
.out ( left_grid_pin_30_ ) , .p0 ( optlc_net_77 ) ) ;
|
||||
.out ( left_grid_pin_30_ ) , .p0 ( optlc_net_75 ) ) ;
|
||||
cby_1__1__mux_tree_tapbuf_size8_mem_0 mem_right_ipin_1 (
|
||||
.prog_clk ( prog_clk ) ,
|
||||
.ccff_head ( mux_tree_tapbuf_size10_mem_0_ccff_tail ) ,
|
||||
|
|
@ -1593,31 +1598,32 @@ cby_1__1__mux_tree_tapbuf_size8_mem mem_right_ipin_14 (
|
|||
.mem_out ( mux_tree_tapbuf_size8_7_sram ) ) ;
|
||||
sky130_fd_sc_hd__buf_1 Test_en_N_FTB01 ( .A ( Test_en_E_in ) ,
|
||||
.X ( aps_rename_505_ ) ) ;
|
||||
sky130_fd_sc_hd__buf_4 Test_en_W_FTB01 ( .A ( Test_en_E_in ) ,
|
||||
.X ( ropt_net_94 ) ) ;
|
||||
sky130_fd_sc_hd__bufbuf_16 Test_en_W_FTB01 ( .A ( Test_en_E_in ) ,
|
||||
.X ( Test_en_W_out ) ) ;
|
||||
sky130_fd_sc_hd__buf_1 Test_en_E_FTB01 ( .A ( Test_en_E_in ) ,
|
||||
.X ( net_net_67 ) ) ;
|
||||
sky130_fd_sc_hd__buf_1 prog_clk_0_FTB00 ( .A ( prog_clk_0_W_in ) ,
|
||||
.X ( net_net_68 ) ) ;
|
||||
sky130_fd_sc_hd__buf_16 prog_clk_0_FTB00 ( .A ( prog_clk_0_W_in ) ,
|
||||
.X ( prog_clk[0] ) ) ;
|
||||
sky130_fd_sc_hd__clkbuf_1 prog_clk_0_S_FTB01 ( .A ( prog_clk_0_W_in ) ,
|
||||
.X ( ctsbuf_net_179 ) ) ;
|
||||
.X ( ctsbuf_net_177 ) ) ;
|
||||
sky130_fd_sc_hd__clkbuf_1 prog_clk_0_N_FTB01 ( .A ( prog_clk_0_W_in ) ,
|
||||
.X ( ctsbuf_net_280 ) ) ;
|
||||
.X ( ctsbuf_net_278 ) ) ;
|
||||
sky130_fd_sc_hd__buf_4 prog_clk_2_S_FTB01 ( .A ( prog_clk_2_S_in ) ,
|
||||
.X ( ropt_net_93 ) ) ;
|
||||
.X ( ropt_net_87 ) ) ;
|
||||
sky130_fd_sc_hd__buf_4 prog_clk_2_N_FTB01 ( .A ( prog_clk_2_S_in ) ,
|
||||
.X ( ZBUF_6_f_1 ) ) ;
|
||||
.X ( aps_rename_506_ ) ) ;
|
||||
sky130_fd_sc_hd__buf_4 prog_clk_3_N_FTB01 ( .A ( prog_clk_3_N_in ) ,
|
||||
.X ( prog_clk_3_N_out ) ) ;
|
||||
.X ( aps_rename_507_ ) ) ;
|
||||
sky130_fd_sc_hd__buf_4 prog_clk_3_S_FTB01 ( .A ( prog_clk_3_N_in ) ,
|
||||
.X ( ropt_net_95 ) ) ;
|
||||
.X ( prog_clk_3_S_out ) ) ;
|
||||
sky130_fd_sc_hd__buf_4 clk_2_S_FTB01 ( .A ( clk_2_S_in ) ,
|
||||
.X ( clk_2_S_out ) ) ;
|
||||
sky130_fd_sc_hd__buf_4 clk_2_N_FTB01 ( .A ( clk_2_S_in ) , .X ( ZBUF_6_f_0 ) ) ;
|
||||
sky130_fd_sc_hd__buf_4 clk_3_N_FTB01 ( .A ( clk_3_N_in ) ,
|
||||
.X ( ropt_net_99 ) ) ;
|
||||
sky130_fd_sc_hd__buf_4 clk_2_N_FTB01 ( .A ( clk_2_S_in ) ,
|
||||
.X ( aps_rename_508_ ) ) ;
|
||||
sky130_fd_sc_hd__buf_1 clk_3_N_FTB01 ( .A ( clk_3_N_in ) ,
|
||||
.X ( aps_rename_509_ ) ) ;
|
||||
sky130_fd_sc_hd__buf_1 clk_3_S_FTB01 ( .A ( clk_3_N_in ) ,
|
||||
.X ( aps_rename_506_ ) ) ;
|
||||
.X ( aps_rename_510_ ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 FTB_17__16 ( .A ( chany_bottom_in[0] ) ,
|
||||
.X ( chany_top_out[0] ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 FTB_18__17 ( .A ( chany_bottom_in[1] ) ,
|
||||
|
|
@ -1698,43 +1704,31 @@ sky130_fd_sc_hd__buf_8 FTB_55__54 ( .A ( chany_top_in[18] ) ,
|
|||
.X ( chany_bottom_out[18] ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 FTB_56__55 ( .A ( chany_top_in[19] ) ,
|
||||
.X ( chany_bottom_out[19] ) ) ;
|
||||
sky130_fd_sc_hd__inv_8 BINV_R_65 ( .A ( BUF_net_66 ) , .Y ( Test_en_N_out ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 BINV_R_66 ( .A ( aps_rename_505_ ) ,
|
||||
.Y ( BUF_net_66 ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 BUFT_RR_67 ( .A ( net_net_67 ) , .X ( Test_en_E_out ) ) ;
|
||||
sky130_fd_sc_hd__inv_6 BINV_R_68 ( .A ( BUF_net_69 ) , .Y ( clk_3_S_out ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 BINV_R_69 ( .A ( aps_rename_506_ ) ,
|
||||
.Y ( BUF_net_69 ) ) ;
|
||||
sky130_fd_sc_hd__conb_1 optlc_79 ( .LO ( SYNOPSYS_UNCONNECTED_65 ) ,
|
||||
sky130_fd_sc_hd__inv_8 BINV_R_66 ( .A ( BUF_net_67 ) , .Y ( Test_en_N_out ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 BINV_R_67 ( .A ( aps_rename_505_ ) ,
|
||||
.Y ( BUF_net_67 ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 BUFT_RR_68 ( .A ( net_net_68 ) , .X ( Test_en_E_out ) ) ;
|
||||
sky130_fd_sc_hd__inv_6 BINV_R_69 ( .A ( BUF_net_70 ) , .Y ( clk_3_S_out ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 BINV_R_70 ( .A ( aps_rename_510_ ) ,
|
||||
.Y ( BUF_net_70 ) ) ;
|
||||
sky130_fd_sc_hd__conb_1 optlc_77 ( .LO ( SYNOPSYS_UNCONNECTED_65 ) ,
|
||||
.HI ( optlc_net_75 ) ) ;
|
||||
sky130_fd_sc_hd__conb_1 optlc_79 ( .LO ( SYNOPSYS_UNCONNECTED_66 ) ,
|
||||
.HI ( optlc_net_76 ) ) ;
|
||||
sky130_fd_sc_hd__conb_1 optlc_81 ( .LO ( SYNOPSYS_UNCONNECTED_66 ) ,
|
||||
.HI ( optlc_net_77 ) ) ;
|
||||
sky130_fd_sc_hd__conb_1 optlc_83 ( .LO ( SYNOPSYS_UNCONNECTED_67 ) ,
|
||||
.HI ( optlc_net_78 ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 ZBUF_6_f_inst_1303 ( .A ( ZBUF_6_f_0 ) ,
|
||||
.X ( clk_2_N_out ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 cts_buf_3471205 ( .A ( ctsbuf_net_179 ) ,
|
||||
.X ( prog_clk_0_S_out ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 cts_buf_3521210 ( .A ( ctsbuf_net_280 ) ,
|
||||
.X ( prog_clk_0_N_out ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 ZBUF_6_f_inst_1304 ( .A ( ZBUF_6_f_1 ) ,
|
||||
.X ( prog_clk_2_N_out ) ) ;
|
||||
sky130_fd_sc_hd__bufbuf_8 copt_h_inst_1325 ( .A ( copt_net_91 ) ,
|
||||
.X ( ccff_tail[0] ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 ropt_mt_inst_1337 ( .A ( ropt_net_99 ) ,
|
||||
sky130_fd_sc_hd__buf_6 ZBUF_4_f_inst_80 ( .A ( aps_rename_509_ ) ,
|
||||
.X ( clk_3_N_out ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1328 ( .A ( copt_net_87 ) ,
|
||||
.X ( copt_net_90 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1329 ( .A ( copt_net_92 ) ,
|
||||
.X ( copt_net_91 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1330 ( .A ( copt_net_90 ) ,
|
||||
.X ( copt_net_92 ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 ropt_mt_inst_1331 ( .A ( ropt_net_93 ) ,
|
||||
sky130_fd_sc_hd__buf_6 ZBUF_4_f_inst_585 ( .A ( aps_rename_508_ ) ,
|
||||
.X ( clk_2_N_out ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 ZBUF_4_f_inst_586 ( .A ( aps_rename_507_ ) ,
|
||||
.X ( prog_clk_3_N_out ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 ZBUF_4_f_inst_587 ( .A ( aps_rename_506_ ) ,
|
||||
.X ( prog_clk_2_N_out ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 ropt_mt_inst_1358 ( .A ( ropt_net_87 ) ,
|
||||
.X ( prog_clk_2_S_out ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 ropt_mt_inst_1332 ( .A ( ropt_net_94 ) ,
|
||||
.X ( Test_en_W_out ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 ropt_mt_inst_1333 ( .A ( ropt_net_95 ) ,
|
||||
.X ( prog_clk_3_S_out ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 cts_buf_3471205 ( .A ( ctsbuf_net_177 ) ,
|
||||
.X ( prog_clk_0_S_out ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 cts_buf_3521210 ( .A ( ctsbuf_net_278 ) ,
|
||||
.X ( prog_clk_0_N_out ) ) ;
|
||||
endmodule
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -16,13 +16,13 @@ input VSS ;
|
|||
supply1 VDD ;
|
||||
supply0 VSS ;
|
||||
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ccff_head[0] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ccff_head[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[0] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_1_ ( .D ( mem_out[0] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_1_ ( .D ( mem_out[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[1] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_2_ ( .D ( mem_out[1] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[2] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_3_ ( .D ( mem_out[2] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_3_ ( .D ( mem_out[2] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[3] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_1 FTB_16__15 ( .A ( mem_out[3] ) , .X ( ccff_tail[0] ) ,
|
||||
.VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
|
|
@ -45,9 +45,9 @@ sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ccff_head[0] ) ,
|
|||
.CLK ( prog_clk[0] ) , .Q ( mem_out[0] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_1_ ( .D ( mem_out[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[1] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_2_ ( .D ( mem_out[1] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_2_ ( .D ( mem_out[1] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[2] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_3_ ( .D ( mem_out[2] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_3_ ( .D ( mem_out[2] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[3] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_1 FTB_15__14 ( .A ( mem_out[3] ) , .X ( ccff_tail[0] ) ,
|
||||
.VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
|
|
@ -91,13 +91,13 @@ input VSS ;
|
|||
supply1 VDD ;
|
||||
supply0 VSS ;
|
||||
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ccff_head[0] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ccff_head[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[0] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_1_ ( .D ( mem_out[0] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_1_ ( .D ( mem_out[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[1] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_2_ ( .D ( mem_out[1] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[2] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_3_ ( .D ( mem_out[2] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_3_ ( .D ( mem_out[2] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[3] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_1 FTB_13__12 ( .A ( mem_out[3] ) , .X ( ccff_tail[0] ) ,
|
||||
.VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
|
|
@ -116,11 +116,11 @@ input VSS ;
|
|||
supply1 VDD ;
|
||||
supply0 VSS ;
|
||||
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ccff_head[0] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ccff_head[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[0] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_1_ ( .D ( mem_out[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[1] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_2 sky130_fd_sc_hd__dfxtp_1_2_ ( .D ( mem_out[1] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_2_ ( .D ( mem_out[1] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[2] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_3_ ( .D ( mem_out[2] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[3] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
|
|
@ -141,7 +141,7 @@ input VSS ;
|
|||
supply1 VDD ;
|
||||
supply0 VSS ;
|
||||
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ccff_head[0] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ccff_head[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[0] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_1_ ( .D ( mem_out[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[1] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
|
|
@ -166,7 +166,7 @@ input VSS ;
|
|||
supply1 VDD ;
|
||||
supply0 VSS ;
|
||||
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ccff_head[0] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ccff_head[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[0] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_1_ ( .D ( mem_out[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[1] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
|
|
@ -195,7 +195,7 @@ sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ccff_head[0] ) ,
|
|||
.CLK ( prog_clk[0] ) , .Q ( mem_out[0] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_1_ ( .D ( mem_out[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[1] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_2_ ( .D ( mem_out[1] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_2_ ( .D ( mem_out[1] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[2] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_3_ ( .D ( mem_out[2] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[3] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
|
|
@ -225,59 +225,6 @@ wire [0:0] sky130_fd_sc_hd__mux2_1_7_X ;
|
|||
supply1 VDD ;
|
||||
supply0 VSS ;
|
||||
|
||||
sky130_fd_sc_hd__mux2_1 mux_l1_in_0_ ( .A0 ( in[1] ) , .A1 ( in[0] ) ,
|
||||
.S ( sram[0] ) , .X ( sky130_fd_sc_hd__mux2_1_0_X[0] ) , .VPWR ( VDD ) ,
|
||||
.VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__mux2_1 mux_l2_in_0_ ( .A0 ( in[2] ) ,
|
||||
.A1 ( sky130_fd_sc_hd__mux2_1_0_X[0] ) , .S ( sram[1] ) ,
|
||||
.X ( sky130_fd_sc_hd__mux2_1_1_X[0] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__mux2_1 mux_l2_in_1_ ( .A0 ( in[4] ) , .A1 ( in[3] ) ,
|
||||
.S ( sram[1] ) , .X ( sky130_fd_sc_hd__mux2_1_2_X[0] ) , .VPWR ( VDD ) ,
|
||||
.VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__mux2_1 mux_l2_in_2_ ( .A0 ( in[6] ) , .A1 ( in[5] ) ,
|
||||
.S ( sram[1] ) , .X ( sky130_fd_sc_hd__mux2_1_3_X[0] ) , .VPWR ( VDD ) ,
|
||||
.VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__mux2_1 mux_l2_in_3_ ( .A0 ( p0 ) , .A1 ( in[7] ) ,
|
||||
.S ( sram[1] ) , .X ( sky130_fd_sc_hd__mux2_1_4_X[0] ) , .VPWR ( VDD ) ,
|
||||
.VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__mux2_1 mux_l3_in_0_ (
|
||||
.A0 ( sky130_fd_sc_hd__mux2_1_2_X[0] ) ,
|
||||
.A1 ( sky130_fd_sc_hd__mux2_1_1_X[0] ) , .S ( sram[2] ) ,
|
||||
.X ( sky130_fd_sc_hd__mux2_1_5_X[0] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__mux2_1 mux_l3_in_1_ (
|
||||
.A0 ( sky130_fd_sc_hd__mux2_1_4_X[0] ) ,
|
||||
.A1 ( sky130_fd_sc_hd__mux2_1_3_X[0] ) , .S ( sram[2] ) ,
|
||||
.X ( sky130_fd_sc_hd__mux2_1_6_X[0] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__mux2_1 mux_l4_in_0_ (
|
||||
.A0 ( sky130_fd_sc_hd__mux2_1_6_X[0] ) ,
|
||||
.A1 ( sky130_fd_sc_hd__mux2_1_5_X[0] ) , .S ( sram[3] ) ,
|
||||
.X ( sky130_fd_sc_hd__mux2_1_7_X[0] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 BUFT_RR_64 ( .A ( sky130_fd_sc_hd__mux2_1_7_X[0] ) ,
|
||||
.X ( out[0] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
endmodule
|
||||
|
||||
|
||||
module cby_1__1__mux_tree_tapbuf_size8_6 ( in , sram , sram_inv , out , VDD ,
|
||||
VSS , p0 ) ;
|
||||
input [0:7] in ;
|
||||
input [0:3] sram ;
|
||||
input [0:3] sram_inv ;
|
||||
output [0:0] out ;
|
||||
input VDD ;
|
||||
input VSS ;
|
||||
input p0 ;
|
||||
|
||||
wire [0:0] sky130_fd_sc_hd__mux2_1_0_X ;
|
||||
wire [0:0] sky130_fd_sc_hd__mux2_1_1_X ;
|
||||
wire [0:0] sky130_fd_sc_hd__mux2_1_2_X ;
|
||||
wire [0:0] sky130_fd_sc_hd__mux2_1_3_X ;
|
||||
wire [0:0] sky130_fd_sc_hd__mux2_1_4_X ;
|
||||
wire [0:0] sky130_fd_sc_hd__mux2_1_5_X ;
|
||||
wire [0:0] sky130_fd_sc_hd__mux2_1_6_X ;
|
||||
wire [0:0] sky130_fd_sc_hd__mux2_1_7_X ;
|
||||
supply1 VDD ;
|
||||
supply0 VSS ;
|
||||
|
||||
sky130_fd_sc_hd__buf_6 sky130_fd_sc_hd__buf_4_0_ (
|
||||
.A ( sky130_fd_sc_hd__mux2_1_7_X[0] ) , .X ( out[0] ) , .VPWR ( VDD ) ,
|
||||
.VGND ( VSS ) ) ;
|
||||
|
|
@ -311,6 +258,59 @@ sky130_fd_sc_hd__mux2_1 mux_l4_in_0_ (
|
|||
endmodule
|
||||
|
||||
|
||||
module cby_1__1__mux_tree_tapbuf_size8_6 ( in , sram , sram_inv , out , VDD ,
|
||||
VSS , p0 ) ;
|
||||
input [0:7] in ;
|
||||
input [0:3] sram ;
|
||||
input [0:3] sram_inv ;
|
||||
output [0:0] out ;
|
||||
input VDD ;
|
||||
input VSS ;
|
||||
input p0 ;
|
||||
|
||||
wire [0:0] sky130_fd_sc_hd__mux2_1_0_X ;
|
||||
wire [0:0] sky130_fd_sc_hd__mux2_1_1_X ;
|
||||
wire [0:0] sky130_fd_sc_hd__mux2_1_2_X ;
|
||||
wire [0:0] sky130_fd_sc_hd__mux2_1_3_X ;
|
||||
wire [0:0] sky130_fd_sc_hd__mux2_1_4_X ;
|
||||
wire [0:0] sky130_fd_sc_hd__mux2_1_5_X ;
|
||||
wire [0:0] sky130_fd_sc_hd__mux2_1_6_X ;
|
||||
wire [0:0] sky130_fd_sc_hd__mux2_1_7_X ;
|
||||
supply1 VDD ;
|
||||
supply0 VSS ;
|
||||
|
||||
sky130_fd_sc_hd__mux2_1 mux_l1_in_0_ ( .A0 ( in[1] ) , .A1 ( in[0] ) ,
|
||||
.S ( sram[0] ) , .X ( sky130_fd_sc_hd__mux2_1_0_X[0] ) , .VPWR ( VDD ) ,
|
||||
.VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__mux2_1 mux_l2_in_0_ ( .A0 ( in[2] ) ,
|
||||
.A1 ( sky130_fd_sc_hd__mux2_1_0_X[0] ) , .S ( sram[1] ) ,
|
||||
.X ( sky130_fd_sc_hd__mux2_1_1_X[0] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__mux2_1 mux_l2_in_1_ ( .A0 ( in[4] ) , .A1 ( in[3] ) ,
|
||||
.S ( sram[1] ) , .X ( sky130_fd_sc_hd__mux2_1_2_X[0] ) , .VPWR ( VDD ) ,
|
||||
.VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__mux2_1 mux_l2_in_2_ ( .A0 ( in[6] ) , .A1 ( in[5] ) ,
|
||||
.S ( sram[1] ) , .X ( sky130_fd_sc_hd__mux2_1_3_X[0] ) , .VPWR ( VDD ) ,
|
||||
.VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__mux2_1 mux_l2_in_3_ ( .A0 ( p0 ) , .A1 ( in[7] ) ,
|
||||
.S ( sram[1] ) , .X ( sky130_fd_sc_hd__mux2_1_4_X[0] ) , .VPWR ( VDD ) ,
|
||||
.VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__mux2_1 mux_l3_in_0_ (
|
||||
.A0 ( sky130_fd_sc_hd__mux2_1_2_X[0] ) ,
|
||||
.A1 ( sky130_fd_sc_hd__mux2_1_1_X[0] ) , .S ( sram[2] ) ,
|
||||
.X ( sky130_fd_sc_hd__mux2_1_5_X[0] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__mux2_1 mux_l3_in_1_ (
|
||||
.A0 ( sky130_fd_sc_hd__mux2_1_4_X[0] ) ,
|
||||
.A1 ( sky130_fd_sc_hd__mux2_1_3_X[0] ) , .S ( sram[2] ) ,
|
||||
.X ( sky130_fd_sc_hd__mux2_1_6_X[0] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__mux2_1 mux_l4_in_0_ (
|
||||
.A0 ( sky130_fd_sc_hd__mux2_1_6_X[0] ) ,
|
||||
.A1 ( sky130_fd_sc_hd__mux2_1_5_X[0] ) , .S ( sram[3] ) ,
|
||||
.X ( sky130_fd_sc_hd__mux2_1_7_X[0] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 BUFT_RR_65 ( .A ( sky130_fd_sc_hd__mux2_1_7_X[0] ) ,
|
||||
.X ( out[0] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
endmodule
|
||||
|
||||
|
||||
module cby_1__1__mux_tree_tapbuf_size8_5 ( in , sram , sram_inv , out , VDD ,
|
||||
VSS , p0 ) ;
|
||||
input [0:7] in ;
|
||||
|
|
@ -413,8 +413,10 @@ sky130_fd_sc_hd__mux2_1 mux_l4_in_0_ (
|
|||
.A0 ( sky130_fd_sc_hd__mux2_1_6_X[0] ) ,
|
||||
.A1 ( sky130_fd_sc_hd__mux2_1_5_X[0] ) , .S ( sram[3] ) ,
|
||||
.X ( sky130_fd_sc_hd__mux2_1_7_X[0] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 BUFT_RR_63 ( .A ( sky130_fd_sc_hd__mux2_1_7_X[0] ) ,
|
||||
.X ( out[0] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__inv_6 BINV_R_73 ( .A ( BUF_net_74 ) , .Y ( out[0] ) ,
|
||||
.VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 BINV_R_74 ( .A ( sky130_fd_sc_hd__mux2_1_7_X[0] ) ,
|
||||
.Y ( BUF_net_74 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
endmodule
|
||||
|
||||
|
||||
|
|
@ -439,9 +441,6 @@ wire [0:0] sky130_fd_sc_hd__mux2_1_7_X ;
|
|||
supply1 VDD ;
|
||||
supply0 VSS ;
|
||||
|
||||
sky130_fd_sc_hd__buf_6 sky130_fd_sc_hd__buf_4_0_ (
|
||||
.A ( sky130_fd_sc_hd__mux2_1_7_X[0] ) , .X ( out[0] ) , .VPWR ( VDD ) ,
|
||||
.VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__mux2_1 mux_l1_in_0_ ( .A0 ( in[1] ) , .A1 ( in[0] ) ,
|
||||
.S ( sram[0] ) , .X ( sky130_fd_sc_hd__mux2_1_0_X[0] ) , .VPWR ( VDD ) ,
|
||||
.VGND ( VSS ) ) ;
|
||||
|
|
@ -469,6 +468,8 @@ sky130_fd_sc_hd__mux2_1 mux_l4_in_0_ (
|
|||
.A0 ( sky130_fd_sc_hd__mux2_1_6_X[0] ) ,
|
||||
.A1 ( sky130_fd_sc_hd__mux2_1_5_X[0] ) , .S ( sram[3] ) ,
|
||||
.X ( sky130_fd_sc_hd__mux2_1_7_X[0] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 BUFT_RR_62 ( .A ( sky130_fd_sc_hd__mux2_1_7_X[0] ) ,
|
||||
.X ( out[0] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
endmodule
|
||||
|
||||
|
||||
|
|
@ -601,9 +602,6 @@ wire [0:0] sky130_fd_sc_hd__mux2_1_7_X ;
|
|||
supply1 VDD ;
|
||||
supply0 VSS ;
|
||||
|
||||
sky130_fd_sc_hd__buf_6 sky130_fd_sc_hd__buf_4_0_ (
|
||||
.A ( sky130_fd_sc_hd__mux2_1_7_X[0] ) , .X ( out[0] ) , .VPWR ( VDD ) ,
|
||||
.VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__mux2_1 mux_l1_in_0_ ( .A0 ( in[1] ) , .A1 ( in[0] ) ,
|
||||
.S ( sram[0] ) , .X ( sky130_fd_sc_hd__mux2_1_0_X[0] ) , .VPWR ( VDD ) ,
|
||||
.VGND ( VSS ) ) ;
|
||||
|
|
@ -631,6 +629,8 @@ sky130_fd_sc_hd__mux2_1 mux_l4_in_0_ (
|
|||
.A0 ( sky130_fd_sc_hd__mux2_1_6_X[0] ) ,
|
||||
.A1 ( sky130_fd_sc_hd__mux2_1_5_X[0] ) , .S ( sram[3] ) ,
|
||||
.X ( sky130_fd_sc_hd__mux2_1_7_X[0] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 BUFT_RR_61 ( .A ( sky130_fd_sc_hd__mux2_1_7_X[0] ) ,
|
||||
.X ( out[0] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
endmodule
|
||||
|
||||
|
||||
|
|
@ -643,19 +643,33 @@ output [0:3] mem_out ;
|
|||
input VDD ;
|
||||
input VSS ;
|
||||
|
||||
wire copt_net_84 ;
|
||||
supply1 VDD ;
|
||||
supply0 VSS ;
|
||||
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ccff_head[0] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ccff_head[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[0] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_1_ ( .D ( mem_out[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[1] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_2_ ( .D ( mem_out[1] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[2] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_3_ ( .D ( mem_out[2] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[3] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_1 FTB_8__7 ( .A ( mem_out[3] ) , .X ( ccff_tail[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( copt_net_84 ) , .VPWR ( VDD ) ,
|
||||
.VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 FTB_8__7 ( .A ( mem_out[3] ) , .X ( ccff_tail[0] ) ,
|
||||
.VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1315 ( .A ( copt_net_84 ) ,
|
||||
.X ( copt_net_79 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1316 ( .A ( copt_net_79 ) ,
|
||||
.X ( copt_net_80 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1317 ( .A ( copt_net_80 ) ,
|
||||
.X ( copt_net_81 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1318 ( .A ( copt_net_81 ) ,
|
||||
.X ( copt_net_82 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1319 ( .A ( copt_net_82 ) ,
|
||||
.X ( copt_net_83 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1321 ( .A ( copt_net_83 ) ,
|
||||
.X ( mem_out[3] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
endmodule
|
||||
|
||||
|
||||
|
|
@ -671,7 +685,7 @@ input VSS ;
|
|||
supply1 VDD ;
|
||||
supply0 VSS ;
|
||||
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ccff_head[0] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ccff_head[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[0] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_1_ ( .D ( mem_out[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[1] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
|
|
@ -698,7 +712,7 @@ supply0 VSS ;
|
|||
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ccff_head[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[0] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_1_ ( .D ( mem_out[0] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_1_ ( .D ( mem_out[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[1] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_2_ ( .D ( mem_out[1] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[2] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
|
|
@ -721,13 +735,13 @@ input VSS ;
|
|||
supply1 VDD ;
|
||||
supply0 VSS ;
|
||||
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ccff_head[0] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ccff_head[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[0] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_1_ ( .D ( mem_out[0] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_1_ ( .D ( mem_out[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[1] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_2_ ( .D ( mem_out[1] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_2_ ( .D ( mem_out[1] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[2] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_3_ ( .D ( mem_out[2] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_3_ ( .D ( mem_out[2] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[3] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_1 FTB_5__4 ( .A ( mem_out[3] ) , .X ( ccff_tail[0] ) ,
|
||||
.VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
|
|
@ -746,13 +760,13 @@ input VSS ;
|
|||
supply1 VDD ;
|
||||
supply0 VSS ;
|
||||
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ccff_head[0] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ccff_head[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[0] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_1_ ( .D ( mem_out[0] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_1_ ( .D ( mem_out[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[1] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_2_ ( .D ( mem_out[1] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_2_ ( .D ( mem_out[1] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[2] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_3_ ( .D ( mem_out[2] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_3_ ( .D ( mem_out[2] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[3] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_1 FTB_4__3 ( .A ( mem_out[3] ) , .X ( ccff_tail[0] ) ,
|
||||
.VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
|
|
@ -771,11 +785,11 @@ input VSS ;
|
|||
supply1 VDD ;
|
||||
supply0 VSS ;
|
||||
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ccff_head[0] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ccff_head[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[0] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_1_ ( .D ( mem_out[0] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_1_ ( .D ( mem_out[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[1] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_2_ ( .D ( mem_out[1] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_2_ ( .D ( mem_out[1] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[2] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_3_ ( .D ( mem_out[2] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[3] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
|
|
@ -796,13 +810,13 @@ input VSS ;
|
|||
supply1 VDD ;
|
||||
supply0 VSS ;
|
||||
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ccff_head[0] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ccff_head[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[0] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_1_ ( .D ( mem_out[0] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_1_ ( .D ( mem_out[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[1] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_2_ ( .D ( mem_out[1] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[2] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_3_ ( .D ( mem_out[2] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_3_ ( .D ( mem_out[2] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[3] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_1 FTB_2__1 ( .A ( mem_out[3] ) , .X ( ccff_tail[0] ) ,
|
||||
.VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
|
|
@ -821,36 +835,26 @@ input VSS ;
|
|||
supply1 VDD ;
|
||||
supply0 VSS ;
|
||||
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ropt_net_100 ) ,
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ropt_net_91 ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[0] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_1_ ( .D ( mem_out[0] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_1_ ( .D ( mem_out[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[1] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_2_ ( .D ( mem_out[1] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[2] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_3_ ( .D ( mem_out[2] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_3_ ( .D ( mem_out[2] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[3] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_1 FTB_1__0 ( .A ( mem_out[3] ) , .X ( ccff_tail[0] ) ,
|
||||
.VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1305 ( .A ( ccff_head[0] ) ,
|
||||
.X ( copt_net_81 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1306 ( .A ( copt_net_81 ) ,
|
||||
.X ( copt_net_82 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1314 ( .A ( copt_net_82 ) ,
|
||||
.X ( copt_net_83 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1315 ( .A ( copt_net_83 ) ,
|
||||
.X ( copt_net_84 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1323 ( .A ( copt_net_84 ) ,
|
||||
.X ( copt_net_85 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd2_1 copt_h_inst_1324 ( .A ( copt_net_85 ) ,
|
||||
.X ( copt_net_86 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 ropt_h_inst_1334 ( .A ( ropt_net_97 ) ,
|
||||
.X ( ropt_net_96 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_1 ropt_h_inst_1335 ( .A ( ropt_net_98 ) ,
|
||||
.X ( ropt_net_97 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_1 ropt_h_inst_1336 ( .A ( copt_net_86 ) ,
|
||||
.X ( ropt_net_98 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_2 ropt_h_inst_1339 ( .A ( ropt_net_96 ) ,
|
||||
.X ( ropt_net_100 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 ropt_h_inst_1359 ( .A ( ccff_head[0] ) ,
|
||||
.X ( ropt_net_88 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 ropt_h_inst_1360 ( .A ( ropt_net_92 ) ,
|
||||
.X ( ropt_net_89 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 ropt_h_inst_1361 ( .A ( ropt_net_88 ) ,
|
||||
.X ( ropt_net_90 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd2_1 ropt_h_inst_1362 ( .A ( ropt_net_89 ) ,
|
||||
.X ( ropt_net_91 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_1 ropt_h_inst_1363 ( .A ( ropt_net_90 ) ,
|
||||
.X ( ropt_net_92 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
endmodule
|
||||
|
||||
|
||||
|
|
@ -877,6 +881,9 @@ wire [0:0] sky130_fd_sc_hd__mux2_1_9_X ;
|
|||
supply1 VDD ;
|
||||
supply0 VSS ;
|
||||
|
||||
sky130_fd_sc_hd__buf_6 sky130_fd_sc_hd__buf_4_0_ (
|
||||
.A ( sky130_fd_sc_hd__mux2_1_9_X[0] ) , .X ( out[0] ) , .VPWR ( VDD ) ,
|
||||
.VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__mux2_1 mux_l1_in_0_ ( .A0 ( in[1] ) , .A1 ( in[0] ) ,
|
||||
.S ( sram[0] ) , .X ( sky130_fd_sc_hd__mux2_1_0_X[0] ) , .VPWR ( VDD ) ,
|
||||
.VGND ( VSS ) ) ;
|
||||
|
|
@ -911,10 +918,6 @@ sky130_fd_sc_hd__mux2_1 mux_l4_in_0_ (
|
|||
.A0 ( sky130_fd_sc_hd__mux2_1_8_X[0] ) ,
|
||||
.A1 ( sky130_fd_sc_hd__mux2_1_7_X[0] ) , .S ( sram[3] ) ,
|
||||
.X ( sky130_fd_sc_hd__mux2_1_9_X[0] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__inv_6 BINV_R_74 ( .A ( BUF_net_75 ) , .Y ( out[0] ) ,
|
||||
.VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 BINV_R_75 ( .A ( sky130_fd_sc_hd__mux2_1_9_X[0] ) ,
|
||||
.Y ( BUF_net_75 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
endmodule
|
||||
|
||||
|
||||
|
|
@ -1163,8 +1166,10 @@ sky130_fd_sc_hd__mux2_1 mux_l4_in_0_ (
|
|||
.A0 ( sky130_fd_sc_hd__mux2_1_8_X[0] ) ,
|
||||
.A1 ( sky130_fd_sc_hd__mux2_1_7_X[0] ) , .S ( sram[3] ) ,
|
||||
.X ( sky130_fd_sc_hd__mux2_1_9_X[0] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 BUFT_RR_71 ( .A ( sky130_fd_sc_hd__mux2_1_9_X[0] ) ,
|
||||
.X ( out[0] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__inv_8 BINV_R_58 ( .A ( BUF_net_59 ) , .Y ( out[0] ) ,
|
||||
.VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 BINV_R_59 ( .A ( sky130_fd_sc_hd__mux2_1_9_X[0] ) ,
|
||||
.Y ( BUF_net_59 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
endmodule
|
||||
|
||||
|
||||
|
|
@ -1351,8 +1356,10 @@ sky130_fd_sc_hd__mux2_1 mux_l4_in_0_ (
|
|||
.A0 ( sky130_fd_sc_hd__mux2_1_8_X[0] ) ,
|
||||
.A1 ( sky130_fd_sc_hd__mux2_1_7_X[0] ) , .S ( sram[3] ) ,
|
||||
.X ( sky130_fd_sc_hd__mux2_1_9_X[0] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 BUFT_RR_70 ( .A ( sky130_fd_sc_hd__mux2_1_9_X[0] ) ,
|
||||
.X ( out[0] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__inv_8 BINV_R_56 ( .A ( BUF_net_57 ) , .Y ( out[0] ) ,
|
||||
.VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 BINV_R_57 ( .A ( sky130_fd_sc_hd__mux2_1_9_X[0] ) ,
|
||||
.Y ( BUF_net_57 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
endmodule
|
||||
|
||||
|
||||
|
|
@ -1472,7 +1479,7 @@ cby_1__1__mux_tree_tapbuf_size10_0 mux_right_ipin_0 (
|
|||
.sram_inv ( { SYNOPSYS_UNCONNECTED_1 , SYNOPSYS_UNCONNECTED_2 ,
|
||||
SYNOPSYS_UNCONNECTED_3 , SYNOPSYS_UNCONNECTED_4 } ) ,
|
||||
.out ( left_grid_pin_16_ ) , .VDD ( VDD ) , .VSS ( VSS ) ,
|
||||
.p0 ( optlc_net_78 ) ) ;
|
||||
.p0 ( optlc_net_76 ) ) ;
|
||||
cby_1__1__mux_tree_tapbuf_size10_1 mux_right_ipin_3 (
|
||||
.in ( { chany_top_out[1] , chany_bottom_out[1] , chany_top_out[3] ,
|
||||
chany_bottom_out[3] , chany_top_out[7] , chany_bottom_out[7] ,
|
||||
|
|
@ -1482,7 +1489,7 @@ cby_1__1__mux_tree_tapbuf_size10_1 mux_right_ipin_3 (
|
|||
.sram_inv ( { SYNOPSYS_UNCONNECTED_5 , SYNOPSYS_UNCONNECTED_6 ,
|
||||
SYNOPSYS_UNCONNECTED_7 , SYNOPSYS_UNCONNECTED_8 } ) ,
|
||||
.out ( left_grid_pin_19_ ) , .VDD ( VDD ) , .VSS ( VSS ) ,
|
||||
.p0 ( optlc_net_77 ) ) ;
|
||||
.p0 ( optlc_net_75 ) ) ;
|
||||
cby_1__1__mux_tree_tapbuf_size10_2 mux_right_ipin_4 (
|
||||
.in ( { chany_top_out[0] , chany_bottom_out[0] , chany_top_out[2] ,
|
||||
chany_bottom_out[2] , chany_top_out[4] , chany_bottom_out[4] ,
|
||||
|
|
@ -1492,7 +1499,7 @@ cby_1__1__mux_tree_tapbuf_size10_2 mux_right_ipin_4 (
|
|||
.sram_inv ( { SYNOPSYS_UNCONNECTED_9 , SYNOPSYS_UNCONNECTED_10 ,
|
||||
SYNOPSYS_UNCONNECTED_11 , SYNOPSYS_UNCONNECTED_12 } ) ,
|
||||
.out ( left_grid_pin_20_ ) , .VDD ( VDD ) , .VSS ( VSS ) ,
|
||||
.p0 ( optlc_net_77 ) ) ;
|
||||
.p0 ( optlc_net_75 ) ) ;
|
||||
cby_1__1__mux_tree_tapbuf_size10_3 mux_right_ipin_7 (
|
||||
.in ( { chany_top_out[1] , chany_bottom_out[1] , chany_top_out[3] ,
|
||||
chany_bottom_out[3] , chany_top_out[7] , chany_bottom_out[7] ,
|
||||
|
|
@ -1502,7 +1509,7 @@ cby_1__1__mux_tree_tapbuf_size10_3 mux_right_ipin_7 (
|
|||
.sram_inv ( { SYNOPSYS_UNCONNECTED_13 , SYNOPSYS_UNCONNECTED_14 ,
|
||||
SYNOPSYS_UNCONNECTED_15 , SYNOPSYS_UNCONNECTED_16 } ) ,
|
||||
.out ( left_grid_pin_23_ ) , .VDD ( VDD ) , .VSS ( VSS ) ,
|
||||
.p0 ( optlc_net_77 ) ) ;
|
||||
.p0 ( optlc_net_75 ) ) ;
|
||||
cby_1__1__mux_tree_tapbuf_size10_4 mux_right_ipin_8 (
|
||||
.in ( { chany_top_out[0] , chany_bottom_out[0] , chany_top_out[2] ,
|
||||
chany_bottom_out[2] , chany_top_out[8] , chany_bottom_out[8] ,
|
||||
|
|
@ -1512,7 +1519,7 @@ cby_1__1__mux_tree_tapbuf_size10_4 mux_right_ipin_8 (
|
|||
.sram_inv ( { SYNOPSYS_UNCONNECTED_17 , SYNOPSYS_UNCONNECTED_18 ,
|
||||
SYNOPSYS_UNCONNECTED_19 , SYNOPSYS_UNCONNECTED_20 } ) ,
|
||||
.out ( left_grid_pin_24_ ) , .VDD ( VDD ) , .VSS ( VSS ) ,
|
||||
.p0 ( optlc_net_77 ) ) ;
|
||||
.p0 ( optlc_net_75 ) ) ;
|
||||
cby_1__1__mux_tree_tapbuf_size10_5 mux_right_ipin_11 (
|
||||
.in ( { chany_top_out[1] , chany_bottom_out[1] , chany_top_out[3] ,
|
||||
chany_bottom_out[3] , chany_top_out[5] , chany_bottom_out[5] ,
|
||||
|
|
@ -1579,9 +1586,9 @@ cby_1__1__mux_tree_tapbuf_size10_mem_6 mem_right_ipin_12 (
|
|||
.mem_out ( mux_tree_tapbuf_size10_6_sram ) , .VDD ( VDD ) , .VSS ( VSS ) ) ;
|
||||
cby_1__1__mux_tree_tapbuf_size10_mem mem_right_ipin_15 (
|
||||
.prog_clk ( prog_clk ) ,
|
||||
.ccff_head ( mux_tree_tapbuf_size8_mem_7_ccff_tail ) ,
|
||||
.ccff_tail ( { copt_net_87 } ) ,
|
||||
.mem_out ( mux_tree_tapbuf_size10_7_sram ) , .VDD ( VDD ) , .VSS ( VSS ) ) ;
|
||||
.ccff_head ( mux_tree_tapbuf_size8_mem_7_ccff_tail ) ,
|
||||
.ccff_tail ( ccff_tail ) , .mem_out ( mux_tree_tapbuf_size10_7_sram ) ,
|
||||
.VDD ( VDD ) , .VSS ( VSS ) ) ;
|
||||
cby_1__1__mux_tree_tapbuf_size8_0 mux_right_ipin_1 (
|
||||
.in ( { chany_top_out[1] , chany_bottom_out[1] , chany_top_out[3] ,
|
||||
chany_bottom_out[3] , chany_top_out[5] , chany_bottom_out[5] ,
|
||||
|
|
@ -1599,7 +1606,7 @@ cby_1__1__mux_tree_tapbuf_size8_1 mux_right_ipin_2 (
|
|||
.sram_inv ( { SYNOPSYS_UNCONNECTED_37 , SYNOPSYS_UNCONNECTED_38 ,
|
||||
SYNOPSYS_UNCONNECTED_39 , SYNOPSYS_UNCONNECTED_40 } ) ,
|
||||
.out ( left_grid_pin_18_ ) , .VDD ( VDD ) , .VSS ( VSS ) ,
|
||||
.p0 ( optlc_net_78 ) ) ;
|
||||
.p0 ( optlc_net_76 ) ) ;
|
||||
cby_1__1__mux_tree_tapbuf_size8_2 mux_right_ipin_5 (
|
||||
.in ( { chany_top_out[1] , chany_bottom_out[1] , chany_top_out[3] ,
|
||||
chany_bottom_out[3] , chany_top_out[9] , chany_bottom_out[9] ,
|
||||
|
|
@ -1617,7 +1624,7 @@ cby_1__1__mux_tree_tapbuf_size8_3 mux_right_ipin_6 (
|
|||
.sram_inv ( { SYNOPSYS_UNCONNECTED_45 , SYNOPSYS_UNCONNECTED_46 ,
|
||||
SYNOPSYS_UNCONNECTED_47 , SYNOPSYS_UNCONNECTED_48 } ) ,
|
||||
.out ( left_grid_pin_22_ ) , .VDD ( VDD ) , .VSS ( VSS ) ,
|
||||
.p0 ( optlc_net_77 ) ) ;
|
||||
.p0 ( optlc_net_75 ) ) ;
|
||||
cby_1__1__mux_tree_tapbuf_size8_4 mux_right_ipin_9 (
|
||||
.in ( { chany_top_out[1] , chany_bottom_out[1] , chany_top_out[3] ,
|
||||
chany_bottom_out[3] , chany_top_out[5] , chany_bottom_out[5] ,
|
||||
|
|
@ -1626,7 +1633,7 @@ cby_1__1__mux_tree_tapbuf_size8_4 mux_right_ipin_9 (
|
|||
.sram_inv ( { SYNOPSYS_UNCONNECTED_49 , SYNOPSYS_UNCONNECTED_50 ,
|
||||
SYNOPSYS_UNCONNECTED_51 , SYNOPSYS_UNCONNECTED_52 } ) ,
|
||||
.out ( left_grid_pin_25_ ) , .VDD ( VDD ) , .VSS ( VSS ) ,
|
||||
.p0 ( optlc_net_77 ) ) ;
|
||||
.p0 ( optlc_net_75 ) ) ;
|
||||
cby_1__1__mux_tree_tapbuf_size8_5 mux_right_ipin_10 (
|
||||
.in ( { chany_top_out[0] , chany_bottom_out[0] , chany_top_out[2] ,
|
||||
chany_bottom_out[2] , chany_top_out[6] , chany_bottom_out[6] ,
|
||||
|
|
@ -1635,7 +1642,7 @@ cby_1__1__mux_tree_tapbuf_size8_5 mux_right_ipin_10 (
|
|||
.sram_inv ( { SYNOPSYS_UNCONNECTED_53 , SYNOPSYS_UNCONNECTED_54 ,
|
||||
SYNOPSYS_UNCONNECTED_55 , SYNOPSYS_UNCONNECTED_56 } ) ,
|
||||
.out ( left_grid_pin_26_ ) , .VDD ( VDD ) , .VSS ( VSS ) ,
|
||||
.p0 ( optlc_net_78 ) ) ;
|
||||
.p0 ( optlc_net_76 ) ) ;
|
||||
cby_1__1__mux_tree_tapbuf_size8_6 mux_right_ipin_13 (
|
||||
.in ( { chany_top_out[1] , chany_bottom_out[1] , chany_top_out[3] ,
|
||||
chany_bottom_out[3] , chany_top_out[9] , chany_bottom_out[9] ,
|
||||
|
|
@ -1653,7 +1660,7 @@ cby_1__1__mux_tree_tapbuf_size8 mux_right_ipin_14 (
|
|||
.sram_inv ( { SYNOPSYS_UNCONNECTED_61 , SYNOPSYS_UNCONNECTED_62 ,
|
||||
SYNOPSYS_UNCONNECTED_63 , SYNOPSYS_UNCONNECTED_64 } ) ,
|
||||
.out ( left_grid_pin_30_ ) , .VDD ( VDD ) , .VSS ( VSS ) ,
|
||||
.p0 ( optlc_net_77 ) ) ;
|
||||
.p0 ( optlc_net_75 ) ) ;
|
||||
cby_1__1__mux_tree_tapbuf_size8_mem_0 mem_right_ipin_1 (
|
||||
.prog_clk ( prog_clk ) ,
|
||||
.ccff_head ( mux_tree_tapbuf_size10_mem_0_ccff_tail ) ,
|
||||
|
|
@ -1696,32 +1703,32 @@ cby_1__1__mux_tree_tapbuf_size8_mem mem_right_ipin_14 (
|
|||
.mem_out ( mux_tree_tapbuf_size8_7_sram ) , .VDD ( VDD ) , .VSS ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_1 Test_en_N_FTB01 ( .A ( Test_en_E_in ) ,
|
||||
.X ( aps_rename_505_ ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_4 Test_en_W_FTB01 ( .A ( Test_en_E_in ) ,
|
||||
.X ( ropt_net_94 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__bufbuf_16 Test_en_W_FTB01 ( .A ( Test_en_E_in ) ,
|
||||
.X ( Test_en_W_out ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_1 Test_en_E_FTB01 ( .A ( Test_en_E_in ) ,
|
||||
.X ( net_net_67 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_1 prog_clk_0_FTB00 ( .A ( prog_clk_0_W_in ) ,
|
||||
.X ( net_net_68 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_16 prog_clk_0_FTB00 ( .A ( prog_clk_0_W_in ) ,
|
||||
.X ( prog_clk[0] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__clkbuf_1 prog_clk_0_S_FTB01 ( .A ( prog_clk_0_W_in ) ,
|
||||
.X ( ctsbuf_net_179 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
.X ( ctsbuf_net_177 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__clkbuf_1 prog_clk_0_N_FTB01 ( .A ( prog_clk_0_W_in ) ,
|
||||
.X ( ctsbuf_net_280 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
.X ( ctsbuf_net_278 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_4 prog_clk_2_S_FTB01 ( .A ( prog_clk_2_S_in ) ,
|
||||
.X ( ropt_net_93 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
.X ( ropt_net_87 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_4 prog_clk_2_N_FTB01 ( .A ( prog_clk_2_S_in ) ,
|
||||
.X ( ZBUF_6_f_1 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
.X ( aps_rename_506_ ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_4 prog_clk_3_N_FTB01 ( .A ( prog_clk_3_N_in ) ,
|
||||
.X ( prog_clk_3_N_out ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
.X ( aps_rename_507_ ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_4 prog_clk_3_S_FTB01 ( .A ( prog_clk_3_N_in ) ,
|
||||
.X ( ropt_net_95 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
.X ( prog_clk_3_S_out ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_4 clk_2_S_FTB01 ( .A ( clk_2_S_in ) ,
|
||||
.X ( clk_2_S_out ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_4 clk_2_N_FTB01 ( .A ( clk_2_S_in ) , .X ( ZBUF_6_f_0 ) ,
|
||||
.VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_4 clk_3_N_FTB01 ( .A ( clk_3_N_in ) ,
|
||||
.X ( ropt_net_99 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_4 clk_2_N_FTB01 ( .A ( clk_2_S_in ) ,
|
||||
.X ( aps_rename_508_ ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_1 clk_3_N_FTB01 ( .A ( clk_3_N_in ) ,
|
||||
.X ( aps_rename_509_ ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_1 clk_3_S_FTB01 ( .A ( clk_3_N_in ) ,
|
||||
.X ( aps_rename_506_ ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
.X ( aps_rename_510_ ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 FTB_17__16 ( .A ( chany_bottom_in[0] ) ,
|
||||
.X ( chany_top_out[0] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 FTB_18__17 ( .A ( chany_bottom_in[1] ) ,
|
||||
|
|
@ -1802,46 +1809,34 @@ sky130_fd_sc_hd__buf_8 FTB_55__54 ( .A ( chany_top_in[18] ) ,
|
|||
.X ( chany_bottom_out[18] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 FTB_56__55 ( .A ( chany_top_in[19] ) ,
|
||||
.X ( chany_bottom_out[19] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__inv_8 BINV_R_65 ( .A ( BUF_net_66 ) , .Y ( Test_en_N_out ) ,
|
||||
sky130_fd_sc_hd__inv_8 BINV_R_66 ( .A ( BUF_net_67 ) , .Y ( Test_en_N_out ) ,
|
||||
.VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 BINV_R_66 ( .A ( aps_rename_505_ ) ,
|
||||
.Y ( BUF_net_66 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 BUFT_RR_67 ( .A ( net_net_67 ) , .X ( Test_en_E_out ) ,
|
||||
sky130_fd_sc_hd__inv_1 BINV_R_67 ( .A ( aps_rename_505_ ) ,
|
||||
.Y ( BUF_net_67 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 BUFT_RR_68 ( .A ( net_net_68 ) , .X ( Test_en_E_out ) ,
|
||||
.VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__inv_6 BINV_R_68 ( .A ( BUF_net_69 ) , .Y ( clk_3_S_out ) ,
|
||||
sky130_fd_sc_hd__inv_6 BINV_R_69 ( .A ( BUF_net_70 ) , .Y ( clk_3_S_out ) ,
|
||||
.VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 BINV_R_69 ( .A ( aps_rename_506_ ) ,
|
||||
.Y ( BUF_net_69 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__conb_1 optlc_79 ( .LO ( SYNOPSYS_UNCONNECTED_65 ) ,
|
||||
sky130_fd_sc_hd__inv_1 BINV_R_70 ( .A ( aps_rename_510_ ) ,
|
||||
.Y ( BUF_net_70 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__conb_1 optlc_77 ( .LO ( SYNOPSYS_UNCONNECTED_65 ) ,
|
||||
.HI ( optlc_net_75 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__conb_1 optlc_79 ( .LO ( SYNOPSYS_UNCONNECTED_66 ) ,
|
||||
.HI ( optlc_net_76 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__conb_1 optlc_81 ( .LO ( SYNOPSYS_UNCONNECTED_66 ) ,
|
||||
.HI ( optlc_net_77 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__conb_1 optlc_83 ( .LO ( SYNOPSYS_UNCONNECTED_67 ) ,
|
||||
.HI ( optlc_net_78 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 ZBUF_6_f_inst_1303 ( .A ( ZBUF_6_f_0 ) ,
|
||||
.X ( clk_2_N_out ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 cts_buf_3471205 ( .A ( ctsbuf_net_179 ) ,
|
||||
.X ( prog_clk_0_S_out ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 cts_buf_3521210 ( .A ( ctsbuf_net_280 ) ,
|
||||
.X ( prog_clk_0_N_out ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 ZBUF_6_f_inst_1304 ( .A ( ZBUF_6_f_1 ) ,
|
||||
.X ( prog_clk_2_N_out ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__bufbuf_8 copt_h_inst_1325 ( .A ( copt_net_91 ) ,
|
||||
.X ( ccff_tail[0] ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 ropt_mt_inst_1337 ( .A ( ropt_net_99 ) ,
|
||||
sky130_fd_sc_hd__buf_6 ZBUF_4_f_inst_80 ( .A ( aps_rename_509_ ) ,
|
||||
.X ( clk_3_N_out ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1328 ( .A ( copt_net_87 ) ,
|
||||
.X ( copt_net_90 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1329 ( .A ( copt_net_92 ) ,
|
||||
.X ( copt_net_91 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1330 ( .A ( copt_net_90 ) ,
|
||||
.X ( copt_net_92 ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 ropt_mt_inst_1331 ( .A ( ropt_net_93 ) ,
|
||||
sky130_fd_sc_hd__buf_6 ZBUF_4_f_inst_585 ( .A ( aps_rename_508_ ) ,
|
||||
.X ( clk_2_N_out ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 ZBUF_4_f_inst_586 ( .A ( aps_rename_507_ ) ,
|
||||
.X ( prog_clk_3_N_out ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 ZBUF_4_f_inst_587 ( .A ( aps_rename_506_ ) ,
|
||||
.X ( prog_clk_2_N_out ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 ropt_mt_inst_1358 ( .A ( ropt_net_87 ) ,
|
||||
.X ( prog_clk_2_S_out ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 ropt_mt_inst_1332 ( .A ( ropt_net_94 ) ,
|
||||
.X ( Test_en_W_out ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 ropt_mt_inst_1333 ( .A ( ropt_net_95 ) ,
|
||||
.X ( prog_clk_3_S_out ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 cts_buf_3471205 ( .A ( ctsbuf_net_177 ) ,
|
||||
.X ( prog_clk_0_S_out ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 cts_buf_3521210 ( .A ( ctsbuf_net_278 ) ,
|
||||
.X ( prog_clk_0_N_out ) , .VPWR ( VDD ) , .VGND ( VSS ) ) ;
|
||||
endmodule
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -11,13 +11,13 @@ input [0:0] ccff_head ;
|
|||
output [0:0] ccff_tail ;
|
||||
output [0:3] mem_out ;
|
||||
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ccff_head[0] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ccff_head[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[0] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_1_ ( .D ( mem_out[0] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_1_ ( .D ( mem_out[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[1] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_2_ ( .D ( mem_out[1] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[2] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_3_ ( .D ( mem_out[2] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_3_ ( .D ( mem_out[2] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[3] ) ) ;
|
||||
sky130_fd_sc_hd__buf_1 FTB_16__15 ( .A ( mem_out[3] ) , .X ( ccff_tail[0] ) ) ;
|
||||
endmodule
|
||||
|
|
@ -34,9 +34,9 @@ sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ccff_head[0] ) ,
|
|||
.CLK ( prog_clk[0] ) , .Q ( mem_out[0] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_1_ ( .D ( mem_out[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[1] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_2_ ( .D ( mem_out[1] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_2_ ( .D ( mem_out[1] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[2] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_3_ ( .D ( mem_out[2] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_3_ ( .D ( mem_out[2] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[3] ) ) ;
|
||||
sky130_fd_sc_hd__buf_1 FTB_15__14 ( .A ( mem_out[3] ) , .X ( ccff_tail[0] ) ) ;
|
||||
endmodule
|
||||
|
|
@ -68,13 +68,13 @@ input [0:0] ccff_head ;
|
|||
output [0:0] ccff_tail ;
|
||||
output [0:3] mem_out ;
|
||||
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ccff_head[0] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ccff_head[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[0] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_1_ ( .D ( mem_out[0] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_1_ ( .D ( mem_out[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[1] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_2_ ( .D ( mem_out[1] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[2] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_3_ ( .D ( mem_out[2] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_3_ ( .D ( mem_out[2] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[3] ) ) ;
|
||||
sky130_fd_sc_hd__buf_1 FTB_13__12 ( .A ( mem_out[3] ) , .X ( ccff_tail[0] ) ) ;
|
||||
endmodule
|
||||
|
|
@ -87,11 +87,11 @@ input [0:0] ccff_head ;
|
|||
output [0:0] ccff_tail ;
|
||||
output [0:3] mem_out ;
|
||||
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ccff_head[0] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ccff_head[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[0] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_1_ ( .D ( mem_out[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[1] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_2 sky130_fd_sc_hd__dfxtp_1_2_ ( .D ( mem_out[1] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_2_ ( .D ( mem_out[1] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[2] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_3_ ( .D ( mem_out[2] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[3] ) ) ;
|
||||
|
|
@ -106,7 +106,7 @@ input [0:0] ccff_head ;
|
|||
output [0:0] ccff_tail ;
|
||||
output [0:3] mem_out ;
|
||||
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ccff_head[0] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ccff_head[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[0] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_1_ ( .D ( mem_out[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[1] ) ) ;
|
||||
|
|
@ -125,7 +125,7 @@ input [0:0] ccff_head ;
|
|||
output [0:0] ccff_tail ;
|
||||
output [0:3] mem_out ;
|
||||
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ccff_head[0] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ccff_head[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[0] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_1_ ( .D ( mem_out[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[1] ) ) ;
|
||||
|
|
@ -148,7 +148,7 @@ sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ccff_head[0] ) ,
|
|||
.CLK ( prog_clk[0] ) , .Q ( mem_out[0] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_1_ ( .D ( mem_out[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[1] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_2_ ( .D ( mem_out[1] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_2_ ( .D ( mem_out[1] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[2] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_3_ ( .D ( mem_out[2] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[3] ) ) ;
|
||||
|
|
@ -172,50 +172,6 @@ wire [0:0] sky130_fd_sc_hd__mux2_1_5_X ;
|
|||
wire [0:0] sky130_fd_sc_hd__mux2_1_6_X ;
|
||||
wire [0:0] sky130_fd_sc_hd__mux2_1_7_X ;
|
||||
|
||||
sky130_fd_sc_hd__mux2_1 mux_l1_in_0_ ( .A0 ( in[1] ) , .A1 ( in[0] ) ,
|
||||
.S ( sram[0] ) , .X ( sky130_fd_sc_hd__mux2_1_0_X[0] ) ) ;
|
||||
sky130_fd_sc_hd__mux2_1 mux_l2_in_0_ ( .A0 ( in[2] ) ,
|
||||
.A1 ( sky130_fd_sc_hd__mux2_1_0_X[0] ) , .S ( sram[1] ) ,
|
||||
.X ( sky130_fd_sc_hd__mux2_1_1_X[0] ) ) ;
|
||||
sky130_fd_sc_hd__mux2_1 mux_l2_in_1_ ( .A0 ( in[4] ) , .A1 ( in[3] ) ,
|
||||
.S ( sram[1] ) , .X ( sky130_fd_sc_hd__mux2_1_2_X[0] ) ) ;
|
||||
sky130_fd_sc_hd__mux2_1 mux_l2_in_2_ ( .A0 ( in[6] ) , .A1 ( in[5] ) ,
|
||||
.S ( sram[1] ) , .X ( sky130_fd_sc_hd__mux2_1_3_X[0] ) ) ;
|
||||
sky130_fd_sc_hd__mux2_1 mux_l2_in_3_ ( .A0 ( p0 ) , .A1 ( in[7] ) ,
|
||||
.S ( sram[1] ) , .X ( sky130_fd_sc_hd__mux2_1_4_X[0] ) ) ;
|
||||
sky130_fd_sc_hd__mux2_1 mux_l3_in_0_ (
|
||||
.A0 ( sky130_fd_sc_hd__mux2_1_2_X[0] ) ,
|
||||
.A1 ( sky130_fd_sc_hd__mux2_1_1_X[0] ) , .S ( sram[2] ) ,
|
||||
.X ( sky130_fd_sc_hd__mux2_1_5_X[0] ) ) ;
|
||||
sky130_fd_sc_hd__mux2_1 mux_l3_in_1_ (
|
||||
.A0 ( sky130_fd_sc_hd__mux2_1_4_X[0] ) ,
|
||||
.A1 ( sky130_fd_sc_hd__mux2_1_3_X[0] ) , .S ( sram[2] ) ,
|
||||
.X ( sky130_fd_sc_hd__mux2_1_6_X[0] ) ) ;
|
||||
sky130_fd_sc_hd__mux2_1 mux_l4_in_0_ (
|
||||
.A0 ( sky130_fd_sc_hd__mux2_1_6_X[0] ) ,
|
||||
.A1 ( sky130_fd_sc_hd__mux2_1_5_X[0] ) , .S ( sram[3] ) ,
|
||||
.X ( sky130_fd_sc_hd__mux2_1_7_X[0] ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 BUFT_RR_64 ( .A ( sky130_fd_sc_hd__mux2_1_7_X[0] ) ,
|
||||
.X ( out[0] ) ) ;
|
||||
endmodule
|
||||
|
||||
|
||||
module cby_1__1__mux_tree_tapbuf_size8_6 ( in , sram , sram_inv , out , p0 ) ;
|
||||
input [0:7] in ;
|
||||
input [0:3] sram ;
|
||||
input [0:3] sram_inv ;
|
||||
output [0:0] out ;
|
||||
input p0 ;
|
||||
|
||||
wire [0:0] sky130_fd_sc_hd__mux2_1_0_X ;
|
||||
wire [0:0] sky130_fd_sc_hd__mux2_1_1_X ;
|
||||
wire [0:0] sky130_fd_sc_hd__mux2_1_2_X ;
|
||||
wire [0:0] sky130_fd_sc_hd__mux2_1_3_X ;
|
||||
wire [0:0] sky130_fd_sc_hd__mux2_1_4_X ;
|
||||
wire [0:0] sky130_fd_sc_hd__mux2_1_5_X ;
|
||||
wire [0:0] sky130_fd_sc_hd__mux2_1_6_X ;
|
||||
wire [0:0] sky130_fd_sc_hd__mux2_1_7_X ;
|
||||
|
||||
sky130_fd_sc_hd__buf_6 sky130_fd_sc_hd__buf_4_0_ (
|
||||
.A ( sky130_fd_sc_hd__mux2_1_7_X[0] ) , .X ( out[0] ) ) ;
|
||||
sky130_fd_sc_hd__mux2_1 mux_l1_in_0_ ( .A0 ( in[1] ) , .A1 ( in[0] ) ,
|
||||
|
|
@ -244,6 +200,50 @@ sky130_fd_sc_hd__mux2_1 mux_l4_in_0_ (
|
|||
endmodule
|
||||
|
||||
|
||||
module cby_1__1__mux_tree_tapbuf_size8_6 ( in , sram , sram_inv , out , p0 ) ;
|
||||
input [0:7] in ;
|
||||
input [0:3] sram ;
|
||||
input [0:3] sram_inv ;
|
||||
output [0:0] out ;
|
||||
input p0 ;
|
||||
|
||||
wire [0:0] sky130_fd_sc_hd__mux2_1_0_X ;
|
||||
wire [0:0] sky130_fd_sc_hd__mux2_1_1_X ;
|
||||
wire [0:0] sky130_fd_sc_hd__mux2_1_2_X ;
|
||||
wire [0:0] sky130_fd_sc_hd__mux2_1_3_X ;
|
||||
wire [0:0] sky130_fd_sc_hd__mux2_1_4_X ;
|
||||
wire [0:0] sky130_fd_sc_hd__mux2_1_5_X ;
|
||||
wire [0:0] sky130_fd_sc_hd__mux2_1_6_X ;
|
||||
wire [0:0] sky130_fd_sc_hd__mux2_1_7_X ;
|
||||
|
||||
sky130_fd_sc_hd__mux2_1 mux_l1_in_0_ ( .A0 ( in[1] ) , .A1 ( in[0] ) ,
|
||||
.S ( sram[0] ) , .X ( sky130_fd_sc_hd__mux2_1_0_X[0] ) ) ;
|
||||
sky130_fd_sc_hd__mux2_1 mux_l2_in_0_ ( .A0 ( in[2] ) ,
|
||||
.A1 ( sky130_fd_sc_hd__mux2_1_0_X[0] ) , .S ( sram[1] ) ,
|
||||
.X ( sky130_fd_sc_hd__mux2_1_1_X[0] ) ) ;
|
||||
sky130_fd_sc_hd__mux2_1 mux_l2_in_1_ ( .A0 ( in[4] ) , .A1 ( in[3] ) ,
|
||||
.S ( sram[1] ) , .X ( sky130_fd_sc_hd__mux2_1_2_X[0] ) ) ;
|
||||
sky130_fd_sc_hd__mux2_1 mux_l2_in_2_ ( .A0 ( in[6] ) , .A1 ( in[5] ) ,
|
||||
.S ( sram[1] ) , .X ( sky130_fd_sc_hd__mux2_1_3_X[0] ) ) ;
|
||||
sky130_fd_sc_hd__mux2_1 mux_l2_in_3_ ( .A0 ( p0 ) , .A1 ( in[7] ) ,
|
||||
.S ( sram[1] ) , .X ( sky130_fd_sc_hd__mux2_1_4_X[0] ) ) ;
|
||||
sky130_fd_sc_hd__mux2_1 mux_l3_in_0_ (
|
||||
.A0 ( sky130_fd_sc_hd__mux2_1_2_X[0] ) ,
|
||||
.A1 ( sky130_fd_sc_hd__mux2_1_1_X[0] ) , .S ( sram[2] ) ,
|
||||
.X ( sky130_fd_sc_hd__mux2_1_5_X[0] ) ) ;
|
||||
sky130_fd_sc_hd__mux2_1 mux_l3_in_1_ (
|
||||
.A0 ( sky130_fd_sc_hd__mux2_1_4_X[0] ) ,
|
||||
.A1 ( sky130_fd_sc_hd__mux2_1_3_X[0] ) , .S ( sram[2] ) ,
|
||||
.X ( sky130_fd_sc_hd__mux2_1_6_X[0] ) ) ;
|
||||
sky130_fd_sc_hd__mux2_1 mux_l4_in_0_ (
|
||||
.A0 ( sky130_fd_sc_hd__mux2_1_6_X[0] ) ,
|
||||
.A1 ( sky130_fd_sc_hd__mux2_1_5_X[0] ) , .S ( sram[3] ) ,
|
||||
.X ( sky130_fd_sc_hd__mux2_1_7_X[0] ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 BUFT_RR_65 ( .A ( sky130_fd_sc_hd__mux2_1_7_X[0] ) ,
|
||||
.X ( out[0] ) ) ;
|
||||
endmodule
|
||||
|
||||
|
||||
module cby_1__1__mux_tree_tapbuf_size8_5 ( in , sram , sram_inv , out , p0 ) ;
|
||||
input [0:7] in ;
|
||||
input [0:3] sram ;
|
||||
|
|
@ -327,8 +327,9 @@ sky130_fd_sc_hd__mux2_1 mux_l4_in_0_ (
|
|||
.A0 ( sky130_fd_sc_hd__mux2_1_6_X[0] ) ,
|
||||
.A1 ( sky130_fd_sc_hd__mux2_1_5_X[0] ) , .S ( sram[3] ) ,
|
||||
.X ( sky130_fd_sc_hd__mux2_1_7_X[0] ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 BUFT_RR_63 ( .A ( sky130_fd_sc_hd__mux2_1_7_X[0] ) ,
|
||||
.X ( out[0] ) ) ;
|
||||
sky130_fd_sc_hd__inv_6 BINV_R_73 ( .A ( BUF_net_74 ) , .Y ( out[0] ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 BINV_R_74 ( .A ( sky130_fd_sc_hd__mux2_1_7_X[0] ) ,
|
||||
.Y ( BUF_net_74 ) ) ;
|
||||
endmodule
|
||||
|
||||
|
||||
|
|
@ -348,8 +349,6 @@ wire [0:0] sky130_fd_sc_hd__mux2_1_5_X ;
|
|||
wire [0:0] sky130_fd_sc_hd__mux2_1_6_X ;
|
||||
wire [0:0] sky130_fd_sc_hd__mux2_1_7_X ;
|
||||
|
||||
sky130_fd_sc_hd__buf_6 sky130_fd_sc_hd__buf_4_0_ (
|
||||
.A ( sky130_fd_sc_hd__mux2_1_7_X[0] ) , .X ( out[0] ) ) ;
|
||||
sky130_fd_sc_hd__mux2_1 mux_l1_in_0_ ( .A0 ( in[1] ) , .A1 ( in[0] ) ,
|
||||
.S ( sram[0] ) , .X ( sky130_fd_sc_hd__mux2_1_0_X[0] ) ) ;
|
||||
sky130_fd_sc_hd__mux2_1 mux_l2_in_0_ ( .A0 ( in[2] ) ,
|
||||
|
|
@ -373,6 +372,8 @@ sky130_fd_sc_hd__mux2_1 mux_l4_in_0_ (
|
|||
.A0 ( sky130_fd_sc_hd__mux2_1_6_X[0] ) ,
|
||||
.A1 ( sky130_fd_sc_hd__mux2_1_5_X[0] ) , .S ( sram[3] ) ,
|
||||
.X ( sky130_fd_sc_hd__mux2_1_7_X[0] ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 BUFT_RR_62 ( .A ( sky130_fd_sc_hd__mux2_1_7_X[0] ) ,
|
||||
.X ( out[0] ) ) ;
|
||||
endmodule
|
||||
|
||||
|
||||
|
|
@ -480,8 +481,6 @@ wire [0:0] sky130_fd_sc_hd__mux2_1_5_X ;
|
|||
wire [0:0] sky130_fd_sc_hd__mux2_1_6_X ;
|
||||
wire [0:0] sky130_fd_sc_hd__mux2_1_7_X ;
|
||||
|
||||
sky130_fd_sc_hd__buf_6 sky130_fd_sc_hd__buf_4_0_ (
|
||||
.A ( sky130_fd_sc_hd__mux2_1_7_X[0] ) , .X ( out[0] ) ) ;
|
||||
sky130_fd_sc_hd__mux2_1 mux_l1_in_0_ ( .A0 ( in[1] ) , .A1 ( in[0] ) ,
|
||||
.S ( sram[0] ) , .X ( sky130_fd_sc_hd__mux2_1_0_X[0] ) ) ;
|
||||
sky130_fd_sc_hd__mux2_1 mux_l2_in_0_ ( .A0 ( in[2] ) ,
|
||||
|
|
@ -505,6 +504,8 @@ sky130_fd_sc_hd__mux2_1 mux_l4_in_0_ (
|
|||
.A0 ( sky130_fd_sc_hd__mux2_1_6_X[0] ) ,
|
||||
.A1 ( sky130_fd_sc_hd__mux2_1_5_X[0] ) , .S ( sram[3] ) ,
|
||||
.X ( sky130_fd_sc_hd__mux2_1_7_X[0] ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 BUFT_RR_61 ( .A ( sky130_fd_sc_hd__mux2_1_7_X[0] ) ,
|
||||
.X ( out[0] ) ) ;
|
||||
endmodule
|
||||
|
||||
|
||||
|
|
@ -515,15 +516,29 @@ input [0:0] ccff_head ;
|
|||
output [0:0] ccff_tail ;
|
||||
output [0:3] mem_out ;
|
||||
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ccff_head[0] ) ,
|
||||
wire copt_net_84 ;
|
||||
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ccff_head[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[0] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_1_ ( .D ( mem_out[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[1] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_2_ ( .D ( mem_out[1] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[2] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_3_ ( .D ( mem_out[2] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[3] ) ) ;
|
||||
sky130_fd_sc_hd__buf_1 FTB_8__7 ( .A ( mem_out[3] ) , .X ( ccff_tail[0] ) ) ;
|
||||
.CLK ( prog_clk[0] ) , .Q ( copt_net_84 ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 FTB_8__7 ( .A ( mem_out[3] ) , .X ( ccff_tail[0] ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1315 ( .A ( copt_net_84 ) ,
|
||||
.X ( copt_net_79 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1316 ( .A ( copt_net_79 ) ,
|
||||
.X ( copt_net_80 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1317 ( .A ( copt_net_80 ) ,
|
||||
.X ( copt_net_81 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1318 ( .A ( copt_net_81 ) ,
|
||||
.X ( copt_net_82 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1319 ( .A ( copt_net_82 ) ,
|
||||
.X ( copt_net_83 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1321 ( .A ( copt_net_83 ) ,
|
||||
.X ( mem_out[3] ) ) ;
|
||||
endmodule
|
||||
|
||||
|
||||
|
|
@ -534,7 +549,7 @@ input [0:0] ccff_head ;
|
|||
output [0:0] ccff_tail ;
|
||||
output [0:3] mem_out ;
|
||||
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ccff_head[0] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ccff_head[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[0] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_1_ ( .D ( mem_out[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[1] ) ) ;
|
||||
|
|
@ -555,7 +570,7 @@ output [0:3] mem_out ;
|
|||
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ccff_head[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[0] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_1_ ( .D ( mem_out[0] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_1_ ( .D ( mem_out[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[1] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_2_ ( .D ( mem_out[1] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[2] ) ) ;
|
||||
|
|
@ -572,13 +587,13 @@ input [0:0] ccff_head ;
|
|||
output [0:0] ccff_tail ;
|
||||
output [0:3] mem_out ;
|
||||
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ccff_head[0] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ccff_head[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[0] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_1_ ( .D ( mem_out[0] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_1_ ( .D ( mem_out[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[1] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_2_ ( .D ( mem_out[1] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_2_ ( .D ( mem_out[1] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[2] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_3_ ( .D ( mem_out[2] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_3_ ( .D ( mem_out[2] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[3] ) ) ;
|
||||
sky130_fd_sc_hd__buf_1 FTB_5__4 ( .A ( mem_out[3] ) , .X ( ccff_tail[0] ) ) ;
|
||||
endmodule
|
||||
|
|
@ -591,13 +606,13 @@ input [0:0] ccff_head ;
|
|||
output [0:0] ccff_tail ;
|
||||
output [0:3] mem_out ;
|
||||
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ccff_head[0] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ccff_head[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[0] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_1_ ( .D ( mem_out[0] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_1_ ( .D ( mem_out[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[1] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_2_ ( .D ( mem_out[1] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_2_ ( .D ( mem_out[1] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[2] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_3_ ( .D ( mem_out[2] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_3_ ( .D ( mem_out[2] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[3] ) ) ;
|
||||
sky130_fd_sc_hd__buf_1 FTB_4__3 ( .A ( mem_out[3] ) , .X ( ccff_tail[0] ) ) ;
|
||||
endmodule
|
||||
|
|
@ -610,11 +625,11 @@ input [0:0] ccff_head ;
|
|||
output [0:0] ccff_tail ;
|
||||
output [0:3] mem_out ;
|
||||
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ccff_head[0] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ccff_head[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[0] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_1_ ( .D ( mem_out[0] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_1_ ( .D ( mem_out[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[1] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_2_ ( .D ( mem_out[1] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_2_ ( .D ( mem_out[1] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[2] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_3_ ( .D ( mem_out[2] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[3] ) ) ;
|
||||
|
|
@ -629,13 +644,13 @@ input [0:0] ccff_head ;
|
|||
output [0:0] ccff_tail ;
|
||||
output [0:3] mem_out ;
|
||||
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ccff_head[0] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ccff_head[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[0] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_1_ ( .D ( mem_out[0] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_1_ ( .D ( mem_out[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[1] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_2_ ( .D ( mem_out[1] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[2] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_3_ ( .D ( mem_out[2] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_3_ ( .D ( mem_out[2] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[3] ) ) ;
|
||||
sky130_fd_sc_hd__buf_1 FTB_2__1 ( .A ( mem_out[3] ) , .X ( ccff_tail[0] ) ) ;
|
||||
endmodule
|
||||
|
|
@ -648,35 +663,25 @@ input [0:0] ccff_head ;
|
|||
output [0:0] ccff_tail ;
|
||||
output [0:3] mem_out ;
|
||||
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ropt_net_100 ) ,
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ropt_net_91 ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[0] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_1_ ( .D ( mem_out[0] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_1_ ( .D ( mem_out[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[1] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_2_ ( .D ( mem_out[1] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[2] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_3_ ( .D ( mem_out[2] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_3_ ( .D ( mem_out[2] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[3] ) ) ;
|
||||
sky130_fd_sc_hd__buf_1 FTB_1__0 ( .A ( mem_out[3] ) , .X ( ccff_tail[0] ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1305 ( .A ( ccff_head[0] ) ,
|
||||
.X ( copt_net_81 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1306 ( .A ( copt_net_81 ) ,
|
||||
.X ( copt_net_82 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1314 ( .A ( copt_net_82 ) ,
|
||||
.X ( copt_net_83 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1315 ( .A ( copt_net_83 ) ,
|
||||
.X ( copt_net_84 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1323 ( .A ( copt_net_84 ) ,
|
||||
.X ( copt_net_85 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd2_1 copt_h_inst_1324 ( .A ( copt_net_85 ) ,
|
||||
.X ( copt_net_86 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 ropt_h_inst_1334 ( .A ( ropt_net_97 ) ,
|
||||
.X ( ropt_net_96 ) ) ;
|
||||
sky130_fd_sc_hd__buf_1 ropt_h_inst_1335 ( .A ( ropt_net_98 ) ,
|
||||
.X ( ropt_net_97 ) ) ;
|
||||
sky130_fd_sc_hd__buf_1 ropt_h_inst_1336 ( .A ( copt_net_86 ) ,
|
||||
.X ( ropt_net_98 ) ) ;
|
||||
sky130_fd_sc_hd__buf_2 ropt_h_inst_1339 ( .A ( ropt_net_96 ) ,
|
||||
.X ( ropt_net_100 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 ropt_h_inst_1359 ( .A ( ccff_head[0] ) ,
|
||||
.X ( ropt_net_88 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 ropt_h_inst_1360 ( .A ( ropt_net_92 ) ,
|
||||
.X ( ropt_net_89 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 ropt_h_inst_1361 ( .A ( ropt_net_88 ) ,
|
||||
.X ( ropt_net_90 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd2_1 ropt_h_inst_1362 ( .A ( ropt_net_89 ) ,
|
||||
.X ( ropt_net_91 ) ) ;
|
||||
sky130_fd_sc_hd__buf_1 ropt_h_inst_1363 ( .A ( ropt_net_90 ) ,
|
||||
.X ( ropt_net_92 ) ) ;
|
||||
endmodule
|
||||
|
||||
|
||||
|
|
@ -698,6 +703,8 @@ wire [0:0] sky130_fd_sc_hd__mux2_1_7_X ;
|
|||
wire [0:0] sky130_fd_sc_hd__mux2_1_8_X ;
|
||||
wire [0:0] sky130_fd_sc_hd__mux2_1_9_X ;
|
||||
|
||||
sky130_fd_sc_hd__buf_6 sky130_fd_sc_hd__buf_4_0_ (
|
||||
.A ( sky130_fd_sc_hd__mux2_1_9_X[0] ) , .X ( out[0] ) ) ;
|
||||
sky130_fd_sc_hd__mux2_1 mux_l1_in_0_ ( .A0 ( in[1] ) , .A1 ( in[0] ) ,
|
||||
.S ( sram[0] ) , .X ( sky130_fd_sc_hd__mux2_1_0_X[0] ) ) ;
|
||||
sky130_fd_sc_hd__mux2_1 mux_l1_in_1_ ( .A0 ( in[3] ) , .A1 ( in[2] ) ,
|
||||
|
|
@ -727,9 +734,6 @@ sky130_fd_sc_hd__mux2_1 mux_l4_in_0_ (
|
|||
.A0 ( sky130_fd_sc_hd__mux2_1_8_X[0] ) ,
|
||||
.A1 ( sky130_fd_sc_hd__mux2_1_7_X[0] ) , .S ( sram[3] ) ,
|
||||
.X ( sky130_fd_sc_hd__mux2_1_9_X[0] ) ) ;
|
||||
sky130_fd_sc_hd__inv_6 BINV_R_74 ( .A ( BUF_net_75 ) , .Y ( out[0] ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 BINV_R_75 ( .A ( sky130_fd_sc_hd__mux2_1_9_X[0] ) ,
|
||||
.Y ( BUF_net_75 ) ) ;
|
||||
endmodule
|
||||
|
||||
|
||||
|
|
@ -936,8 +940,9 @@ sky130_fd_sc_hd__mux2_1 mux_l4_in_0_ (
|
|||
.A0 ( sky130_fd_sc_hd__mux2_1_8_X[0] ) ,
|
||||
.A1 ( sky130_fd_sc_hd__mux2_1_7_X[0] ) , .S ( sram[3] ) ,
|
||||
.X ( sky130_fd_sc_hd__mux2_1_9_X[0] ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 BUFT_RR_71 ( .A ( sky130_fd_sc_hd__mux2_1_9_X[0] ) ,
|
||||
.X ( out[0] ) ) ;
|
||||
sky130_fd_sc_hd__inv_8 BINV_R_58 ( .A ( BUF_net_59 ) , .Y ( out[0] ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 BINV_R_59 ( .A ( sky130_fd_sc_hd__mux2_1_9_X[0] ) ,
|
||||
.Y ( BUF_net_59 ) ) ;
|
||||
endmodule
|
||||
|
||||
|
||||
|
|
@ -1092,8 +1097,9 @@ sky130_fd_sc_hd__mux2_1 mux_l4_in_0_ (
|
|||
.A0 ( sky130_fd_sc_hd__mux2_1_8_X[0] ) ,
|
||||
.A1 ( sky130_fd_sc_hd__mux2_1_7_X[0] ) , .S ( sram[3] ) ,
|
||||
.X ( sky130_fd_sc_hd__mux2_1_9_X[0] ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 BUFT_RR_70 ( .A ( sky130_fd_sc_hd__mux2_1_9_X[0] ) ,
|
||||
.X ( out[0] ) ) ;
|
||||
sky130_fd_sc_hd__inv_8 BINV_R_56 ( .A ( BUF_net_57 ) , .Y ( out[0] ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 BINV_R_57 ( .A ( sky130_fd_sc_hd__mux2_1_9_X[0] ) ,
|
||||
.Y ( BUF_net_57 ) ) ;
|
||||
endmodule
|
||||
|
||||
|
||||
|
|
@ -1208,7 +1214,7 @@ cby_1__1__mux_tree_tapbuf_size10_0 mux_right_ipin_0 (
|
|||
.sram ( mux_tree_tapbuf_size10_0_sram ) ,
|
||||
.sram_inv ( { SYNOPSYS_UNCONNECTED_1 , SYNOPSYS_UNCONNECTED_2 ,
|
||||
SYNOPSYS_UNCONNECTED_3 , SYNOPSYS_UNCONNECTED_4 } ) ,
|
||||
.out ( left_grid_pin_16_ ) , .p0 ( optlc_net_78 ) ) ;
|
||||
.out ( left_grid_pin_16_ ) , .p0 ( optlc_net_76 ) ) ;
|
||||
cby_1__1__mux_tree_tapbuf_size10_1 mux_right_ipin_3 (
|
||||
.in ( { chany_top_out[1] , chany_bottom_out[1] , chany_top_out[3] ,
|
||||
chany_bottom_out[3] , chany_top_out[7] , chany_bottom_out[7] ,
|
||||
|
|
@ -1217,7 +1223,7 @@ cby_1__1__mux_tree_tapbuf_size10_1 mux_right_ipin_3 (
|
|||
.sram ( mux_tree_tapbuf_size10_1_sram ) ,
|
||||
.sram_inv ( { SYNOPSYS_UNCONNECTED_5 , SYNOPSYS_UNCONNECTED_6 ,
|
||||
SYNOPSYS_UNCONNECTED_7 , SYNOPSYS_UNCONNECTED_8 } ) ,
|
||||
.out ( left_grid_pin_19_ ) , .p0 ( optlc_net_77 ) ) ;
|
||||
.out ( left_grid_pin_19_ ) , .p0 ( optlc_net_75 ) ) ;
|
||||
cby_1__1__mux_tree_tapbuf_size10_2 mux_right_ipin_4 (
|
||||
.in ( { chany_top_out[0] , chany_bottom_out[0] , chany_top_out[2] ,
|
||||
chany_bottom_out[2] , chany_top_out[4] , chany_bottom_out[4] ,
|
||||
|
|
@ -1226,7 +1232,7 @@ cby_1__1__mux_tree_tapbuf_size10_2 mux_right_ipin_4 (
|
|||
.sram ( mux_tree_tapbuf_size10_2_sram ) ,
|
||||
.sram_inv ( { SYNOPSYS_UNCONNECTED_9 , SYNOPSYS_UNCONNECTED_10 ,
|
||||
SYNOPSYS_UNCONNECTED_11 , SYNOPSYS_UNCONNECTED_12 } ) ,
|
||||
.out ( left_grid_pin_20_ ) , .p0 ( optlc_net_77 ) ) ;
|
||||
.out ( left_grid_pin_20_ ) , .p0 ( optlc_net_75 ) ) ;
|
||||
cby_1__1__mux_tree_tapbuf_size10_3 mux_right_ipin_7 (
|
||||
.in ( { chany_top_out[1] , chany_bottom_out[1] , chany_top_out[3] ,
|
||||
chany_bottom_out[3] , chany_top_out[7] , chany_bottom_out[7] ,
|
||||
|
|
@ -1235,7 +1241,7 @@ cby_1__1__mux_tree_tapbuf_size10_3 mux_right_ipin_7 (
|
|||
.sram ( mux_tree_tapbuf_size10_3_sram ) ,
|
||||
.sram_inv ( { SYNOPSYS_UNCONNECTED_13 , SYNOPSYS_UNCONNECTED_14 ,
|
||||
SYNOPSYS_UNCONNECTED_15 , SYNOPSYS_UNCONNECTED_16 } ) ,
|
||||
.out ( left_grid_pin_23_ ) , .p0 ( optlc_net_77 ) ) ;
|
||||
.out ( left_grid_pin_23_ ) , .p0 ( optlc_net_75 ) ) ;
|
||||
cby_1__1__mux_tree_tapbuf_size10_4 mux_right_ipin_8 (
|
||||
.in ( { chany_top_out[0] , chany_bottom_out[0] , chany_top_out[2] ,
|
||||
chany_bottom_out[2] , chany_top_out[8] , chany_bottom_out[8] ,
|
||||
|
|
@ -1244,7 +1250,7 @@ cby_1__1__mux_tree_tapbuf_size10_4 mux_right_ipin_8 (
|
|||
.sram ( mux_tree_tapbuf_size10_4_sram ) ,
|
||||
.sram_inv ( { SYNOPSYS_UNCONNECTED_17 , SYNOPSYS_UNCONNECTED_18 ,
|
||||
SYNOPSYS_UNCONNECTED_19 , SYNOPSYS_UNCONNECTED_20 } ) ,
|
||||
.out ( left_grid_pin_24_ ) , .p0 ( optlc_net_77 ) ) ;
|
||||
.out ( left_grid_pin_24_ ) , .p0 ( optlc_net_75 ) ) ;
|
||||
cby_1__1__mux_tree_tapbuf_size10_5 mux_right_ipin_11 (
|
||||
.in ( { chany_top_out[1] , chany_bottom_out[1] , chany_top_out[3] ,
|
||||
chany_bottom_out[3] , chany_top_out[5] , chany_bottom_out[5] ,
|
||||
|
|
@ -1308,9 +1314,8 @@ cby_1__1__mux_tree_tapbuf_size10_mem_6 mem_right_ipin_12 (
|
|||
.mem_out ( mux_tree_tapbuf_size10_6_sram ) ) ;
|
||||
cby_1__1__mux_tree_tapbuf_size10_mem mem_right_ipin_15 (
|
||||
.prog_clk ( prog_clk ) ,
|
||||
.ccff_head ( mux_tree_tapbuf_size8_mem_7_ccff_tail ) ,
|
||||
.ccff_tail ( { copt_net_87 } ) ,
|
||||
.mem_out ( mux_tree_tapbuf_size10_7_sram ) ) ;
|
||||
.ccff_head ( mux_tree_tapbuf_size8_mem_7_ccff_tail ) ,
|
||||
.ccff_tail ( ccff_tail ) , .mem_out ( mux_tree_tapbuf_size10_7_sram ) ) ;
|
||||
cby_1__1__mux_tree_tapbuf_size8_0 mux_right_ipin_1 (
|
||||
.in ( { chany_top_out[1] , chany_bottom_out[1] , chany_top_out[3] ,
|
||||
chany_bottom_out[3] , chany_top_out[5] , chany_bottom_out[5] ,
|
||||
|
|
@ -1326,7 +1331,7 @@ cby_1__1__mux_tree_tapbuf_size8_1 mux_right_ipin_2 (
|
|||
.sram ( mux_tree_tapbuf_size8_1_sram ) ,
|
||||
.sram_inv ( { SYNOPSYS_UNCONNECTED_37 , SYNOPSYS_UNCONNECTED_38 ,
|
||||
SYNOPSYS_UNCONNECTED_39 , SYNOPSYS_UNCONNECTED_40 } ) ,
|
||||
.out ( left_grid_pin_18_ ) , .p0 ( optlc_net_78 ) ) ;
|
||||
.out ( left_grid_pin_18_ ) , .p0 ( optlc_net_76 ) ) ;
|
||||
cby_1__1__mux_tree_tapbuf_size8_2 mux_right_ipin_5 (
|
||||
.in ( { chany_top_out[1] , chany_bottom_out[1] , chany_top_out[3] ,
|
||||
chany_bottom_out[3] , chany_top_out[9] , chany_bottom_out[9] ,
|
||||
|
|
@ -1342,7 +1347,7 @@ cby_1__1__mux_tree_tapbuf_size8_3 mux_right_ipin_6 (
|
|||
.sram ( mux_tree_tapbuf_size8_3_sram ) ,
|
||||
.sram_inv ( { SYNOPSYS_UNCONNECTED_45 , SYNOPSYS_UNCONNECTED_46 ,
|
||||
SYNOPSYS_UNCONNECTED_47 , SYNOPSYS_UNCONNECTED_48 } ) ,
|
||||
.out ( left_grid_pin_22_ ) , .p0 ( optlc_net_77 ) ) ;
|
||||
.out ( left_grid_pin_22_ ) , .p0 ( optlc_net_75 ) ) ;
|
||||
cby_1__1__mux_tree_tapbuf_size8_4 mux_right_ipin_9 (
|
||||
.in ( { chany_top_out[1] , chany_bottom_out[1] , chany_top_out[3] ,
|
||||
chany_bottom_out[3] , chany_top_out[5] , chany_bottom_out[5] ,
|
||||
|
|
@ -1350,7 +1355,7 @@ cby_1__1__mux_tree_tapbuf_size8_4 mux_right_ipin_9 (
|
|||
.sram ( mux_tree_tapbuf_size8_4_sram ) ,
|
||||
.sram_inv ( { SYNOPSYS_UNCONNECTED_49 , SYNOPSYS_UNCONNECTED_50 ,
|
||||
SYNOPSYS_UNCONNECTED_51 , SYNOPSYS_UNCONNECTED_52 } ) ,
|
||||
.out ( left_grid_pin_25_ ) , .p0 ( optlc_net_77 ) ) ;
|
||||
.out ( left_grid_pin_25_ ) , .p0 ( optlc_net_75 ) ) ;
|
||||
cby_1__1__mux_tree_tapbuf_size8_5 mux_right_ipin_10 (
|
||||
.in ( { chany_top_out[0] , chany_bottom_out[0] , chany_top_out[2] ,
|
||||
chany_bottom_out[2] , chany_top_out[6] , chany_bottom_out[6] ,
|
||||
|
|
@ -1358,7 +1363,7 @@ cby_1__1__mux_tree_tapbuf_size8_5 mux_right_ipin_10 (
|
|||
.sram ( mux_tree_tapbuf_size8_5_sram ) ,
|
||||
.sram_inv ( { SYNOPSYS_UNCONNECTED_53 , SYNOPSYS_UNCONNECTED_54 ,
|
||||
SYNOPSYS_UNCONNECTED_55 , SYNOPSYS_UNCONNECTED_56 } ) ,
|
||||
.out ( left_grid_pin_26_ ) , .p0 ( optlc_net_78 ) ) ;
|
||||
.out ( left_grid_pin_26_ ) , .p0 ( optlc_net_76 ) ) ;
|
||||
cby_1__1__mux_tree_tapbuf_size8_6 mux_right_ipin_13 (
|
||||
.in ( { chany_top_out[1] , chany_bottom_out[1] , chany_top_out[3] ,
|
||||
chany_bottom_out[3] , chany_top_out[9] , chany_bottom_out[9] ,
|
||||
|
|
@ -1374,7 +1379,7 @@ cby_1__1__mux_tree_tapbuf_size8 mux_right_ipin_14 (
|
|||
.sram ( mux_tree_tapbuf_size8_7_sram ) ,
|
||||
.sram_inv ( { SYNOPSYS_UNCONNECTED_61 , SYNOPSYS_UNCONNECTED_62 ,
|
||||
SYNOPSYS_UNCONNECTED_63 , SYNOPSYS_UNCONNECTED_64 } ) ,
|
||||
.out ( left_grid_pin_30_ ) , .p0 ( optlc_net_77 ) ) ;
|
||||
.out ( left_grid_pin_30_ ) , .p0 ( optlc_net_75 ) ) ;
|
||||
cby_1__1__mux_tree_tapbuf_size8_mem_0 mem_right_ipin_1 (
|
||||
.prog_clk ( prog_clk ) ,
|
||||
.ccff_head ( mux_tree_tapbuf_size10_mem_0_ccff_tail ) ,
|
||||
|
|
@ -1417,31 +1422,32 @@ cby_1__1__mux_tree_tapbuf_size8_mem mem_right_ipin_14 (
|
|||
.mem_out ( mux_tree_tapbuf_size8_7_sram ) ) ;
|
||||
sky130_fd_sc_hd__buf_1 Test_en_N_FTB01 ( .A ( Test_en_E_in ) ,
|
||||
.X ( aps_rename_505_ ) ) ;
|
||||
sky130_fd_sc_hd__buf_4 Test_en_W_FTB01 ( .A ( Test_en_E_in ) ,
|
||||
.X ( ropt_net_94 ) ) ;
|
||||
sky130_fd_sc_hd__bufbuf_16 Test_en_W_FTB01 ( .A ( Test_en_E_in ) ,
|
||||
.X ( Test_en_W_out ) ) ;
|
||||
sky130_fd_sc_hd__buf_1 Test_en_E_FTB01 ( .A ( Test_en_E_in ) ,
|
||||
.X ( net_net_67 ) ) ;
|
||||
sky130_fd_sc_hd__buf_1 prog_clk_0_FTB00 ( .A ( prog_clk_0_W_in ) ,
|
||||
.X ( net_net_68 ) ) ;
|
||||
sky130_fd_sc_hd__buf_16 prog_clk_0_FTB00 ( .A ( prog_clk_0_W_in ) ,
|
||||
.X ( prog_clk[0] ) ) ;
|
||||
sky130_fd_sc_hd__clkbuf_1 prog_clk_0_S_FTB01 ( .A ( prog_clk_0_W_in ) ,
|
||||
.X ( ctsbuf_net_179 ) ) ;
|
||||
.X ( ctsbuf_net_177 ) ) ;
|
||||
sky130_fd_sc_hd__clkbuf_1 prog_clk_0_N_FTB01 ( .A ( prog_clk_0_W_in ) ,
|
||||
.X ( ctsbuf_net_280 ) ) ;
|
||||
.X ( ctsbuf_net_278 ) ) ;
|
||||
sky130_fd_sc_hd__buf_4 prog_clk_2_S_FTB01 ( .A ( prog_clk_2_S_in ) ,
|
||||
.X ( ropt_net_93 ) ) ;
|
||||
.X ( ropt_net_87 ) ) ;
|
||||
sky130_fd_sc_hd__buf_4 prog_clk_2_N_FTB01 ( .A ( prog_clk_2_S_in ) ,
|
||||
.X ( ZBUF_6_f_1 ) ) ;
|
||||
.X ( aps_rename_506_ ) ) ;
|
||||
sky130_fd_sc_hd__buf_4 prog_clk_3_N_FTB01 ( .A ( prog_clk_3_N_in ) ,
|
||||
.X ( prog_clk_3_N_out ) ) ;
|
||||
.X ( aps_rename_507_ ) ) ;
|
||||
sky130_fd_sc_hd__buf_4 prog_clk_3_S_FTB01 ( .A ( prog_clk_3_N_in ) ,
|
||||
.X ( ropt_net_95 ) ) ;
|
||||
.X ( prog_clk_3_S_out ) ) ;
|
||||
sky130_fd_sc_hd__buf_4 clk_2_S_FTB01 ( .A ( clk_2_S_in ) ,
|
||||
.X ( clk_2_S_out ) ) ;
|
||||
sky130_fd_sc_hd__buf_4 clk_2_N_FTB01 ( .A ( clk_2_S_in ) , .X ( ZBUF_6_f_0 ) ) ;
|
||||
sky130_fd_sc_hd__buf_4 clk_3_N_FTB01 ( .A ( clk_3_N_in ) ,
|
||||
.X ( ropt_net_99 ) ) ;
|
||||
sky130_fd_sc_hd__buf_4 clk_2_N_FTB01 ( .A ( clk_2_S_in ) ,
|
||||
.X ( aps_rename_508_ ) ) ;
|
||||
sky130_fd_sc_hd__buf_1 clk_3_N_FTB01 ( .A ( clk_3_N_in ) ,
|
||||
.X ( aps_rename_509_ ) ) ;
|
||||
sky130_fd_sc_hd__buf_1 clk_3_S_FTB01 ( .A ( clk_3_N_in ) ,
|
||||
.X ( aps_rename_506_ ) ) ;
|
||||
.X ( aps_rename_510_ ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 FTB_17__16 ( .A ( chany_bottom_in[0] ) ,
|
||||
.X ( chany_top_out[0] ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 FTB_18__17 ( .A ( chany_bottom_in[1] ) ,
|
||||
|
|
@ -1522,43 +1528,31 @@ sky130_fd_sc_hd__buf_8 FTB_55__54 ( .A ( chany_top_in[18] ) ,
|
|||
.X ( chany_bottom_out[18] ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 FTB_56__55 ( .A ( chany_top_in[19] ) ,
|
||||
.X ( chany_bottom_out[19] ) ) ;
|
||||
sky130_fd_sc_hd__inv_8 BINV_R_65 ( .A ( BUF_net_66 ) , .Y ( Test_en_N_out ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 BINV_R_66 ( .A ( aps_rename_505_ ) ,
|
||||
.Y ( BUF_net_66 ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 BUFT_RR_67 ( .A ( net_net_67 ) , .X ( Test_en_E_out ) ) ;
|
||||
sky130_fd_sc_hd__inv_6 BINV_R_68 ( .A ( BUF_net_69 ) , .Y ( clk_3_S_out ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 BINV_R_69 ( .A ( aps_rename_506_ ) ,
|
||||
.Y ( BUF_net_69 ) ) ;
|
||||
sky130_fd_sc_hd__conb_1 optlc_79 ( .LO ( SYNOPSYS_UNCONNECTED_65 ) ,
|
||||
sky130_fd_sc_hd__inv_8 BINV_R_66 ( .A ( BUF_net_67 ) , .Y ( Test_en_N_out ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 BINV_R_67 ( .A ( aps_rename_505_ ) ,
|
||||
.Y ( BUF_net_67 ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 BUFT_RR_68 ( .A ( net_net_68 ) , .X ( Test_en_E_out ) ) ;
|
||||
sky130_fd_sc_hd__inv_6 BINV_R_69 ( .A ( BUF_net_70 ) , .Y ( clk_3_S_out ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 BINV_R_70 ( .A ( aps_rename_510_ ) ,
|
||||
.Y ( BUF_net_70 ) ) ;
|
||||
sky130_fd_sc_hd__conb_1 optlc_77 ( .LO ( SYNOPSYS_UNCONNECTED_65 ) ,
|
||||
.HI ( optlc_net_75 ) ) ;
|
||||
sky130_fd_sc_hd__conb_1 optlc_79 ( .LO ( SYNOPSYS_UNCONNECTED_66 ) ,
|
||||
.HI ( optlc_net_76 ) ) ;
|
||||
sky130_fd_sc_hd__conb_1 optlc_81 ( .LO ( SYNOPSYS_UNCONNECTED_66 ) ,
|
||||
.HI ( optlc_net_77 ) ) ;
|
||||
sky130_fd_sc_hd__conb_1 optlc_83 ( .LO ( SYNOPSYS_UNCONNECTED_67 ) ,
|
||||
.HI ( optlc_net_78 ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 ZBUF_6_f_inst_1303 ( .A ( ZBUF_6_f_0 ) ,
|
||||
.X ( clk_2_N_out ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 cts_buf_3471205 ( .A ( ctsbuf_net_179 ) ,
|
||||
.X ( prog_clk_0_S_out ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 cts_buf_3521210 ( .A ( ctsbuf_net_280 ) ,
|
||||
.X ( prog_clk_0_N_out ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 ZBUF_6_f_inst_1304 ( .A ( ZBUF_6_f_1 ) ,
|
||||
.X ( prog_clk_2_N_out ) ) ;
|
||||
sky130_fd_sc_hd__bufbuf_8 copt_h_inst_1325 ( .A ( copt_net_91 ) ,
|
||||
.X ( ccff_tail[0] ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 ropt_mt_inst_1337 ( .A ( ropt_net_99 ) ,
|
||||
sky130_fd_sc_hd__buf_6 ZBUF_4_f_inst_80 ( .A ( aps_rename_509_ ) ,
|
||||
.X ( clk_3_N_out ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1328 ( .A ( copt_net_87 ) ,
|
||||
.X ( copt_net_90 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1329 ( .A ( copt_net_92 ) ,
|
||||
.X ( copt_net_91 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1330 ( .A ( copt_net_90 ) ,
|
||||
.X ( copt_net_92 ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 ropt_mt_inst_1331 ( .A ( ropt_net_93 ) ,
|
||||
sky130_fd_sc_hd__buf_6 ZBUF_4_f_inst_585 ( .A ( aps_rename_508_ ) ,
|
||||
.X ( clk_2_N_out ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 ZBUF_4_f_inst_586 ( .A ( aps_rename_507_ ) ,
|
||||
.X ( prog_clk_3_N_out ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 ZBUF_4_f_inst_587 ( .A ( aps_rename_506_ ) ,
|
||||
.X ( prog_clk_2_N_out ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 ropt_mt_inst_1358 ( .A ( ropt_net_87 ) ,
|
||||
.X ( prog_clk_2_S_out ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 ropt_mt_inst_1332 ( .A ( ropt_net_94 ) ,
|
||||
.X ( Test_en_W_out ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 ropt_mt_inst_1333 ( .A ( ropt_net_95 ) ,
|
||||
.X ( prog_clk_3_S_out ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 cts_buf_3471205 ( .A ( ctsbuf_net_177 ) ,
|
||||
.X ( prog_clk_0_S_out ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 cts_buf_3521210 ( .A ( ctsbuf_net_278 ) ,
|
||||
.X ( prog_clk_0_N_out ) ) ;
|
||||
endmodule
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -115,7 +115,7 @@ cby_1__1__mux_tree_tapbuf_size10_0 mux_right_ipin_0 (
|
|||
.sram ( mux_tree_tapbuf_size10_0_sram ) ,
|
||||
.sram_inv ( { SYNOPSYS_UNCONNECTED_1 , SYNOPSYS_UNCONNECTED_2 ,
|
||||
SYNOPSYS_UNCONNECTED_3 , SYNOPSYS_UNCONNECTED_4 } ) ,
|
||||
.out ( left_grid_pin_16_ ) , .p0 ( optlc_net_78 ) ) ;
|
||||
.out ( left_grid_pin_16_ ) , .p0 ( optlc_net_76 ) ) ;
|
||||
cby_1__1__mux_tree_tapbuf_size10_1 mux_right_ipin_3 (
|
||||
.in ( { chany_top_out[1] , chany_bottom_out[1] , chany_top_out[3] ,
|
||||
chany_bottom_out[3] , chany_top_out[7] , chany_bottom_out[7] ,
|
||||
|
|
@ -124,7 +124,7 @@ cby_1__1__mux_tree_tapbuf_size10_1 mux_right_ipin_3 (
|
|||
.sram ( mux_tree_tapbuf_size10_1_sram ) ,
|
||||
.sram_inv ( { SYNOPSYS_UNCONNECTED_5 , SYNOPSYS_UNCONNECTED_6 ,
|
||||
SYNOPSYS_UNCONNECTED_7 , SYNOPSYS_UNCONNECTED_8 } ) ,
|
||||
.out ( left_grid_pin_19_ ) , .p0 ( optlc_net_77 ) ) ;
|
||||
.out ( left_grid_pin_19_ ) , .p0 ( optlc_net_75 ) ) ;
|
||||
cby_1__1__mux_tree_tapbuf_size10_2 mux_right_ipin_4 (
|
||||
.in ( { chany_top_out[0] , chany_bottom_out[0] , chany_top_out[2] ,
|
||||
chany_bottom_out[2] , chany_top_out[4] , chany_bottom_out[4] ,
|
||||
|
|
@ -133,7 +133,7 @@ cby_1__1__mux_tree_tapbuf_size10_2 mux_right_ipin_4 (
|
|||
.sram ( mux_tree_tapbuf_size10_2_sram ) ,
|
||||
.sram_inv ( { SYNOPSYS_UNCONNECTED_9 , SYNOPSYS_UNCONNECTED_10 ,
|
||||
SYNOPSYS_UNCONNECTED_11 , SYNOPSYS_UNCONNECTED_12 } ) ,
|
||||
.out ( left_grid_pin_20_ ) , .p0 ( optlc_net_77 ) ) ;
|
||||
.out ( left_grid_pin_20_ ) , .p0 ( optlc_net_75 ) ) ;
|
||||
cby_1__1__mux_tree_tapbuf_size10_3 mux_right_ipin_7 (
|
||||
.in ( { chany_top_out[1] , chany_bottom_out[1] , chany_top_out[3] ,
|
||||
chany_bottom_out[3] , chany_top_out[7] , chany_bottom_out[7] ,
|
||||
|
|
@ -142,7 +142,7 @@ cby_1__1__mux_tree_tapbuf_size10_3 mux_right_ipin_7 (
|
|||
.sram ( mux_tree_tapbuf_size10_3_sram ) ,
|
||||
.sram_inv ( { SYNOPSYS_UNCONNECTED_13 , SYNOPSYS_UNCONNECTED_14 ,
|
||||
SYNOPSYS_UNCONNECTED_15 , SYNOPSYS_UNCONNECTED_16 } ) ,
|
||||
.out ( left_grid_pin_23_ ) , .p0 ( optlc_net_77 ) ) ;
|
||||
.out ( left_grid_pin_23_ ) , .p0 ( optlc_net_75 ) ) ;
|
||||
cby_1__1__mux_tree_tapbuf_size10_4 mux_right_ipin_8 (
|
||||
.in ( { chany_top_out[0] , chany_bottom_out[0] , chany_top_out[2] ,
|
||||
chany_bottom_out[2] , chany_top_out[8] , chany_bottom_out[8] ,
|
||||
|
|
@ -151,7 +151,7 @@ cby_1__1__mux_tree_tapbuf_size10_4 mux_right_ipin_8 (
|
|||
.sram ( mux_tree_tapbuf_size10_4_sram ) ,
|
||||
.sram_inv ( { SYNOPSYS_UNCONNECTED_17 , SYNOPSYS_UNCONNECTED_18 ,
|
||||
SYNOPSYS_UNCONNECTED_19 , SYNOPSYS_UNCONNECTED_20 } ) ,
|
||||
.out ( left_grid_pin_24_ ) , .p0 ( optlc_net_77 ) ) ;
|
||||
.out ( left_grid_pin_24_ ) , .p0 ( optlc_net_75 ) ) ;
|
||||
cby_1__1__mux_tree_tapbuf_size10_5 mux_right_ipin_11 (
|
||||
.in ( { chany_top_out[1] , chany_bottom_out[1] , chany_top_out[3] ,
|
||||
chany_bottom_out[3] , chany_top_out[5] , chany_bottom_out[5] ,
|
||||
|
|
@ -215,9 +215,8 @@ cby_1__1__mux_tree_tapbuf_size10_mem_6 mem_right_ipin_12 (
|
|||
.mem_out ( mux_tree_tapbuf_size10_6_sram ) ) ;
|
||||
cby_1__1__mux_tree_tapbuf_size10_mem mem_right_ipin_15 (
|
||||
.prog_clk ( prog_clk ) ,
|
||||
.ccff_head ( mux_tree_tapbuf_size8_mem_7_ccff_tail ) ,
|
||||
.ccff_tail ( { copt_net_87 } ) ,
|
||||
.mem_out ( mux_tree_tapbuf_size10_7_sram ) ) ;
|
||||
.ccff_head ( mux_tree_tapbuf_size8_mem_7_ccff_tail ) ,
|
||||
.ccff_tail ( ccff_tail ) , .mem_out ( mux_tree_tapbuf_size10_7_sram ) ) ;
|
||||
cby_1__1__mux_tree_tapbuf_size8_0 mux_right_ipin_1 (
|
||||
.in ( { chany_top_out[1] , chany_bottom_out[1] , chany_top_out[3] ,
|
||||
chany_bottom_out[3] , chany_top_out[5] , chany_bottom_out[5] ,
|
||||
|
|
@ -233,7 +232,7 @@ cby_1__1__mux_tree_tapbuf_size8_1 mux_right_ipin_2 (
|
|||
.sram ( mux_tree_tapbuf_size8_1_sram ) ,
|
||||
.sram_inv ( { SYNOPSYS_UNCONNECTED_37 , SYNOPSYS_UNCONNECTED_38 ,
|
||||
SYNOPSYS_UNCONNECTED_39 , SYNOPSYS_UNCONNECTED_40 } ) ,
|
||||
.out ( left_grid_pin_18_ ) , .p0 ( optlc_net_78 ) ) ;
|
||||
.out ( left_grid_pin_18_ ) , .p0 ( optlc_net_76 ) ) ;
|
||||
cby_1__1__mux_tree_tapbuf_size8_2 mux_right_ipin_5 (
|
||||
.in ( { chany_top_out[1] , chany_bottom_out[1] , chany_top_out[3] ,
|
||||
chany_bottom_out[3] , chany_top_out[9] , chany_bottom_out[9] ,
|
||||
|
|
@ -249,7 +248,7 @@ cby_1__1__mux_tree_tapbuf_size8_3 mux_right_ipin_6 (
|
|||
.sram ( mux_tree_tapbuf_size8_3_sram ) ,
|
||||
.sram_inv ( { SYNOPSYS_UNCONNECTED_45 , SYNOPSYS_UNCONNECTED_46 ,
|
||||
SYNOPSYS_UNCONNECTED_47 , SYNOPSYS_UNCONNECTED_48 } ) ,
|
||||
.out ( left_grid_pin_22_ ) , .p0 ( optlc_net_77 ) ) ;
|
||||
.out ( left_grid_pin_22_ ) , .p0 ( optlc_net_75 ) ) ;
|
||||
cby_1__1__mux_tree_tapbuf_size8_4 mux_right_ipin_9 (
|
||||
.in ( { chany_top_out[1] , chany_bottom_out[1] , chany_top_out[3] ,
|
||||
chany_bottom_out[3] , chany_top_out[5] , chany_bottom_out[5] ,
|
||||
|
|
@ -257,7 +256,7 @@ cby_1__1__mux_tree_tapbuf_size8_4 mux_right_ipin_9 (
|
|||
.sram ( mux_tree_tapbuf_size8_4_sram ) ,
|
||||
.sram_inv ( { SYNOPSYS_UNCONNECTED_49 , SYNOPSYS_UNCONNECTED_50 ,
|
||||
SYNOPSYS_UNCONNECTED_51 , SYNOPSYS_UNCONNECTED_52 } ) ,
|
||||
.out ( left_grid_pin_25_ ) , .p0 ( optlc_net_77 ) ) ;
|
||||
.out ( left_grid_pin_25_ ) , .p0 ( optlc_net_75 ) ) ;
|
||||
cby_1__1__mux_tree_tapbuf_size8_5 mux_right_ipin_10 (
|
||||
.in ( { chany_top_out[0] , chany_bottom_out[0] , chany_top_out[2] ,
|
||||
chany_bottom_out[2] , chany_top_out[6] , chany_bottom_out[6] ,
|
||||
|
|
@ -265,7 +264,7 @@ cby_1__1__mux_tree_tapbuf_size8_5 mux_right_ipin_10 (
|
|||
.sram ( mux_tree_tapbuf_size8_5_sram ) ,
|
||||
.sram_inv ( { SYNOPSYS_UNCONNECTED_53 , SYNOPSYS_UNCONNECTED_54 ,
|
||||
SYNOPSYS_UNCONNECTED_55 , SYNOPSYS_UNCONNECTED_56 } ) ,
|
||||
.out ( left_grid_pin_26_ ) , .p0 ( optlc_net_78 ) ) ;
|
||||
.out ( left_grid_pin_26_ ) , .p0 ( optlc_net_76 ) ) ;
|
||||
cby_1__1__mux_tree_tapbuf_size8_6 mux_right_ipin_13 (
|
||||
.in ( { chany_top_out[1] , chany_bottom_out[1] , chany_top_out[3] ,
|
||||
chany_bottom_out[3] , chany_top_out[9] , chany_bottom_out[9] ,
|
||||
|
|
@ -281,7 +280,7 @@ cby_1__1__mux_tree_tapbuf_size8 mux_right_ipin_14 (
|
|||
.sram ( mux_tree_tapbuf_size8_7_sram ) ,
|
||||
.sram_inv ( { SYNOPSYS_UNCONNECTED_61 , SYNOPSYS_UNCONNECTED_62 ,
|
||||
SYNOPSYS_UNCONNECTED_63 , SYNOPSYS_UNCONNECTED_64 } ) ,
|
||||
.out ( left_grid_pin_30_ ) , .p0 ( optlc_net_77 ) ) ;
|
||||
.out ( left_grid_pin_30_ ) , .p0 ( optlc_net_75 ) ) ;
|
||||
cby_1__1__mux_tree_tapbuf_size8_mem_0 mem_right_ipin_1 (
|
||||
.prog_clk ( prog_clk ) ,
|
||||
.ccff_head ( mux_tree_tapbuf_size10_mem_0_ccff_tail ) ,
|
||||
|
|
@ -324,31 +323,32 @@ cby_1__1__mux_tree_tapbuf_size8_mem mem_right_ipin_14 (
|
|||
.mem_out ( mux_tree_tapbuf_size8_7_sram ) ) ;
|
||||
sky130_fd_sc_hd__buf_1 Test_en_N_FTB01 ( .A ( Test_en_E_in ) ,
|
||||
.X ( aps_rename_505_ ) ) ;
|
||||
sky130_fd_sc_hd__buf_4 Test_en_W_FTB01 ( .A ( Test_en_E_in ) ,
|
||||
.X ( ropt_net_94 ) ) ;
|
||||
sky130_fd_sc_hd__bufbuf_16 Test_en_W_FTB01 ( .A ( Test_en_E_in ) ,
|
||||
.X ( Test_en_W_out ) ) ;
|
||||
sky130_fd_sc_hd__buf_1 Test_en_E_FTB01 ( .A ( Test_en_E_in ) ,
|
||||
.X ( net_net_67 ) ) ;
|
||||
sky130_fd_sc_hd__buf_1 prog_clk_0_FTB00 ( .A ( prog_clk_0_W_in ) ,
|
||||
.X ( net_net_68 ) ) ;
|
||||
sky130_fd_sc_hd__buf_16 prog_clk_0_FTB00 ( .A ( prog_clk_0_W_in ) ,
|
||||
.X ( prog_clk[0] ) ) ;
|
||||
sky130_fd_sc_hd__clkbuf_1 prog_clk_0_S_FTB01 ( .A ( prog_clk_0_W_in ) ,
|
||||
.X ( ctsbuf_net_179 ) ) ;
|
||||
.X ( ctsbuf_net_177 ) ) ;
|
||||
sky130_fd_sc_hd__clkbuf_1 prog_clk_0_N_FTB01 ( .A ( prog_clk_0_W_in ) ,
|
||||
.X ( ctsbuf_net_280 ) ) ;
|
||||
.X ( ctsbuf_net_278 ) ) ;
|
||||
sky130_fd_sc_hd__buf_4 prog_clk_2_S_FTB01 ( .A ( prog_clk_2_S_in ) ,
|
||||
.X ( ropt_net_93 ) ) ;
|
||||
.X ( ropt_net_87 ) ) ;
|
||||
sky130_fd_sc_hd__buf_4 prog_clk_2_N_FTB01 ( .A ( prog_clk_2_S_in ) ,
|
||||
.X ( ZBUF_6_f_1 ) ) ;
|
||||
.X ( aps_rename_506_ ) ) ;
|
||||
sky130_fd_sc_hd__buf_4 prog_clk_3_N_FTB01 ( .A ( prog_clk_3_N_in ) ,
|
||||
.X ( prog_clk_3_N_out ) ) ;
|
||||
.X ( aps_rename_507_ ) ) ;
|
||||
sky130_fd_sc_hd__buf_4 prog_clk_3_S_FTB01 ( .A ( prog_clk_3_N_in ) ,
|
||||
.X ( ropt_net_95 ) ) ;
|
||||
.X ( prog_clk_3_S_out ) ) ;
|
||||
sky130_fd_sc_hd__buf_4 clk_2_S_FTB01 ( .A ( clk_2_S_in ) ,
|
||||
.X ( clk_2_S_out ) ) ;
|
||||
sky130_fd_sc_hd__buf_4 clk_2_N_FTB01 ( .A ( clk_2_S_in ) , .X ( ZBUF_6_f_0 ) ) ;
|
||||
sky130_fd_sc_hd__buf_4 clk_3_N_FTB01 ( .A ( clk_3_N_in ) ,
|
||||
.X ( ropt_net_99 ) ) ;
|
||||
sky130_fd_sc_hd__buf_4 clk_2_N_FTB01 ( .A ( clk_2_S_in ) ,
|
||||
.X ( aps_rename_508_ ) ) ;
|
||||
sky130_fd_sc_hd__buf_1 clk_3_N_FTB01 ( .A ( clk_3_N_in ) ,
|
||||
.X ( aps_rename_509_ ) ) ;
|
||||
sky130_fd_sc_hd__buf_1 clk_3_S_FTB01 ( .A ( clk_3_N_in ) ,
|
||||
.X ( aps_rename_506_ ) ) ;
|
||||
.X ( aps_rename_510_ ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 FTB_17__16 ( .A ( chany_bottom_in[0] ) ,
|
||||
.X ( chany_top_out[0] ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 FTB_18__17 ( .A ( chany_bottom_in[1] ) ,
|
||||
|
|
@ -429,43 +429,31 @@ sky130_fd_sc_hd__buf_8 FTB_55__54 ( .A ( chany_top_in[18] ) ,
|
|||
.X ( chany_bottom_out[18] ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 FTB_56__55 ( .A ( chany_top_in[19] ) ,
|
||||
.X ( chany_bottom_out[19] ) ) ;
|
||||
sky130_fd_sc_hd__inv_8 BINV_R_65 ( .A ( BUF_net_66 ) , .Y ( Test_en_N_out ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 BINV_R_66 ( .A ( aps_rename_505_ ) ,
|
||||
.Y ( BUF_net_66 ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 BUFT_RR_67 ( .A ( net_net_67 ) , .X ( Test_en_E_out ) ) ;
|
||||
sky130_fd_sc_hd__inv_6 BINV_R_68 ( .A ( BUF_net_69 ) , .Y ( clk_3_S_out ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 BINV_R_69 ( .A ( aps_rename_506_ ) ,
|
||||
.Y ( BUF_net_69 ) ) ;
|
||||
sky130_fd_sc_hd__conb_1 optlc_79 ( .LO ( SYNOPSYS_UNCONNECTED_65 ) ,
|
||||
sky130_fd_sc_hd__inv_8 BINV_R_66 ( .A ( BUF_net_67 ) , .Y ( Test_en_N_out ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 BINV_R_67 ( .A ( aps_rename_505_ ) ,
|
||||
.Y ( BUF_net_67 ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 BUFT_RR_68 ( .A ( net_net_68 ) , .X ( Test_en_E_out ) ) ;
|
||||
sky130_fd_sc_hd__inv_6 BINV_R_69 ( .A ( BUF_net_70 ) , .Y ( clk_3_S_out ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 BINV_R_70 ( .A ( aps_rename_510_ ) ,
|
||||
.Y ( BUF_net_70 ) ) ;
|
||||
sky130_fd_sc_hd__conb_1 optlc_77 ( .LO ( SYNOPSYS_UNCONNECTED_65 ) ,
|
||||
.HI ( optlc_net_75 ) ) ;
|
||||
sky130_fd_sc_hd__conb_1 optlc_79 ( .LO ( SYNOPSYS_UNCONNECTED_66 ) ,
|
||||
.HI ( optlc_net_76 ) ) ;
|
||||
sky130_fd_sc_hd__conb_1 optlc_81 ( .LO ( SYNOPSYS_UNCONNECTED_66 ) ,
|
||||
.HI ( optlc_net_77 ) ) ;
|
||||
sky130_fd_sc_hd__conb_1 optlc_83 ( .LO ( SYNOPSYS_UNCONNECTED_67 ) ,
|
||||
.HI ( optlc_net_78 ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 ZBUF_6_f_inst_1303 ( .A ( ZBUF_6_f_0 ) ,
|
||||
.X ( clk_2_N_out ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 cts_buf_3471205 ( .A ( ctsbuf_net_179 ) ,
|
||||
.X ( prog_clk_0_S_out ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 cts_buf_3521210 ( .A ( ctsbuf_net_280 ) ,
|
||||
.X ( prog_clk_0_N_out ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 ZBUF_6_f_inst_1304 ( .A ( ZBUF_6_f_1 ) ,
|
||||
.X ( prog_clk_2_N_out ) ) ;
|
||||
sky130_fd_sc_hd__bufbuf_8 copt_h_inst_1325 ( .A ( copt_net_91 ) ,
|
||||
.X ( ccff_tail[0] ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 ropt_mt_inst_1337 ( .A ( ropt_net_99 ) ,
|
||||
sky130_fd_sc_hd__buf_6 ZBUF_4_f_inst_80 ( .A ( aps_rename_509_ ) ,
|
||||
.X ( clk_3_N_out ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1328 ( .A ( copt_net_87 ) ,
|
||||
.X ( copt_net_90 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1329 ( .A ( copt_net_92 ) ,
|
||||
.X ( copt_net_91 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1330 ( .A ( copt_net_90 ) ,
|
||||
.X ( copt_net_92 ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 ropt_mt_inst_1331 ( .A ( ropt_net_93 ) ,
|
||||
sky130_fd_sc_hd__buf_6 ZBUF_4_f_inst_585 ( .A ( aps_rename_508_ ) ,
|
||||
.X ( clk_2_N_out ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 ZBUF_4_f_inst_586 ( .A ( aps_rename_507_ ) ,
|
||||
.X ( prog_clk_3_N_out ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 ZBUF_4_f_inst_587 ( .A ( aps_rename_506_ ) ,
|
||||
.X ( prog_clk_2_N_out ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 ropt_mt_inst_1358 ( .A ( ropt_net_87 ) ,
|
||||
.X ( prog_clk_2_S_out ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 ropt_mt_inst_1332 ( .A ( ropt_net_94 ) ,
|
||||
.X ( Test_en_W_out ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 ropt_mt_inst_1333 ( .A ( ropt_net_95 ) ,
|
||||
.X ( prog_clk_3_S_out ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 cts_buf_3471205 ( .A ( ctsbuf_net_177 ) ,
|
||||
.X ( prog_clk_0_S_out ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 cts_buf_3521210 ( .A ( ctsbuf_net_278 ) ,
|
||||
.X ( prog_clk_0_N_out ) ) ;
|
||||
endmodule
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -11,12 +11,19 @@ input [0:0] ccff_head ;
|
|||
output [0:0] ccff_tail ;
|
||||
output [0:0] mem_out ;
|
||||
|
||||
wire copt_net_88 ;
|
||||
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ccff_head[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[0] ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 FTB_18__17 ( .A ( copt_net_90 ) ,
|
||||
.X ( ccff_tail[0] ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1312 ( .A ( mem_out[0] ) ,
|
||||
.X ( copt_net_90 ) ) ;
|
||||
.CLK ( prog_clk[0] ) , .Q ( copt_net_88 ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 FTB_18__17 ( .A ( copt_net_89 ) , .X ( ccff_tail[0] ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1308 ( .A ( copt_net_88 ) ,
|
||||
.X ( copt_net_86 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1309 ( .A ( copt_net_86 ) ,
|
||||
.X ( copt_net_87 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1310 ( .A ( copt_net_87 ) ,
|
||||
.X ( mem_out[0] ) ) ;
|
||||
sky130_fd_sc_hd__buf_1 copt_h_inst_1311 ( .A ( mem_out[0] ) ,
|
||||
.X ( copt_net_89 ) ) ;
|
||||
endmodule
|
||||
|
||||
|
||||
|
|
@ -30,17 +37,17 @@ input FPGA_OUT ;
|
|||
input FPGA_DIR ;
|
||||
input IO_ISOL_N ;
|
||||
|
||||
sky130_fd_sc_hd__or2b_4 ISOL_EN_GATE ( .A ( FPGA_DIR ) , .B_N ( IO_ISOL_N ) ,
|
||||
.X ( aps_rename_505_ ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 INV_SOC_DIR ( .A ( aps_rename_505_ ) ,
|
||||
.Y ( SOC_DIR_N ) ) ;
|
||||
sky130_fd_sc_hd__nand2b_1 ISOL_EN_GATE ( .A_N ( FPGA_DIR ) ,
|
||||
.B ( IO_ISOL_N ) , .Y ( aps_rename_505_ ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 INV_SOC_DIR ( .A ( BUF_net_59 ) , .Y ( SOC_DIR_N ) ) ;
|
||||
sky130_fd_sc_hd__ebufn_4 IN_PROTECT_GATE ( .A ( SOC_IN ) ,
|
||||
.TE_B ( SOC_DIR_N ) , .Z ( FPGA_IN ) ) ;
|
||||
sky130_fd_sc_hd__ebufn_4 OUT_PROTECT_GATE ( .A ( FPGA_OUT ) ,
|
||||
.TE_B ( aps_rename_505_ ) , .Z ( SOC_OUT ) ) ;
|
||||
sky130_fd_sc_hd__inv_8 BINV_R_59 ( .A ( BUF_net_60 ) , .Y ( SOC_DIR ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 BINV_R_60 ( .A ( aps_rename_505_ ) ,
|
||||
.Y ( BUF_net_60 ) ) ;
|
||||
.TE_B ( BUF_net_59 ) , .Z ( SOC_OUT ) ) ;
|
||||
sky130_fd_sc_hd__inv_4 BINV_R_59 ( .A ( BUF_net_61 ) , .Y ( BUF_net_59 ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 BINV_R_61 ( .A ( aps_rename_505_ ) ,
|
||||
.Y ( BUF_net_61 ) ) ;
|
||||
sky130_fd_sc_hd__inv_6 BINV_R_71 ( .A ( BUF_net_61 ) , .Y ( SOC_DIR ) ) ;
|
||||
endmodule
|
||||
|
||||
|
||||
|
|
@ -105,11 +112,11 @@ output [0:3] mem_out ;
|
|||
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ccff_head[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[0] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_1_ ( .D ( mem_out[0] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_1_ ( .D ( mem_out[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[1] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_2_ ( .D ( mem_out[1] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[2] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_3_ ( .D ( mem_out[2] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_3_ ( .D ( mem_out[2] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[3] ) ) ;
|
||||
sky130_fd_sc_hd__buf_1 FTB_17__16 ( .A ( mem_out[3] ) , .X ( ccff_tail[0] ) ) ;
|
||||
endmodule
|
||||
|
|
@ -122,11 +129,11 @@ input [0:0] ccff_head ;
|
|||
output [0:0] ccff_tail ;
|
||||
output [0:3] mem_out ;
|
||||
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ccff_head[0] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ccff_head[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[0] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_1_ ( .D ( mem_out[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[1] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_2_ ( .D ( mem_out[1] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_2_ ( .D ( mem_out[1] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[2] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_3_ ( .D ( mem_out[2] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[3] ) ) ;
|
||||
|
|
@ -143,7 +150,7 @@ output [0:3] mem_out ;
|
|||
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ccff_head[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[0] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_1_ ( .D ( mem_out[0] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_2 sky130_fd_sc_hd__dfxtp_1_1_ ( .D ( mem_out[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[1] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_2_ ( .D ( mem_out[1] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[2] ) ) ;
|
||||
|
|
@ -181,11 +188,11 @@ output [0:3] mem_out ;
|
|||
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ccff_head[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[0] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_1_ ( .D ( mem_out[0] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_1_ ( .D ( mem_out[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[1] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_2_ ( .D ( mem_out[1] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_2_ ( .D ( mem_out[1] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[2] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_3_ ( .D ( mem_out[2] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_3_ ( .D ( mem_out[2] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[3] ) ) ;
|
||||
sky130_fd_sc_hd__buf_1 FTB_13__12 ( .A ( mem_out[3] ) , .X ( ccff_tail[0] ) ) ;
|
||||
endmodule
|
||||
|
|
@ -198,13 +205,13 @@ input [0:0] ccff_head ;
|
|||
output [0:0] ccff_tail ;
|
||||
output [0:3] mem_out ;
|
||||
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ccff_head[0] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ccff_head[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[0] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_1_ ( .D ( mem_out[0] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_1_ ( .D ( mem_out[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[1] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_2_ ( .D ( mem_out[1] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_2_ ( .D ( mem_out[1] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[2] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_3_ ( .D ( mem_out[2] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_3_ ( .D ( mem_out[2] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[3] ) ) ;
|
||||
sky130_fd_sc_hd__buf_1 FTB_12__11 ( .A ( mem_out[3] ) , .X ( ccff_tail[0] ) ) ;
|
||||
endmodule
|
||||
|
|
@ -219,11 +226,11 @@ output [0:3] mem_out ;
|
|||
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ccff_head[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[0] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_1_ ( .D ( mem_out[0] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_1_ ( .D ( mem_out[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[1] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_2_ ( .D ( mem_out[1] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[2] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_3_ ( .D ( mem_out[2] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_3_ ( .D ( mem_out[2] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[3] ) ) ;
|
||||
sky130_fd_sc_hd__buf_1 FTB_11__10 ( .A ( mem_out[3] ) , .X ( ccff_tail[0] ) ) ;
|
||||
endmodule
|
||||
|
|
@ -236,13 +243,13 @@ input [0:0] ccff_head ;
|
|||
output [0:0] ccff_tail ;
|
||||
output [0:3] mem_out ;
|
||||
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ccff_head[0] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ccff_head[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[0] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_1_ ( .D ( mem_out[0] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_1_ ( .D ( mem_out[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[1] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_2_ ( .D ( mem_out[1] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[2] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_3_ ( .D ( mem_out[2] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_3_ ( .D ( mem_out[2] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[3] ) ) ;
|
||||
sky130_fd_sc_hd__buf_1 FTB_10__9 ( .A ( mem_out[3] ) , .X ( ccff_tail[0] ) ) ;
|
||||
endmodule
|
||||
|
|
@ -440,6 +447,8 @@ wire [0:0] sky130_fd_sc_hd__mux2_1_7_X ;
|
|||
|
||||
cby_2__1__const1_13 const1_0_ (
|
||||
.const1 ( { SYNOPSYS_UNCONNECTED_1 } ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 sky130_fd_sc_hd__buf_4_0_ (
|
||||
.A ( sky130_fd_sc_hd__mux2_1_7_X[0] ) , .X ( out[0] ) ) ;
|
||||
sky130_fd_sc_hd__mux2_1 mux_l1_in_0_ ( .A0 ( in[1] ) , .A1 ( in[0] ) ,
|
||||
.S ( sram[0] ) , .X ( sky130_fd_sc_hd__mux2_1_0_X[0] ) ) ;
|
||||
sky130_fd_sc_hd__mux2_1 mux_l2_in_0_ ( .A0 ( in[2] ) ,
|
||||
|
|
@ -463,8 +472,6 @@ sky130_fd_sc_hd__mux2_1 mux_l4_in_0_ (
|
|||
.A0 ( sky130_fd_sc_hd__mux2_1_6_X[0] ) ,
|
||||
.A1 ( sky130_fd_sc_hd__mux2_1_5_X[0] ) , .S ( sram[3] ) ,
|
||||
.X ( sky130_fd_sc_hd__mux2_1_7_X[0] ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 BUFT_RR_70 ( .A ( sky130_fd_sc_hd__mux2_1_7_X[0] ) ,
|
||||
.X ( out[0] ) ) ;
|
||||
endmodule
|
||||
|
||||
|
||||
|
|
@ -495,8 +502,6 @@ wire [0:0] sky130_fd_sc_hd__mux2_1_7_X ;
|
|||
|
||||
cby_2__1__const1_12 const1_0_ (
|
||||
.const1 ( { SYNOPSYS_UNCONNECTED_1 } ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 sky130_fd_sc_hd__buf_4_0_ (
|
||||
.A ( sky130_fd_sc_hd__mux2_1_7_X[0] ) , .X ( out[0] ) ) ;
|
||||
sky130_fd_sc_hd__mux2_1 mux_l1_in_0_ ( .A0 ( in[1] ) , .A1 ( in[0] ) ,
|
||||
.S ( sram[0] ) , .X ( sky130_fd_sc_hd__mux2_1_0_X[0] ) ) ;
|
||||
sky130_fd_sc_hd__mux2_1 mux_l2_in_0_ ( .A0 ( in[2] ) ,
|
||||
|
|
@ -520,6 +525,8 @@ sky130_fd_sc_hd__mux2_1 mux_l4_in_0_ (
|
|||
.A0 ( sky130_fd_sc_hd__mux2_1_6_X[0] ) ,
|
||||
.A1 ( sky130_fd_sc_hd__mux2_1_5_X[0] ) , .S ( sram[3] ) ,
|
||||
.X ( sky130_fd_sc_hd__mux2_1_7_X[0] ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 BUFT_RR_70 ( .A ( sky130_fd_sc_hd__mux2_1_7_X[0] ) ,
|
||||
.X ( out[0] ) ) ;
|
||||
endmodule
|
||||
|
||||
|
||||
|
|
@ -697,11 +704,11 @@ output [0:3] mem_out ;
|
|||
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ccff_head[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[0] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_1_ ( .D ( mem_out[0] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_1_ ( .D ( mem_out[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[1] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_2_ ( .D ( mem_out[1] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_2_ ( .D ( mem_out[1] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[2] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_3_ ( .D ( mem_out[2] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_3_ ( .D ( mem_out[2] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[3] ) ) ;
|
||||
sky130_fd_sc_hd__buf_1 FTB_9__8 ( .A ( mem_out[3] ) , .X ( ccff_tail[0] ) ) ;
|
||||
endmodule
|
||||
|
|
@ -714,13 +721,13 @@ input [0:0] ccff_head ;
|
|||
output [0:0] ccff_tail ;
|
||||
output [0:3] mem_out ;
|
||||
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ccff_head[0] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_2 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ccff_head[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[0] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_1_ ( .D ( mem_out[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[1] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_2_ ( .D ( mem_out[1] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_2_ ( .D ( mem_out[1] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[2] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_3_ ( .D ( mem_out[2] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_3_ ( .D ( mem_out[2] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[3] ) ) ;
|
||||
sky130_fd_sc_hd__buf_1 FTB_8__7 ( .A ( mem_out[3] ) , .X ( ccff_tail[0] ) ) ;
|
||||
endmodule
|
||||
|
|
@ -752,13 +759,13 @@ input [0:0] ccff_head ;
|
|||
output [0:0] ccff_tail ;
|
||||
output [0:3] mem_out ;
|
||||
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ccff_head[0] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ccff_head[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[0] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_1_ ( .D ( mem_out[0] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_1_ ( .D ( mem_out[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[1] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_2_ ( .D ( mem_out[1] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_2_ ( .D ( mem_out[1] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[2] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_3_ ( .D ( mem_out[2] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_3_ ( .D ( mem_out[2] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[3] ) ) ;
|
||||
sky130_fd_sc_hd__buf_1 FTB_6__5 ( .A ( mem_out[3] ) , .X ( ccff_tail[0] ) ) ;
|
||||
endmodule
|
||||
|
|
@ -773,11 +780,11 @@ output [0:3] mem_out ;
|
|||
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ccff_head[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[0] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_1_ ( .D ( mem_out[0] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_1_ ( .D ( mem_out[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[1] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_2_ ( .D ( mem_out[1] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_2_ ( .D ( mem_out[1] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[2] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_3_ ( .D ( mem_out[2] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_3_ ( .D ( mem_out[2] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[3] ) ) ;
|
||||
sky130_fd_sc_hd__buf_1 FTB_5__4 ( .A ( mem_out[3] ) , .X ( ccff_tail[0] ) ) ;
|
||||
endmodule
|
||||
|
|
@ -796,7 +803,7 @@ sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_1_ ( .D ( mem_out[0] ) ,
|
|||
.CLK ( prog_clk[0] ) , .Q ( mem_out[1] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_2_ ( .D ( mem_out[1] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[2] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_3_ ( .D ( mem_out[2] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_3_ ( .D ( mem_out[2] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[3] ) ) ;
|
||||
sky130_fd_sc_hd__buf_1 FTB_4__3 ( .A ( mem_out[3] ) , .X ( ccff_tail[0] ) ) ;
|
||||
endmodule
|
||||
|
|
@ -809,13 +816,13 @@ input [0:0] ccff_head ;
|
|||
output [0:0] ccff_tail ;
|
||||
output [0:3] mem_out ;
|
||||
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ccff_head[0] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ccff_head[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[0] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_1_ ( .D ( mem_out[0] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_1_ ( .D ( mem_out[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[1] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_2_ ( .D ( mem_out[1] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_2_ ( .D ( mem_out[1] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[2] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_3_ ( .D ( mem_out[2] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_3_ ( .D ( mem_out[2] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[3] ) ) ;
|
||||
sky130_fd_sc_hd__buf_1 FTB_3__2 ( .A ( mem_out[3] ) , .X ( ccff_tail[0] ) ) ;
|
||||
endmodule
|
||||
|
|
@ -828,13 +835,13 @@ input [0:0] ccff_head ;
|
|||
output [0:0] ccff_tail ;
|
||||
output [0:3] mem_out ;
|
||||
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ccff_head[0] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ccff_head[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[0] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_1_ ( .D ( mem_out[0] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_1_ ( .D ( mem_out[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[1] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_2_ ( .D ( mem_out[1] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_2_ ( .D ( mem_out[1] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[2] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_3_ ( .D ( mem_out[2] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_3_ ( .D ( mem_out[2] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[3] ) ) ;
|
||||
sky130_fd_sc_hd__buf_1 FTB_2__1 ( .A ( mem_out[3] ) , .X ( ccff_tail[0] ) ) ;
|
||||
endmodule
|
||||
|
|
@ -847,31 +854,33 @@ input [0:0] ccff_head ;
|
|||
output [0:0] ccff_tail ;
|
||||
output [0:3] mem_out ;
|
||||
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( copt_net_89 ) ,
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_0_ ( .D ( ropt_net_92 ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[0] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_1_ ( .D ( mem_out[0] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[1] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_2_ ( .D ( mem_out[1] ) ,
|
||||
sky130_fd_sc_hd__dfxtp_4 sky130_fd_sc_hd__dfxtp_1_2_ ( .D ( mem_out[1] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[2] ) ) ;
|
||||
sky130_fd_sc_hd__dfxtp_1 sky130_fd_sc_hd__dfxtp_1_3_ ( .D ( mem_out[2] ) ,
|
||||
.CLK ( prog_clk[0] ) , .Q ( mem_out[3] ) ) ;
|
||||
sky130_fd_sc_hd__buf_1 FTB_1__0 ( .A ( mem_out[3] ) , .X ( ccff_tail[0] ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1304 ( .A ( copt_net_86 ) ,
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1301 ( .A ( ropt_net_94 ) ,
|
||||
.X ( copt_net_79 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1302 ( .A ( copt_net_79 ) ,
|
||||
.X ( copt_net_80 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1303 ( .A ( copt_net_80 ) ,
|
||||
.X ( copt_net_81 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1304 ( .A ( ccff_head[0] ) ,
|
||||
.X ( copt_net_82 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd1_1 copt_h_inst_1305 ( .A ( copt_net_85 ) ,
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1305 ( .A ( copt_net_81 ) ,
|
||||
.X ( copt_net_83 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1306 ( .A ( copt_net_87 ) ,
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1306 ( .A ( copt_net_83 ) ,
|
||||
.X ( copt_net_84 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1307 ( .A ( copt_net_84 ) ,
|
||||
.X ( copt_net_85 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd2_1 copt_h_inst_1308 ( .A ( ccff_head[0] ) ,
|
||||
.X ( copt_net_86 ) ) ;
|
||||
sky130_fd_sc_hd__buf_2 copt_h_inst_1309 ( .A ( copt_net_82 ) ,
|
||||
.X ( copt_net_87 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 copt_h_inst_1310 ( .A ( copt_net_83 ) ,
|
||||
.X ( copt_net_88 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd1_1 copt_h_inst_1311 ( .A ( copt_net_88 ) ,
|
||||
.X ( copt_net_89 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd2_1 ropt_h_inst_1314 ( .A ( copt_net_84 ) ,
|
||||
.X ( ropt_net_92 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 ropt_h_inst_1315 ( .A ( copt_net_82 ) ,
|
||||
.X ( ropt_net_93 ) ) ;
|
||||
sky130_fd_sc_hd__dlygate4sd3_1 ropt_h_inst_1316 ( .A ( ropt_net_93 ) ,
|
||||
.X ( ropt_net_94 ) ) ;
|
||||
endmodule
|
||||
|
||||
|
||||
|
|
@ -967,6 +976,8 @@ wire [0:0] sky130_fd_sc_hd__mux2_1_9_X ;
|
|||
|
||||
cby_2__1__const1_7 const1_0_ (
|
||||
.const1 ( { SYNOPSYS_UNCONNECTED_1 } ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 sky130_fd_sc_hd__buf_4_0_ (
|
||||
.A ( sky130_fd_sc_hd__mux2_1_9_X[0] ) , .X ( out[0] ) ) ;
|
||||
sky130_fd_sc_hd__mux2_1 mux_l1_in_0_ ( .A0 ( in[1] ) , .A1 ( in[0] ) ,
|
||||
.S ( sram[0] ) , .X ( sky130_fd_sc_hd__mux2_1_0_X[0] ) ) ;
|
||||
sky130_fd_sc_hd__mux2_1 mux_l1_in_1_ ( .A0 ( in[3] ) , .A1 ( in[2] ) ,
|
||||
|
|
@ -996,9 +1007,6 @@ sky130_fd_sc_hd__mux2_1 mux_l4_in_0_ (
|
|||
.A0 ( sky130_fd_sc_hd__mux2_1_8_X[0] ) ,
|
||||
.A1 ( sky130_fd_sc_hd__mux2_1_7_X[0] ) , .S ( sram[3] ) ,
|
||||
.X ( sky130_fd_sc_hd__mux2_1_9_X[0] ) ) ;
|
||||
sky130_fd_sc_hd__inv_2 BINV_R_67 ( .A ( sky130_fd_sc_hd__mux2_1_9_X[0] ) ,
|
||||
.Y ( BUF_net_67 ) ) ;
|
||||
sky130_fd_sc_hd__inv_6 BINV_R_73 ( .A ( BUF_net_67 ) , .Y ( out[0] ) ) ;
|
||||
endmodule
|
||||
|
||||
|
||||
|
|
@ -1060,9 +1068,9 @@ sky130_fd_sc_hd__mux2_1 mux_l4_in_0_ (
|
|||
.A0 ( sky130_fd_sc_hd__mux2_1_8_X[0] ) ,
|
||||
.A1 ( sky130_fd_sc_hd__mux2_1_7_X[0] ) , .S ( sram[3] ) ,
|
||||
.X ( sky130_fd_sc_hd__mux2_1_9_X[0] ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 BINV_R_65 ( .A ( sky130_fd_sc_hd__mux2_1_9_X[0] ) ,
|
||||
.Y ( BUF_net_65 ) ) ;
|
||||
sky130_fd_sc_hd__inv_6 BINV_R_71 ( .A ( BUF_net_65 ) , .Y ( out[0] ) ) ;
|
||||
sky130_fd_sc_hd__inv_8 BINV_R_66 ( .A ( BUF_net_67 ) , .Y ( out[0] ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 BINV_R_67 ( .A ( sky130_fd_sc_hd__mux2_1_9_X[0] ) ,
|
||||
.Y ( BUF_net_67 ) ) ;
|
||||
endmodule
|
||||
|
||||
|
||||
|
|
@ -1187,9 +1195,9 @@ sky130_fd_sc_hd__mux2_1 mux_l4_in_0_ (
|
|||
.A0 ( sky130_fd_sc_hd__mux2_1_8_X[0] ) ,
|
||||
.A1 ( sky130_fd_sc_hd__mux2_1_7_X[0] ) , .S ( sram[3] ) ,
|
||||
.X ( sky130_fd_sc_hd__mux2_1_9_X[0] ) ) ;
|
||||
sky130_fd_sc_hd__inv_6 BINV_R_62 ( .A ( BUF_net_63 ) , .Y ( out[0] ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 BINV_R_63 ( .A ( sky130_fd_sc_hd__mux2_1_9_X[0] ) ,
|
||||
.Y ( BUF_net_63 ) ) ;
|
||||
sky130_fd_sc_hd__inv_6 BINV_R_64 ( .A ( BUF_net_65 ) , .Y ( out[0] ) ) ;
|
||||
sky130_fd_sc_hd__inv_1 BINV_R_65 ( .A ( sky130_fd_sc_hd__mux2_1_9_X[0] ) ,
|
||||
.Y ( BUF_net_65 ) ) ;
|
||||
endmodule
|
||||
|
||||
|
||||
|
|
@ -1251,7 +1259,7 @@ sky130_fd_sc_hd__mux2_1 mux_l4_in_0_ (
|
|||
.A0 ( sky130_fd_sc_hd__mux2_1_8_X[0] ) ,
|
||||
.A1 ( sky130_fd_sc_hd__mux2_1_7_X[0] ) , .S ( sram[3] ) ,
|
||||
.X ( sky130_fd_sc_hd__mux2_1_9_X[0] ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 BUFT_RR_61 ( .A ( sky130_fd_sc_hd__mux2_1_9_X[0] ) ,
|
||||
sky130_fd_sc_hd__buf_6 BUFT_RR_63 ( .A ( sky130_fd_sc_hd__mux2_1_9_X[0] ) ,
|
||||
.X ( out[0] ) ) ;
|
||||
endmodule
|
||||
|
||||
|
|
@ -1348,8 +1356,6 @@ wire [0:0] sky130_fd_sc_hd__mux2_1_9_X ;
|
|||
|
||||
cby_2__1__const1_1 const1_0_ (
|
||||
.const1 ( { SYNOPSYS_UNCONNECTED_1 } ) ) ;
|
||||
sky130_fd_sc_hd__buf_4 sky130_fd_sc_hd__buf_4_0_ (
|
||||
.A ( sky130_fd_sc_hd__mux2_1_9_X[0] ) , .X ( out[0] ) ) ;
|
||||
sky130_fd_sc_hd__mux2_1 mux_l1_in_0_ ( .A0 ( in[1] ) , .A1 ( in[0] ) ,
|
||||
.S ( sram[0] ) , .X ( sky130_fd_sc_hd__mux2_1_0_X[0] ) ) ;
|
||||
sky130_fd_sc_hd__mux2_1 mux_l1_in_1_ ( .A0 ( in[3] ) , .A1 ( in[2] ) ,
|
||||
|
|
@ -1379,6 +1385,8 @@ sky130_fd_sc_hd__mux2_1 mux_l4_in_0_ (
|
|||
.A0 ( sky130_fd_sc_hd__mux2_1_8_X[0] ) ,
|
||||
.A1 ( sky130_fd_sc_hd__mux2_1_7_X[0] ) , .S ( sram[3] ) ,
|
||||
.X ( sky130_fd_sc_hd__mux2_1_9_X[0] ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 BUFT_RR_62 ( .A ( sky130_fd_sc_hd__mux2_1_9_X[0] ) ,
|
||||
.X ( out[0] ) ) ;
|
||||
endmodule
|
||||
|
||||
|
||||
|
|
@ -1537,7 +1545,7 @@ cby_2__1__mux_tree_tapbuf_size10_0 mux_left_ipin_0 (
|
|||
.sram ( mux_tree_tapbuf_size10_0_sram ) ,
|
||||
.sram_inv ( { SYNOPSYS_UNCONNECTED_1 , SYNOPSYS_UNCONNECTED_2 ,
|
||||
SYNOPSYS_UNCONNECTED_3 , SYNOPSYS_UNCONNECTED_4 } ) ,
|
||||
.out ( right_grid_pin_0_ ) , .p0 ( optlc_net_76 ) ) ;
|
||||
.out ( right_grid_pin_0_ ) , .p0 ( optlc_net_74 ) ) ;
|
||||
cby_2__1__mux_tree_tapbuf_size10_1 mux_right_ipin_0 (
|
||||
.in ( { chany_top_out[1] , chany_bottom_out[1] , chany_top_out[3] ,
|
||||
chany_bottom_out[3] , chany_top_out[5] , chany_bottom_out[5] ,
|
||||
|
|
@ -1546,7 +1554,7 @@ cby_2__1__mux_tree_tapbuf_size10_1 mux_right_ipin_0 (
|
|||
.sram ( mux_tree_tapbuf_size10_1_sram ) ,
|
||||
.sram_inv ( { SYNOPSYS_UNCONNECTED_5 , SYNOPSYS_UNCONNECTED_6 ,
|
||||
SYNOPSYS_UNCONNECTED_7 , SYNOPSYS_UNCONNECTED_8 } ) ,
|
||||
.out ( left_grid_pin_16_ ) , .p0 ( optlc_net_77 ) ) ;
|
||||
.out ( left_grid_pin_16_ ) , .p0 ( optlc_net_75 ) ) ;
|
||||
cby_2__1__mux_tree_tapbuf_size10_2 mux_right_ipin_3 (
|
||||
.in ( { chany_top_out[0] , chany_bottom_out[0] , chany_top_out[2] ,
|
||||
chany_bottom_out[2] , chany_top_out[4] , chany_bottom_out[4] ,
|
||||
|
|
@ -1555,7 +1563,7 @@ cby_2__1__mux_tree_tapbuf_size10_2 mux_right_ipin_3 (
|
|||
.sram ( mux_tree_tapbuf_size10_2_sram ) ,
|
||||
.sram_inv ( { SYNOPSYS_UNCONNECTED_9 , SYNOPSYS_UNCONNECTED_10 ,
|
||||
SYNOPSYS_UNCONNECTED_11 , SYNOPSYS_UNCONNECTED_12 } ) ,
|
||||
.out ( left_grid_pin_19_ ) , .p0 ( optlc_net_75 ) ) ;
|
||||
.out ( left_grid_pin_19_ ) , .p0 ( optlc_net_73 ) ) ;
|
||||
cby_2__1__mux_tree_tapbuf_size10_3 mux_right_ipin_4 (
|
||||
.in ( { chany_top_out[1] , chany_bottom_out[1] , chany_top_out[3] ,
|
||||
chany_bottom_out[3] , chany_top_out[5] , chany_bottom_out[5] ,
|
||||
|
|
@ -1564,7 +1572,7 @@ cby_2__1__mux_tree_tapbuf_size10_3 mux_right_ipin_4 (
|
|||
.sram ( mux_tree_tapbuf_size10_3_sram ) ,
|
||||
.sram_inv ( { SYNOPSYS_UNCONNECTED_13 , SYNOPSYS_UNCONNECTED_14 ,
|
||||
SYNOPSYS_UNCONNECTED_15 , SYNOPSYS_UNCONNECTED_16 } ) ,
|
||||
.out ( left_grid_pin_20_ ) , .p0 ( optlc_net_75 ) ) ;
|
||||
.out ( left_grid_pin_20_ ) , .p0 ( optlc_net_73 ) ) ;
|
||||
cby_2__1__mux_tree_tapbuf_size10_4 mux_right_ipin_7 (
|
||||
.in ( { chany_top_out[0] , chany_bottom_out[0] , chany_top_out[2] ,
|
||||
chany_bottom_out[2] , chany_top_out[8] , chany_bottom_out[8] ,
|
||||
|
|
@ -1573,7 +1581,7 @@ cby_2__1__mux_tree_tapbuf_size10_4 mux_right_ipin_7 (
|
|||
.sram ( mux_tree_tapbuf_size10_4_sram ) ,
|
||||
.sram_inv ( { SYNOPSYS_UNCONNECTED_17 , SYNOPSYS_UNCONNECTED_18 ,
|
||||
SYNOPSYS_UNCONNECTED_19 , SYNOPSYS_UNCONNECTED_20 } ) ,
|
||||
.out ( left_grid_pin_23_ ) , .p0 ( optlc_net_78 ) ) ;
|
||||
.out ( left_grid_pin_23_ ) , .p0 ( optlc_net_76 ) ) ;
|
||||
cby_2__1__mux_tree_tapbuf_size10_5 mux_right_ipin_8 (
|
||||
.in ( { chany_top_out[1] , chany_bottom_out[1] , chany_top_out[3] ,
|
||||
chany_bottom_out[3] , chany_top_out[9] , chany_bottom_out[9] ,
|
||||
|
|
@ -1582,7 +1590,7 @@ cby_2__1__mux_tree_tapbuf_size10_5 mux_right_ipin_8 (
|
|||
.sram ( mux_tree_tapbuf_size10_5_sram ) ,
|
||||
.sram_inv ( { SYNOPSYS_UNCONNECTED_21 , SYNOPSYS_UNCONNECTED_22 ,
|
||||
SYNOPSYS_UNCONNECTED_23 , SYNOPSYS_UNCONNECTED_24 } ) ,
|
||||
.out ( left_grid_pin_24_ ) , .p0 ( optlc_net_75 ) ) ;
|
||||
.out ( left_grid_pin_24_ ) , .p0 ( optlc_net_73 ) ) ;
|
||||
cby_2__1__mux_tree_tapbuf_size10_6 mux_right_ipin_11 (
|
||||
.in ( { chany_top_out[0] , chany_bottom_out[0] , chany_top_out[2] ,
|
||||
chany_bottom_out[2] , chany_top_out[6] , chany_bottom_out[6] ,
|
||||
|
|
@ -1591,7 +1599,7 @@ cby_2__1__mux_tree_tapbuf_size10_6 mux_right_ipin_11 (
|
|||
.sram ( mux_tree_tapbuf_size10_6_sram ) ,
|
||||
.sram_inv ( { SYNOPSYS_UNCONNECTED_25 , SYNOPSYS_UNCONNECTED_26 ,
|
||||
SYNOPSYS_UNCONNECTED_27 , SYNOPSYS_UNCONNECTED_28 } ) ,
|
||||
.out ( left_grid_pin_27_ ) , .p0 ( optlc_net_76 ) ) ;
|
||||
.out ( left_grid_pin_27_ ) , .p0 ( optlc_net_74 ) ) ;
|
||||
cby_2__1__mux_tree_tapbuf_size10_7 mux_right_ipin_12 (
|
||||
.in ( { chany_top_out[1] , chany_bottom_out[1] , chany_top_out[3] ,
|
||||
chany_bottom_out[3] , chany_top_out[7] , chany_bottom_out[7] ,
|
||||
|
|
@ -1600,7 +1608,7 @@ cby_2__1__mux_tree_tapbuf_size10_7 mux_right_ipin_12 (
|
|||
.sram ( mux_tree_tapbuf_size10_7_sram ) ,
|
||||
.sram_inv ( { SYNOPSYS_UNCONNECTED_29 , SYNOPSYS_UNCONNECTED_30 ,
|
||||
SYNOPSYS_UNCONNECTED_31 , SYNOPSYS_UNCONNECTED_32 } ) ,
|
||||
.out ( left_grid_pin_28_ ) , .p0 ( optlc_net_77 ) ) ;
|
||||
.out ( left_grid_pin_28_ ) , .p0 ( optlc_net_75 ) ) ;
|
||||
cby_2__1__mux_tree_tapbuf_size10 mux_right_ipin_15 (
|
||||
.in ( { chany_top_out[0] , chany_bottom_out[0] , chany_top_out[2] ,
|
||||
chany_bottom_out[2] , chany_top_out[4] , chany_bottom_out[4] ,
|
||||
|
|
@ -1609,7 +1617,7 @@ cby_2__1__mux_tree_tapbuf_size10 mux_right_ipin_15 (
|
|||
.sram ( mux_tree_tapbuf_size10_8_sram ) ,
|
||||
.sram_inv ( { SYNOPSYS_UNCONNECTED_33 , SYNOPSYS_UNCONNECTED_34 ,
|
||||
SYNOPSYS_UNCONNECTED_35 , SYNOPSYS_UNCONNECTED_36 } ) ,
|
||||
.out ( left_grid_pin_31_ ) , .p0 ( optlc_net_76 ) ) ;
|
||||
.out ( left_grid_pin_31_ ) , .p0 ( optlc_net_73 ) ) ;
|
||||
cby_2__1__mux_tree_tapbuf_size10_mem_0 mem_left_ipin_0 (
|
||||
.prog_clk ( prog_clk ) , .ccff_head ( ccff_head ) ,
|
||||
.ccff_tail ( mux_tree_tapbuf_size10_mem_0_ccff_tail ) ,
|
||||
|
|
@ -1661,7 +1669,7 @@ cby_2__1__mux_tree_tapbuf_size8_0 mux_right_ipin_1 (
|
|||
.sram ( mux_tree_tapbuf_size8_0_sram ) ,
|
||||
.sram_inv ( { SYNOPSYS_UNCONNECTED_37 , SYNOPSYS_UNCONNECTED_38 ,
|
||||
SYNOPSYS_UNCONNECTED_39 , SYNOPSYS_UNCONNECTED_40 } ) ,
|
||||
.out ( left_grid_pin_17_ ) , .p0 ( optlc_net_76 ) ) ;
|
||||
.out ( left_grid_pin_17_ ) , .p0 ( optlc_net_74 ) ) ;
|
||||
cby_2__1__mux_tree_tapbuf_size8_1 mux_right_ipin_2 (
|
||||
.in ( { chany_top_out[1] , chany_bottom_out[1] , chany_top_out[3] ,
|
||||
chany_bottom_out[3] , chany_top_out[7] , chany_bottom_out[7] ,
|
||||
|
|
@ -1669,7 +1677,7 @@ cby_2__1__mux_tree_tapbuf_size8_1 mux_right_ipin_2 (
|
|||
.sram ( mux_tree_tapbuf_size8_1_sram ) ,
|
||||
.sram_inv ( { SYNOPSYS_UNCONNECTED_41 , SYNOPSYS_UNCONNECTED_42 ,
|
||||
SYNOPSYS_UNCONNECTED_43 , SYNOPSYS_UNCONNECTED_44 } ) ,
|
||||
.out ( left_grid_pin_18_ ) , .p0 ( optlc_net_75 ) ) ;
|
||||
.out ( left_grid_pin_18_ ) , .p0 ( optlc_net_73 ) ) ;
|
||||
cby_2__1__mux_tree_tapbuf_size8_2 mux_right_ipin_5 (
|
||||
.in ( { chany_top_out[0] , chany_bottom_out[0] , chany_top_out[2] ,
|
||||
chany_bottom_out[2] , chany_top_out[10] , chany_bottom_out[10] ,
|
||||
|
|
@ -1677,7 +1685,7 @@ cby_2__1__mux_tree_tapbuf_size8_2 mux_right_ipin_5 (
|
|||
.sram ( mux_tree_tapbuf_size8_2_sram ) ,
|
||||
.sram_inv ( { SYNOPSYS_UNCONNECTED_45 , SYNOPSYS_UNCONNECTED_46 ,
|
||||
SYNOPSYS_UNCONNECTED_47 , SYNOPSYS_UNCONNECTED_48 } ) ,
|
||||
.out ( left_grid_pin_21_ ) , .p0 ( optlc_net_78 ) ) ;
|
||||
.out ( left_grid_pin_21_ ) , .p0 ( optlc_net_76 ) ) ;
|
||||
cby_2__1__mux_tree_tapbuf_size8_3 mux_right_ipin_6 (
|
||||
.in ( { chany_top_out[1] , chany_bottom_out[1] , chany_top_out[3] ,
|
||||
chany_bottom_out[3] , chany_top_out[11] , chany_bottom_out[11] ,
|
||||
|
|
@ -1685,7 +1693,7 @@ cby_2__1__mux_tree_tapbuf_size8_3 mux_right_ipin_6 (
|
|||
.sram ( mux_tree_tapbuf_size8_3_sram ) ,
|
||||
.sram_inv ( { SYNOPSYS_UNCONNECTED_49 , SYNOPSYS_UNCONNECTED_50 ,
|
||||
SYNOPSYS_UNCONNECTED_51 , SYNOPSYS_UNCONNECTED_52 } ) ,
|
||||
.out ( left_grid_pin_22_ ) , .p0 ( optlc_net_75 ) ) ;
|
||||
.out ( left_grid_pin_22_ ) , .p0 ( optlc_net_73 ) ) ;
|
||||
cby_2__1__mux_tree_tapbuf_size8_4 mux_right_ipin_9 (
|
||||
.in ( { chany_top_out[0] , chany_bottom_out[0] , chany_top_out[2] ,
|
||||
chany_bottom_out[2] , chany_top_out[6] , chany_bottom_out[6] ,
|
||||
|
|
@ -1693,7 +1701,7 @@ cby_2__1__mux_tree_tapbuf_size8_4 mux_right_ipin_9 (
|
|||
.sram ( mux_tree_tapbuf_size8_4_sram ) ,
|
||||
.sram_inv ( { SYNOPSYS_UNCONNECTED_53 , SYNOPSYS_UNCONNECTED_54 ,
|
||||
SYNOPSYS_UNCONNECTED_55 , SYNOPSYS_UNCONNECTED_56 } ) ,
|
||||
.out ( left_grid_pin_25_ ) , .p0 ( optlc_net_75 ) ) ;
|
||||
.out ( left_grid_pin_25_ ) , .p0 ( optlc_net_73 ) ) ;
|
||||
cby_2__1__mux_tree_tapbuf_size8_5 mux_right_ipin_10 (
|
||||
.in ( { chany_top_out[1] , chany_bottom_out[1] , chany_top_out[3] ,
|
||||
chany_bottom_out[3] , chany_top_out[7] , chany_bottom_out[7] ,
|
||||
|
|
@ -1701,7 +1709,7 @@ cby_2__1__mux_tree_tapbuf_size8_5 mux_right_ipin_10 (
|
|||
.sram ( mux_tree_tapbuf_size8_5_sram ) ,
|
||||
.sram_inv ( { SYNOPSYS_UNCONNECTED_57 , SYNOPSYS_UNCONNECTED_58 ,
|
||||
SYNOPSYS_UNCONNECTED_59 , SYNOPSYS_UNCONNECTED_60 } ) ,
|
||||
.out ( left_grid_pin_26_ ) , .p0 ( optlc_net_77 ) ) ;
|
||||
.out ( left_grid_pin_26_ ) , .p0 ( optlc_net_74 ) ) ;
|
||||
cby_2__1__mux_tree_tapbuf_size8_6 mux_right_ipin_13 (
|
||||
.in ( { chany_top_out[0] , chany_bottom_out[0] , chany_top_out[2] ,
|
||||
chany_bottom_out[2] , chany_top_out[10] , chany_bottom_out[10] ,
|
||||
|
|
@ -1709,7 +1717,7 @@ cby_2__1__mux_tree_tapbuf_size8_6 mux_right_ipin_13 (
|
|||
.sram ( mux_tree_tapbuf_size8_6_sram ) ,
|
||||
.sram_inv ( { SYNOPSYS_UNCONNECTED_61 , SYNOPSYS_UNCONNECTED_62 ,
|
||||
SYNOPSYS_UNCONNECTED_63 , SYNOPSYS_UNCONNECTED_64 } ) ,
|
||||
.out ( left_grid_pin_29_ ) , .p0 ( optlc_net_76 ) ) ;
|
||||
.out ( left_grid_pin_29_ ) , .p0 ( optlc_net_74 ) ) ;
|
||||
cby_2__1__mux_tree_tapbuf_size8 mux_right_ipin_14 (
|
||||
.in ( { chany_top_out[1] , chany_bottom_out[1] , chany_top_out[3] ,
|
||||
chany_bottom_out[3] , chany_top_out[11] , chany_bottom_out[11] ,
|
||||
|
|
@ -1717,7 +1725,7 @@ cby_2__1__mux_tree_tapbuf_size8 mux_right_ipin_14 (
|
|||
.sram ( mux_tree_tapbuf_size8_7_sram ) ,
|
||||
.sram_inv ( { SYNOPSYS_UNCONNECTED_65 , SYNOPSYS_UNCONNECTED_66 ,
|
||||
SYNOPSYS_UNCONNECTED_67 , SYNOPSYS_UNCONNECTED_68 } ) ,
|
||||
.out ( left_grid_pin_30_ ) , .p0 ( optlc_net_75 ) ) ;
|
||||
.out ( left_grid_pin_30_ ) , .p0 ( optlc_net_73 ) ) ;
|
||||
cby_2__1__mux_tree_tapbuf_size8_mem_0 mem_right_ipin_1 (
|
||||
.prog_clk ( prog_clk ) ,
|
||||
.ccff_head ( mux_tree_tapbuf_size10_mem_1_ccff_tail ) ,
|
||||
|
|
@ -1765,14 +1773,14 @@ cby_2__1__logical_tile_io_mode_io_ logical_tile_io_mode_io__0 (
|
|||
.gfpga_pad_EMBEDDED_IO_HD_SOC_DIR ( gfpga_pad_EMBEDDED_IO_HD_SOC_DIR ) ,
|
||||
.io_outpad ( left_width_0_height_0__pin_0_ ) ,
|
||||
.ccff_head ( { ccff_tail_mid } ) ,
|
||||
.io_inpad ( left_width_0_height_0__pin_1_lower ) ,
|
||||
.ccff_tail ( { ropt_net_91 } ) ) ;
|
||||
sky130_fd_sc_hd__buf_2 prog_clk_0_FTB00 ( .A ( prog_clk_0_W_in ) ,
|
||||
.io_inpad ( left_width_0_height_0__pin_1_lower ) ,
|
||||
.ccff_tail ( ccff_tail ) ) ;
|
||||
sky130_fd_sc_hd__buf_1 prog_clk_0_FTB00 ( .A ( prog_clk_0_W_in ) ,
|
||||
.X ( prog_clk[0] ) ) ;
|
||||
sky130_fd_sc_hd__clkbuf_1 prog_clk_0_S_FTB01 ( .A ( prog_clk_0_W_in ) ,
|
||||
.X ( ctsbuf_net_179 ) ) ;
|
||||
.X ( ctsbuf_net_177 ) ) ;
|
||||
sky130_fd_sc_hd__clkbuf_1 prog_clk_0_N_FTB01 ( .A ( prog_clk_0_W_in ) ,
|
||||
.X ( ctsbuf_net_280 ) ) ;
|
||||
.X ( ctsbuf_net_278 ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 FTB_19__18 ( .A ( chany_bottom_in[0] ) ,
|
||||
.X ( chany_top_out[0] ) ) ;
|
||||
sky130_fd_sc_hd__buf_8 FTB_20__19 ( .A ( chany_bottom_in[1] ) ,
|
||||
|
|
@ -1856,22 +1864,18 @@ sky130_fd_sc_hd__buf_8 FTB_58__57 ( .A ( chany_top_in[19] ) ,
|
|||
sky130_fd_sc_hd__buf_6 FTB_59__58 (
|
||||
.A ( left_width_0_height_0__pin_1_lower[0] ) ,
|
||||
.X ( left_width_0_height_0__pin_1_upper[0] ) ) ;
|
||||
sky130_fd_sc_hd__conb_1 optlc_77 ( .LO ( SYNOPSYS_UNCONNECTED_69 ) ,
|
||||
sky130_fd_sc_hd__conb_1 optlc_75 ( .LO ( SYNOPSYS_UNCONNECTED_69 ) ,
|
||||
.HI ( optlc_net_73 ) ) ;
|
||||
sky130_fd_sc_hd__conb_1 optlc_77 ( .LO ( SYNOPSYS_UNCONNECTED_70 ) ,
|
||||
.HI ( optlc_net_74 ) ) ;
|
||||
sky130_fd_sc_hd__conb_1 optlc_79 ( .LO ( SYNOPSYS_UNCONNECTED_71 ) ,
|
||||
.HI ( optlc_net_75 ) ) ;
|
||||
sky130_fd_sc_hd__conb_1 optlc_79 ( .LO ( SYNOPSYS_UNCONNECTED_70 ) ,
|
||||
sky130_fd_sc_hd__conb_1 optlc_81 ( .LO ( SYNOPSYS_UNCONNECTED_72 ) ,
|
||||
.HI ( optlc_net_76 ) ) ;
|
||||
sky130_fd_sc_hd__conb_1 optlc_81 ( .LO ( SYNOPSYS_UNCONNECTED_71 ) ,
|
||||
.HI ( optlc_net_77 ) ) ;
|
||||
sky130_fd_sc_hd__conb_1 optlc_83 ( .LO ( SYNOPSYS_UNCONNECTED_72 ) ,
|
||||
.HI ( optlc_net_78 ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 ropt_h_inst_1313 ( .A ( ropt_net_92 ) ,
|
||||
.X ( ccff_tail[0] ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 cts_buf_3471205 ( .A ( ctsbuf_net_179 ) ,
|
||||
sky130_fd_sc_hd__buf_6 cts_buf_3471203 ( .A ( ctsbuf_net_177 ) ,
|
||||
.X ( prog_clk_0_S_out ) ) ;
|
||||
sky130_fd_sc_hd__buf_6 cts_buf_3521210 ( .A ( ctsbuf_net_280 ) ,
|
||||
sky130_fd_sc_hd__buf_6 cts_buf_3521208 ( .A ( ctsbuf_net_278 ) ,
|
||||
.X ( prog_clk_0_N_out ) ) ;
|
||||
sky130_fd_sc_hd__buf_1 ropt_h_inst_1314 ( .A ( ropt_net_91 ) ,
|
||||
.X ( ropt_net_92 ) ) ;
|
||||
endmodule
|
||||
|
||||
|
||||
|
|
|
|||
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Reference in New Issue