OpenFPGA/openfpga_flow/benchmarks
tangxifan 0b6a9b06f5 [Benchmark] Reorganize counter benchmarks. Move them to a directory and give specific naming regarding their functionality 2021-07-02 10:39:07 -06:00
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MCNC_Verilog Added first draft of fpga_task script 2019-08-09 00:17:06 -06:00
iwls2005 [Benchmark] Add missing RTL for IWLS2005 benchmarks 2021-04-16 16:50:41 -06:00
mcnc_big20 add explicit port mapping support in testbenches; remove dangling ports in benchmarks 2019-11-02 23:03:47 -06:00
micro_benchmark [Benchmark] Reorganize counter benchmarks. Move them to a directory and give specific naming regarding their functionality 2021-07-02 10:39:07 -06:00
quicklogic_tests add shift register test case 2021-03-05 09:06:05 -08:00
vtr_benchmark [Benchmark] Add missing DPRAM module to LU32PEEng 2021-03-22 14:41:38 -06:00