riscv
/
OpenFPGA
mirror of https://github.com/lnis-uofu/OpenFPGA.git
1
0
Fork 0
Code Issues Projects Releases Wiki Activity
OpenFPGA/vpr7_x2p/vpr
History
Aur??Lien ALACCHI de2bc18bbb bugs fixed for shift register benchmark 2018-11-26 16:58:45 -07:00
..
Circuits rename customized vpr7 to vpr7 XML to Production 2018-09-17 23:10:45 -06:00
SRC bugs fixed for shift register benchmark 2018-11-26 16:58:45 -07:00
SpiceNetlists rename customized vpr7 to vpr7 XML to Production 2018-09-17 23:10:45 -06:00
VerilogNetlists rename customized vpr7 to vpr7 XML to Production 2018-09-17 23:10:45 -06:00
Makefile rename customized vpr7 to vpr7 XML to Production 2018-09-17 23:10:45 -06:00
arch.xml Update on the examples to respect the new syntax 2018-11-19 15:50:29 -07:00
go.sh ReadMe modifications to add the beginning of the FPGA-SPICE tutorial 2018-09-27 09:33:39 -06:00
picorv_ace.act Update on the examples to respect the new syntax 2018-11-19 15:50:29 -07:00
picorv_ace.blif Update on the examples to respect the new syntax 2018-11-19 15:50:29 -07:00