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riscv
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OpenFPGA
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https://github.com/lnis-uofu/OpenFPGA.git
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dba48fb171
OpenFPGA
/
openfpga_flow
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tasks
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basic_tests
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clock_network
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tangxifan
fba0a83679
[test] debugging 2-clock network
2023-04-20 14:44:01 +08:00
..
homo_1clock_2layer
/config
[test] now clock network example script supports multiple clocks
2023-04-20 10:56:36 +08:00
homo_1clock_2layer_full_tb
/config
[test] add a new test for clock network: validate full testbench is working
2023-04-20 10:36:08 +08:00
homo_2clock_2layer
/config
[test] debugging 2-clock network
2023-04-20 14:44:01 +08:00