OpenFPGA/openfpga/src
tangxifan b9a0b1cdf8 [core] code format 2024-10-07 14:21:19 -07:00
..
annotation [core] adapt to side var changes 2024-10-07 14:20:48 -07:00
base [core] adapt to side var changes 2024-10-07 14:20:48 -07:00
fabric [core] code format 2024-10-07 14:21:19 -07:00
fpga_bitstream [core] adapt to side var changes 2024-10-07 14:20:48 -07:00
fpga_sdc [core] adapt to side var changes 2024-10-07 14:20:48 -07:00
fpga_spice [core] code format 2024-10-07 14:21:19 -07:00
fpga_verilog [core] code format 2024-10-07 14:21:19 -07:00
mux_lib Merge branch 'master' into xt_clk_arch 2023-04-19 22:17:33 +08:00
repack [core] code format 2024-05-31 18:02:46 -07:00
tile_direct [core] adapt to side var changes 2024-10-07 14:20:48 -07:00
utils [core] adapt to side var changes 2024-10-07 14:20:48 -07:00
vpr_wrapper Fixed typo in vpr-main.cpp 2024-09-06 13:14:59 -05:00
ctag_src.sh [engine] remove warnings 2022-08-18 15:56:18 -07:00
main.cpp [engine] fixed syntax errors 2022-11-23 17:06:27 -08:00
openfpga_shell.i [script] rename shared library name for tcl, so that it is straightforward to load in tcl 2022-12-01 15:59:52 -08:00