AurelienAlacchi 3f5cc59c0a Microbenchmarks of Single-Port RAM and Associated Example Architecture Files as well as Test Cases (#200) ... * Add required files for LUTRAM integration and testing * Add task for lutram * Repair format (tab and space mismatched) * Add disclaimer in architecture file Co-authored-by: Aur??Lien ALACCHI <u1235811@lnissrv4.eng.utah.edu>		2021-01-29 10:19:05 -07:00
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custom_fabric_netlist_location/config	[Flow] Rename OpenFPGA shell script folder name to consistent with naming convention	2020-11-22 16:37:19 -07:00
fabric_key	[Flow] Rename OpenFPGA shell script folder name to consistent with naming convention	2020-11-22 16:37:19 -07:00
fixed_device_support/config	[Flow] Rename OpenFPGA shell script folder name to consistent with naming convention	2020-11-22 16:37:19 -07:00
fixed_simulation_settings/config	[Flow] Rename OpenFPGA shell script folder name to consistent with naming convention	2020-11-22 16:37:19 -07:00
full_testbench	[Test] Add test case for the SCFF usage in configuration chain	2021-01-04 17:30:19 -07:00
generate_fabric	[Bug] Fixed variable file location	2020-11-25 22:44:40 -07:00
generate_testbench/config	[Flow] Rename OpenFPGA shell script folder name to consistent with naming convention	2020-11-22 16:37:19 -07:00
global_tile_ports	[Test] Bug fix in pin constraints	2021-01-19 17:44:05 -07:00
k4_series	Microbenchmarks of Single-Port RAM and Associated Example Architecture Files as well as Test Cases (#200)	2021-01-29 10:19:05 -07:00
preconfig_testbench	[Flow] Rename OpenFPGA shell script folder name to consistent with naming convention	2020-11-22 16:37:19 -07:00
tile_organization	[Test] Add test case for tileable I/O	2020-12-04 16:02:47 -07:00