OpenFPGA/vpr7_x2p/vpr/SRC/fpga_x2p
tangxifan 974af5a2ae Merge branch 'multimode_clb' of https://github.com/LNIS-Projects/OpenFPGA into multimode_clb 2019-04-30 14:30:38 -06:00
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base critical bug fixing 2019-04-30 14:30:17 -06:00
bitstream Update VPR7 X2P with new engine 2019-04-26 12:23:47 -06:00
clb_pin_remap Update VPR7 X2P with new engine 2019-04-26 12:23:47 -06:00
router critical bug fixing 2019-04-30 14:30:17 -06:00
shell Update VPR7 X2P with new engine 2019-04-26 12:23:47 -06:00
spice Update VPR7 X2P with new engine 2019-04-26 12:23:47 -06:00
verilog Create no segment constraint in loop_breaker if none is given by user 2019-04-30 12:30:07 -06:00