48 lines
2.0 KiB
C++
48 lines
2.0 KiB
C++
#ifndef LUT_UTILS_H
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#define LUT_UTILS_H
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/********************************************************************
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* Include header files that are required by function declaration
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*******************************************************************/
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#include <string>
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#include <vector>
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#include <map>
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#include "atom_netlist.h"
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#include "mux_graph.h"
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#include "physical_types.h"
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#include "vpr_device_annotation.h"
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/********************************************************************
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* Function declaration
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*******************************************************************/
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/* begin namespace openfpga */
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namespace openfpga {
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AtomNetlist::TruthTable lut_truth_table_adaption(const AtomNetlist::TruthTable& orig_tt,
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const std::vector<int>& rotated_pin_map);
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std::vector<std::string> truth_table_to_string(const AtomNetlist::TruthTable& tt);
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AtomNetlist::TruthTable build_wired_lut_truth_table(const size_t& lut_size,
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const size_t& wire_input_id);
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AtomNetlist::TruthTable adapt_truth_table_for_frac_lut(const size_t& lut_frac_level,
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const size_t& lut_output_mask,
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const AtomNetlist::TruthTable& truth_table);
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bool lut_truth_table_use_on_set(const AtomNetlist::TruthTable& truth_table);
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std::vector<bool> build_frac_lut_bitstream(const CircuitLibrary& circuit_lib,
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const MuxGraph& lut_mux_graph,
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const VprDeviceAnnotation& device_annotation,
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const std::map<const t_pb_graph_pin*, AtomNetlist::TruthTable>& truth_tables,
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const size_t& default_sram_bit_value);
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bool is_wired_lut(const std::vector<AtomNetId>& input_nets,
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const AtomNetId& output_net);
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} /* end namespace openfpga */
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#endif
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