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riscv
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OpenFPGA
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https://github.com/lnis-uofu/OpenFPGA.git
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7c257ebda7
OpenFPGA
/
fpga_flow
History
Baudouin Chauviere
79f3db9880
removed the now useless tutorial part
2018-12-10 13:57:01 -07:00
..
arch
/fpga_spice
update blif reader to identify clock signals
2018-12-10 13:28:44 -07:00
benchmarks
removed the now useless tutorial part
2018-12-10 13:57:01 -07:00
configs
Changed for the naming
2018-12-08 16:19:38 -07:00
scripts
and in the config path as well
2018-12-06 14:57:32 -07:00
tech
Add the PTM to the benchmark flow
2018-11-21 11:32:34 -07:00
vpr_fpga_spice_conf
Reorganize the code directory
2018-07-26 11:28:21 -06:00
run_fpga_spice_testbench_study.sh
Add Yosys and update flow_flow Perl Script
2018-11-30 21:14:43 -07:00