OpenFPGA/docs/source/arch_lang
tangxifan 78964ce71c update documentation on the through channel 2020-03-27 11:34:39 -06:00
..
figures add documentation on the tileable routing and thru channel support 2020-03-25 16:52:42 -06:00
addon_vpr_syntax.rst update documentation on the through channel 2020-03-27 11:34:39 -06:00
annotate_vpr_arch.rst minor format fix on documentation 2020-03-11 10:22:30 -06:00
circuit_library.rst update documentation on circuit model annotation on VPR architecture 2020-03-10 16:51:50 -06:00
circuit_model_examples.rst reworked circuit model examples in documentation. Now we are consistent to latest syntax 2020-03-10 16:17:20 -06:00
direct_interconnect.rst update documentation in simulation setting syntax 2020-03-09 17:40:33 -06:00
generality.rst update documentation in simulation setting syntax 2020-03-09 17:40:33 -06:00
index.rst update documentation in simulation setting syntax 2020-03-09 17:40:33 -06:00
simulation_setting.rst update general documentation on circuit library 2020-03-10 12:18:12 -06:00
technology_library.rst minor format fix in documentation 2020-03-09 21:25:13 -06:00