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4b852afeac
OpenFPGA
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vpr7_x2p
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vpr
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tangxifan
4b852afeac
skip rotating mirror detection which is too time-consuming
2019-05-25 23:41:46 -06:00
..
.regression_k6_N10_sram_chain_HC.xml
Verilog verification with Travis
2019-05-15 15:57:05 -06:00
.travis_k6_N10_sram_chain_HC.xml
Add travis full path to avoid missing sources
2019-05-16 15:51:10 -06:00
k6_N10_sram_chain_HC_template.xml
skip rotating mirror detection which is too time-consuming
2019-05-25 23:41:46 -06:00