OpenFPGA/docs/source/manual/fpga_verilog/figures
tangxifan ac9046b7d2 [Doc] Remove ``define_simulation.v`` since it is no longer needed. 2021-06-29 15:38:35 -06:00
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fabric_netlist_hierarchy.png Update Verilog fabric netlist documentation 2020-06-11 19:31:08 -06:00
full_testbench_block_diagram.svg [Doc] Update documentation on the testbench organization/waveforms 2021-06-03 16:54:13 -06:00
full_testbench_waveform.svg [Doc] Update documentation on the testbench organization/waveforms 2021-06-03 16:54:13 -06:00
generic_fabric.png Update Verilog fabric netlist documentation 2020-06-11 19:31:08 -06:00
preconfig_module.png [Documentation] Update motivation with new set of figures 2020-09-29 16:52:16 -06:00
verilog_testbench_hierarchy.svg [Doc] Remove ``define_simulation.v`` since it is no longer needed. 2021-06-29 15:38:35 -06:00