OpenFPGA/openfpga/src
tangxifan 6e89943eb4 [core] code format 2024-11-25 16:22:01 -08:00
..
annotation [core] code format 2024-11-25 16:22:01 -08:00
base [core] support bitstream setting to overwrite default mode bits 2024-11-25 15:32:00 -08:00
fabric [core] clang syntax 2024-11-13 16:03:06 -08:00
fpga_bitstream [core] adapt to side var changes 2024-10-07 14:20:48 -07:00
fpga_sdc [core] adapt to side var changes 2024-10-07 14:20:48 -07:00
fpga_spice [core] code format 2024-11-13 16:05:34 -08:00
fpga_verilog [core] code format 2024-11-13 16:05:34 -08:00
mux_lib Enable bitstream generation with flat routing 2024-10-31 01:51:52 -07:00
repack [core] clang syntax 2024-11-13 16:03:06 -08:00
tile_direct [core] code format 2024-11-13 16:05:34 -08:00
utils [core] clang syntax 2024-11-13 16:03:06 -08:00
vpr_wrapper Fixed typo in vpr-main.cpp 2024-09-06 13:14:59 -05:00
ctag_src.sh [engine] remove warnings 2022-08-18 15:56:18 -07:00
main.cpp [engine] fixed syntax errors 2022-11-23 17:06:27 -08:00
openfpga_shell.i [script] rename shared library name for tcl, so that it is straightforward to load in tcl 2022-12-01 15:59:52 -08:00