Commit Graph

24 Commits

Author SHA1 Message Date
tangxifan 1789ce06c4 [doc] update new syntax with example 2024-09-18 17:55:05 -07:00
tangxifan 8a5c33b1d6 [doc] new option for perimeter cb 2024-07-08 19:01:16 -07:00
tangxifan 91f8bb5841 [doc] update figures for ecb 2024-07-07 13:40:01 -07:00
tangxifan 4c6b923b74 [doc] add a figure about ecb 2024-05-21 11:03:58 -07:00
tangxifan 5775187072 [doc] enhance connection block details and restrictions 2024-05-21 10:55:13 -07:00
tangxifan e9673916b2 [doc] add figures for new options in tileable rr graph 2023-11-14 09:56:57 -08:00
tangxifan b56609d210 [doc] more details 2023-09-26 15:11:26 -07:00
tangxifan d9e3392194 [doc] add description about new option ``shrink_boundary`` 2023-08-12 12:25:38 -07:00
tangxifan a01fa7c282 [Doc] Add figures and text to explain the difference between the XML syntax for QuickLogic memory bank 2021-10-04 12:09:42 -07:00
tangxifan d9d959709c [Doc] Add missing figures 2021-09-20 20:31:53 -07:00
tangxifan 9b40e74e25 [Doc] Add example circuit models for multipliers and update technical highlight with links to the examples 2021-05-24 15:24:50 -06:00
tangxifan 21a18069a1 [Doc] Add example circuit about dual-port RAMs to documentation; Updated technical highlights by providing links to the examples 2021-05-24 14:50:55 -06:00
tangxifan b6b98a75b8 [Doc] Add example circuit model about multi-mode flip-flops; Separate data-path FF circuit model and configuration-chain FF circuit model; 2021-05-24 13:03:40 -06:00
tangxifan fb7d76545e [Doc] Patch the schematic of LUT circuit models to be consistent with netlists 2021-03-15 11:40:09 -06:00
tangxifan 1c4dc9f74b [Doc] Update documentation about the super LUT feature 2021-02-10 11:49:59 -07:00
tangxifan 226f6b8d6d [Doc] Update documentation about FF circuit models to show capability in modeling SCFFs 2021-01-04 18:30:04 -07:00
tangxifan 4fe190fa7e [Doc] Bug fix in LUT circuit model documentation 2020-12-04 14:44:27 -07:00
tangxifan 62e804215b [Doc] Add svg figures for LUT examples 2020-11-26 12:35:39 -07:00
tangxifan f6126d1ed6 [Doc] Add illustrative example to diff between global ports definitions 2020-11-12 09:24:39 -07:00
tangxifan c2c384e24b [Doc] update documentation about memory bank definition 2020-10-29 17:04:25 -06:00
tangxifan 639d57016b [Documentation] Update documentation about the multi-region configuration 2020-09-29 15:55:42 -06:00
tangxifan fe2ba7d50a update documentation for standalone configuration protocol 2020-06-11 19:31:13 -06:00
tangxifan de07712a3a update documentation about the frame-based configuration protocol 2020-06-11 19:31:11 -06:00
tangxifan c27d77a418 clean-up documentation for a shallow hierarchy 2020-06-11 19:31:08 -06:00