[doc] update new syntax with example

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tangxifan 2024-09-18 17:55:05 -07:00
parent f6b645fd25
commit 1789ce06c4
3 changed files with 37 additions and 2 deletions

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@ -53,6 +53,7 @@ Here, we focus these common syntax and we will detail special syntax in :ref:`ci
<input_buffer exist="<string>" circuit_model_name="<string>"/>
<output_buffer exist="<string>" circuit_model_name="<string>"/>
<pass_gate_logic type="<string>" circuit_model_name="<string>"/>
<last_stage_pass_gate_logic type="<string>" circuit_model_name="<string>"/>
<port type="<string>" prefix="<string>" lib_name="<string>" size="<int>" default_val="<int>" circuit_model_name="<string>" mode_select="<bool>" is_global="<bool>" is_set="<bool>" is_reset="<bool>" is_config_enable="<bool>"/>
<!-- more ports -->
</circuit_model>
@ -129,12 +130,16 @@ Input and Output Buffers
Pass Gate Logic
^^^^^^^^^^^^^^^
.. note:: pass-gate logic are used in building multiplexers and LUTs.
.. option:: <pass_gate_logic circuit_model_name="<string>"/>
- ``circuit_model_name="<string>"`` Specify the name of the circuit model which is used to implement pass-gate logic, the type of specified circuit model should be ``pass_gate``.
.. note:: pass-gate logic are used in building multiplexers and LUTs.
.. option:: <last_stage_pass_gate_logic circuit_model_name="<string>"/>
- ``circuit_model_name="<string>"`` Specify the name of the circuit model which is used to implement the pass-gate logic at last stage of multiplexer, the type of specified circuit model should be ``pass_gate``. The type of the pass-gate logic circuit model must be a standard cell MUX2!
.. _circuit_library_circuit_port:

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@ -619,6 +619,14 @@ This example shows:
Standard Cell Multiplexer
`````````````````````````
.. _fig_stdcellmux:
.. figure:: ./figures/stdcellmux.png
:width: 100%
:alt: Examples of MUX built with standard cells
An example of a multiplexer built with standard cells: (a) all the MUX2 are the same; (b) the MUX2 at the last stage is a different one
.. code-block:: xml
<circuit_model type="mux" name="mux_stdcell" prefix="mux_stdcell">
@ -631,12 +639,34 @@ Standard Cell Multiplexer
<port type="sram" prefix="sram" size="3"/>
</circuit_model>
This example shows:
This example shows (see an illustative example in :numref:`fig_stdcellmux`(a)):
- A tree-like 4-input CMOS multiplexer built by the standard cell ``MUX2``
- All the inputs will be buffered using the circuit model ``inv1x``
- All the outputs will be buffered using the circuit model ``tapbuf4``
- The multiplexer will have 4 inputs and 3 SRAMs to control which datapath to propagate
Alternatively, user can specify a different standard cell MUX2 at the last stage.
.. code-block:: xml
<circuit_model type="mux" name="mux_stdcell" prefix="mux_stdcell">
<design_technology type="cmos" structure="tree"/>
<input_buffer exist="on" circuit_model_name="inv1x"/>
<output_buffer exist="on" circuit_model_name="tapdrive4"/>
<pass_gate_logic circuit_model_name="MUX2"/>
<last_stage_pass_gate_logic circuit_model_name="MUX2D2"/>
<port type="input" prefix="in" size="4"/>
<port type="output" prefix="out" size="1"/>
<port type="sram" prefix="sram" size="3"/>
</circuit_model>
This example shows (see an illustative example in :numref:`fig_stdcellmux`(b)):
- A tree-like 4-input CMOS multiplexer built by the standard cell ``MUX2``
- The last stage A tree-like 4-input CMOS multiplexer built by the standard cell ``MUX2``
- All the inputs will be buffered using the circuit model ``inv1x``
- All the outputs will be buffered using the circuit model ``tapbuf4``
- The multiplexer will have 4 inputs and 3 SRAMs to control which datapath to propagate
.. _circuit_model_mux_multilevel_example:
Multi-level Multiplexer

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