tangxifan
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69306faf22
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add a new include netlist for all the fabric-related netlists
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2020-06-11 19:31:01 -06:00 |
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tangxifan
|
65c81e14b2
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add simulation ini file writer
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2020-02-27 18:01:47 -07:00 |
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tangxifan
|
e9adb4fdbc
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add preconfig top module Verilog generation
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2020-02-26 20:38:01 -07:00 |
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tangxifan
|
e37ac8a098
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add grid module Verilog writer
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2020-02-16 16:04:41 -07:00 |
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tangxifan
|
c20caa1fa3
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routing module Verilog writer is online
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2020-02-16 14:47:54 -07:00 |
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tangxifan
|
105ccabecc
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adapt memroy writer for verilog
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2020-02-16 12:41:43 -07:00 |
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tangxifan
|
c9d8120ae0
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adapt Verilog mux writer
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2020-02-16 12:35:41 -07:00 |
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tangxifan
|
4cb61e2138
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bring preprocessing flag Verilog netlists online
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2020-02-16 00:03:24 -07:00 |
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tangxifan
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622c7826d1
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start transplanting fpga_verilog
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2020-02-15 15:03:00 -07:00 |