tangxifan
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ff0faeb285
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[Doc] Update documentation about the extended bitstream setting
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2021-03-10 21:41:59 -07:00 |
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tangxifan
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c4d3e7c50c
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[Doc] Update documentation for the new XML syntax in simulation settings
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2021-01-15 12:30:26 -07:00 |
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tangxifan
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0c808bec41
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[Doc] Add clarification for defining multi-bit global tile ports
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2021-01-09 20:00:16 -07:00 |
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tangxifan
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2324edc522
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[Doc] Update documentation for upgraded tile annotation
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2021-01-09 18:55:16 -07:00 |
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tangxifan
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8350b0f911
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[Doc] Update documentation about default value definition in tile annotation
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2020-12-02 17:08:34 -07:00 |
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tangxifan
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f6126d1ed6
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[Doc] Add illustrative example to diff between global ports definitions
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2020-11-12 09:24:39 -07:00 |
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tangxifan
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bc43c876b0
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[Doc] Update documentation for the rules in global port definition for tile ports
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2020-11-11 14:10:11 -07:00 |
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tangxifan
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2c269c532a
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[Doc] Update doc for the global port definition using physical tile port
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2020-11-10 20:48:28 -07:00 |
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tangxifan
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7a2502ddf9
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[documentation] add more guidelines about the vpr-openfpga architecture annotation
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2020-09-02 22:47:14 -06:00 |
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tangxifan
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161d660837
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update documentation for the initial offset when mapping physical pins
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2020-08-19 15:00:46 -06:00 |
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tangxifan
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53f87f44b4
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update documentation for the multi-port support in physical pb_pin
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2020-08-18 12:44:38 -06:00 |
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tangxifan
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de07712a3a
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update documentation about the frame-based configuration protocol
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2020-06-11 19:31:11 -06:00 |
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tangxifan
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c27d77a418
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clean-up documentation for a shallow hierarchy
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2020-06-11 19:31:08 -06:00 |