Commit Graph

21 Commits

Author SHA1 Message Date
tangxifan 24a174c7a4 [engine] fixed syntax errors 2022-11-23 17:06:27 -08:00
tangxifan 07424b1e7f [engine] now main() is encapuslated in a class OpenfpgaShell 2022-11-23 16:52:22 -08:00
tangxifan 6d31b319a2 [engine] update source files subject to code formatting rules 2022-10-06 17:08:50 -07:00
tangxifan c1256ae818 [engine] added command 'pcf2place' to openfpga 2022-07-28 11:30:36 -07:00
tangxifan 2a5bffa6b9 [engine] developing pcf2place integration to openfpga 2022-07-28 10:30:43 -07:00
taoli4rs cfc0d08060 Add constrain_pin_location command in openfpga; add full flow test. 2022-07-20 11:51:00 -07:00
tangxifan d9fda31a9f [Tool] Add --version to openfpga shell option and a command to openfpga shell 2021-01-27 16:03:46 -07:00
tangxifan fd0e73a9bb [Tool] Enhance return code for openfpga shell 2021-01-24 14:48:27 -07:00
tangxifan 8cac3291cb [Tool] Add batch mode to openfpga shell execution 2021-01-24 14:33:58 -07:00
tangxifan 81171a8f97 start transplanting FPGA-SPICE 2020-07-05 12:10:12 -06:00
tangxifan f97e3bfba6 add timer to openfpga shell 2020-07-02 18:02:33 -06:00
tangxifan 5a04da2082 fix memory leakage in openfpga title 2020-04-07 16:14:41 -06:00
tangxifan 637be076dc adding xml writer for device rr_gsb to help debugging the compress routing; current compress routing is not working 2020-03-21 18:49:20 -06:00
tangxifan 092e10afda bring pnr sdc generator online and fixed minor bugs in bitstream writing 2020-02-28 11:14:50 -07:00
tangxifan 8e97443410 start working on repack 2020-02-17 17:57:43 -07:00
tangxifan 8b0df8632c bring fpga verilog create directory online 2020-02-15 20:38:45 -07:00
tangxifan cdb3b6de46 add read_openfpga_arch to OpenFPGA shell 2020-01-23 19:10:53 -07:00
tangxifan 3cb16a2279 move basic commands to separated CXX files 2020-01-23 14:42:49 -07:00
tangxifan ba207ee5a5 start split workload from the main.cpp in openfpga 2020-01-23 13:24:35 -07:00
tangxifan 7909a1ad82 update title for openfpga shell 2020-01-22 20:29:57 -07:00
tangxifan 523f9ac391 start implement openfpga shell and use vpr as a macro 2020-01-22 20:20:10 -07:00