Commit Graph

22 Commits

Author SHA1 Message Date
tangxifan 7b010ba0f4 [Engine] Support programming shift register clock in XML syntax 2021-10-01 11:00:38 -07:00
tangxifan 5f7617b682 [Engine] Clear up compiler warnings in circuit library 2021-09-24 15:18:50 -07:00
tangxifan 7a5dd1bc02 [Tools] Patch circuit library for dummy circuit models without any ports 2021-02-24 10:36:48 -07:00
tangxifan b2984b46ee [Tool] Upgrade libopenfpga to support superLUT-related XML syntax 2021-02-09 21:15:57 -07:00
tangxifan 37c10f0cb5 [Tool] Add mappable I/O support and enhance I/O support 2020-11-04 20:21:49 -07:00
tangxifan 51d96244c6 [OpenFPGA Tool] Remove deprecated XML syntax 2020-09-26 14:30:57 -06:00
tangxifan 8b8ce22fd1 [OpenFPGA Tool] Bug fix for the edge trigger attribute in cirucit library 2020-09-23 20:37:28 -06:00
tangxifan 064678fe32 [OpenFPGA Tool] Add edge triggered attribute to circuit library definition. Better support for using CCFF in frame-based protocol 2020-09-23 20:27:52 -06:00
tangxifan f284f6f8d0 [OPENFPGA LIBRARY] change method names to be consistent with FPGA-SPICE needs 2020-09-20 12:03:10 -06:00
tangxifan c31d36deb6 [Regression Tests] Deploy output buffer only routing multiplexer testcase to CI 2020-09-14 16:16:03 -06:00
tangxifan 9c66a35bf6 [arch language] Now circuit library will automatically identify the default circuit model if needed 2020-08-23 14:06:03 -06:00
tangxifan e2b492f184 add circuit model tech binding 2020-07-13 20:35:10 -06:00
tangxifan 8ac6e10727 bug fix in lut and mux module generation on supporting spypads 2020-04-22 14:41:16 -06:00
tangxifan 5f4e7dc5d4 support gpinput and gpoutput ports in module manager and circuit library 2020-04-05 16:52:21 -06:00
tangxifan ebe46d15a9 add XML parser, writer and linker for configuration protocol data structure 2020-01-18 21:19:20 -07:00
tangxifan d6adfa0821 add XML parsing for delay matrix and wire parasitics for circuit library 2020-01-16 20:14:39 -07:00
tangxifan 2e0ce78054 add XML writing for buffers in circuit library 2020-01-16 17:21:41 -07:00
tangxifan 9ba42cd540 add XML writer for circuit ports 2020-01-16 16:05:11 -07:00
tangxifan 0304d723c0 add XML writer for design technology of a circuit model 2020-01-16 14:45:41 -07:00
tangxifan 3ace7f8ef7 move generic data structures to openfpgautil library 2020-01-16 13:26:55 -07:00
tangxifan 264dc8458d add XML parsing for delay matrix in circuit model 2020-01-15 20:21:53 -07:00
tangxifan 48ecb6e48b immigrate XML parser for circuit_lib to library readarchopenfpga 2020-01-12 18:11:00 -07:00