tangxifan
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092e10afda
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bring pnr sdc generator online and fixed minor bugs in bitstream writing
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2020-02-28 11:14:50 -07:00 |
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tangxifan
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8e97443410
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start working on repack
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2020-02-17 17:57:43 -07:00 |
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tangxifan
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8b0df8632c
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bring fpga verilog create directory online
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2020-02-15 20:38:45 -07:00 |
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tangxifan
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cdb3b6de46
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add read_openfpga_arch to OpenFPGA shell
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2020-01-23 19:10:53 -07:00 |
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tangxifan
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3cb16a2279
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move basic commands to separated CXX files
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2020-01-23 14:42:49 -07:00 |
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tangxifan
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ba207ee5a5
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start split workload from the main.cpp in openfpga
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2020-01-23 13:24:35 -07:00 |
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tangxifan
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7909a1ad82
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update title for openfpga shell
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2020-01-22 20:29:57 -07:00 |
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tangxifan
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523f9ac391
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start implement openfpga shell and use vpr as a macro
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2020-01-22 20:20:10 -07:00 |