Baudouin Chauviere
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33e50bbc8c
|
fix
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2019-10-01 16:54:16 -06:00 |
AurelienUoU
|
056219f180
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Rename SCFF to CCFF, configuration chain flip flop
|
2019-09-26 11:32:57 -06:00 |
|
Baudouin Chauviere
|
63e6ed21b5
|
Fully functional
|
2019-09-13 16:02:06 -06:00 |
tangxifan
|
44d21ebb90
|
fixed a bug in Verilog generator supporting SRAM5T
|
2019-06-13 14:42:39 -06:00 |
|
tangxifan
|
1776ae3ec8
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add explicit port mapping for inverters of memory decoders
|
2019-06-10 17:36:14 -06:00 |
|
tangxifan
|
009e5244d3
|
minor fix on the port direction of configuration peripherals for memory decoders
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2019-06-10 15:39:35 -06:00 |
|
Baudouin Chauviere
|
2019840d7c
|
cleaned unused variables
|
2019-05-13 14:45:02 -06:00 |
|
tangxifan
|
46d44fa42a
|
Update VPR7 X2P with new engine
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2019-04-26 12:23:47 -06:00 |