nadeemyaseen-rs
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1ea56b2d18
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Merge remote-tracking branch 'upstream/master' into update_from_upstream
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2021-11-18 00:00:55 +05:00 |
Aram Kostanyan
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b332a5a1b4
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Added 'basic_tests/verific_test' test-case.
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2021-11-01 18:20:57 +05:00 |
tangxifan
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b2c4e3314e
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[Test] Bug fix in test cases
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2021-10-11 10:28:09 -07:00 |
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tangxifan
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8566e2a0cd
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[Test] Renaming test case to follow naming convention as other fabric key test cases
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2021-10-11 09:56:23 -07:00 |
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tangxifan
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b8b02d37d5
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[Test] Added a new test case to validate the correctness of custom shift register chain through fabric key file
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2021-10-11 09:53:23 -07:00 |
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tangxifan
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6122863548
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[Test] Add a test case to validate the multi-shift-register-chain QL memory bank
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2021-10-09 20:44:28 -07:00 |
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tangxifan
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a1eaacf5a8
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[Test] Reduce the number of benchmarks in the test for fixed shift register clock frequency
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2021-10-06 12:12:15 -07:00 |
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tangxifan
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b98a8ec718
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[Test] Added the dedicated test case for fixed shift register clock frequency
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2021-10-06 12:09:26 -07:00 |
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tangxifan
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b21f212031
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[Test] Replace the multi-region test with the fabric key test because the mutli region of shift-register bank is sensitive to the correctness of fabric key
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2021-10-05 11:39:53 -07:00 |
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tangxifan
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52569f808e
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[Test] Added a test case for QuickLogic memory bank using shift registers in multiple region
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2021-10-05 10:57:33 -07:00 |
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tangxifan
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fa1908511d
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[Test] Added a new test case to validate QuickLogic memory using shift registers with WLR control
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2021-10-04 16:36:20 -07:00 |
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tangxifan
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dda147e234
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[Flow] Add an example simulation setting file for defining programming shift register clocks
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2021-10-01 11:04:23 -07:00 |
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tangxifan
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89a97d83bd
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[Test] Added a new test case for the shift register banks in QuickLogic memory banks
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2021-09-29 16:28:06 -07:00 |
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tangxifan
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4400dae108
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[Test] Bug fix in the wrong arch name
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2021-09-28 11:40:25 -07:00 |
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tangxifan
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dae3554fd4
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[Test] Add a new test case for QL memory bank with flatten BL/WL buses using WLR signals
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2021-09-28 11:27:49 -07:00 |
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tangxifan
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655b195d8b
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[Test] Added a test case to validate the correctness of QL memory bank where BL/WL are flatten on the top level
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2021-09-22 15:56:44 -07:00 |
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tangxifan
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b0aaab9c03
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[Test] Bug fix due to mismatches in device layout between fabric key and VPR settings
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2021-09-22 11:32:13 -07:00 |
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tangxifan
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abfa380333
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[Test] Added a test case to validate the fabric key of 2-region QL memory bank
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2021-09-22 11:27:09 -07:00 |
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tangxifan
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51fc222d61
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[Test] Added a new test case for multi-region QL memory bank
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2021-09-22 10:01:33 -07:00 |
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tangxifan
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1412121541
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[Test] Added a new test to validate the fabric key parser for QL memory bank
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2021-09-21 16:20:24 -07:00 |
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tangxifan
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dc2d1d1c3c
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[Test] Add a new test case to validate the correctness of fabric key file for ql memory bank
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2021-09-21 15:42:20 -07:00 |
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tangxifan
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60fc3ab36c
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[Test] Added a new test case for the WLR memory bank
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2021-09-20 11:20:36 -07:00 |
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tangxifan
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b82cfdf555
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[Test] Add the QL memory bank test to regression test cases
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2021-09-09 09:29:21 -07:00 |
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tangxifan
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64dcdaec61
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[Test] Update all the tasks that use counter benchmark
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2021-07-02 17:29:13 -06:00 |
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tangxifan
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3cbe266c44
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[Test] Bug fix on the test case for multi-mode FF and pin constraints
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2021-07-02 15:27:27 -06:00 |
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tangxifan
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3aacce2a96
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Merge branch 'pin_constraint_polarity' of https://github.com/LNIS-Projects/OpenFPGA into pin_constraint_polarity
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2021-07-02 14:04:42 -06:00 |
Ganesh Gore
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edd5be2cae
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[CI] Added testcase for benchmark variable
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2021-07-02 12:51:34 -06:00 |
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tangxifan
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5286f9ba25
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[Test] Reworked the test case for k4n4 multi-mode FF architecture by including more counter benchmarking
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2021-07-02 11:39:00 -06:00 |
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tangxifan
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9eeec05a1f
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[Test] Bug fix
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2021-06-29 19:55:07 -06:00 |
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tangxifan
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f32ffb6d61
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[Test] Bug fix
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2021-06-29 18:51:28 -06:00 |
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tangxifan
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c6089385b0
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[Misc] Bug fix
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2021-06-29 18:34:41 -06:00 |
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tangxifan
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5f5a03f17f
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[Misc] Bug fix on test cases that were generating both full testbench and preconfigured testbenches
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2021-06-29 18:28:38 -06:00 |
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tangxifan
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2c1692e6dc
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[Test] Bug fix
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2021-06-29 17:54:25 -06:00 |
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tangxifan
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30c2f597f2
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[Test] Added two cases to validate testbench generation without self checking
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2021-06-29 16:06:15 -06:00 |
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tangxifan
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c62666e7c3
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[Test] Use proper template for some failing tests
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2021-06-09 14:24:34 -06:00 |
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tangxifan
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462326aaa5
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[Test] Update full testbench test case for flatten configuration protocol using 'write_full_testbench'
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2021-06-07 21:50:00 -06:00 |
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tangxifan
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5ecd975ec7
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[Test] Bug fix
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2021-06-07 19:20:10 -06:00 |
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tangxifan
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9556f994b4
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[Test] Use 'write_full_testbench' in all the memory bank -related test cases
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2021-06-07 17:49:40 -06:00 |
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tangxifan
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a67196178e
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[Test] Now use 'write_full_testbench' in configuration frame test cases
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2021-06-07 13:58:15 -06:00 |
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tangxifan
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27fa15603a
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[Tool] Patch test case due to changes in the template script
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2021-06-04 18:17:47 -06:00 |
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tangxifan
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5f96d440ec
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[Test] Deploy 'write_full_testbench' openfpga shell script to multi-headed configuration chain with auto-tuned fast configuration
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2021-06-04 11:48:05 -06:00 |
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tangxifan
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ec203d3a5c
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[Test] Deploy 'write_full_testbench' openfpga shell script to all the fast configuration chain test cases
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2021-06-04 11:35:23 -06:00 |
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tangxifan
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2068291de0
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[Test] Now deploy the 'write_full_testbench' openfpga shell script to all the configuration chain test cases
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2021-06-04 11:32:49 -06:00 |
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tangxifan
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aa4e1f5f9a
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[Test] Update test case which uses write_full_testbench openfpga shell script
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2021-06-04 11:29:43 -06:00 |
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tangxifan
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ebe30fc070
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[Test] Deploy write full testbench to multi-head configuration chain test case
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2021-06-03 17:08:33 -06:00 |
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tangxifan
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1e9f6eb439
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[Test] update configuration chain test to use new testbench
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2021-06-03 15:53:27 -06:00 |
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tangxifan
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f1658cb735
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[Test] Deploy blinking to test cases
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2021-05-06 15:17:45 -06:00 |
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tangxifan
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8046b16c15
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[Test] Remove restrictions in the multi-clock test case and deploy new microbenchmarks for testing
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2021-04-21 14:04:34 -06:00 |
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tangxifan
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da95da933b
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[Test] Add pin constraint file to map reset to correct FPGA pins
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2021-04-17 15:04:26 -06:00 |
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tangxifan
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7172fc9ea1
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[Test] Patch test for architecture using asynchronous DFFs
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2021-04-16 20:48:37 -06:00 |