Ganesh Gore
|
f05aede868
|
Added task support for modelsim script
|
2019-11-15 23:23:15 -07:00 |
Ganesh Gore
|
27005d6640
|
Added Modelsim Python Script
|
2019-11-01 18:20:40 -06:00 |
Ganesh Gore
|
d269472daf
|
Updated formality python script
|
2019-09-27 14:00:57 -06:00 |
Ganesh Gore
|
d64bb18346
|
Separated Modelsim tcl script generation
|
2019-09-07 12:36:22 -04:00 |
Ganesh Gore
|
f558437ae1
|
Added task for vpr_blif flow
|
2019-08-25 00:23:39 -06:00 |
Ganesh Gore
|
30cbe38d3d
|
Added Test Modes - Added blif VPR Option
|
2019-08-22 17:00:59 -06:00 |
Ganesh Gore
|
afee2229af
|
Removed unused templates and file from openfpga_flow directory
|
2019-08-19 21:32:52 -06:00 |
Ganesh Gore
|
08b0ef3550
|
Updated validate_command_line_arguments function
+ Checks if valid flow is provided as a argument
+ Command line argument list validated with dependencies provided in configuration file
|
2019-08-19 21:28:23 -06:00 |
Ganesh Gore
|
616d7706c9
|
Added list of intermidiate files filename
|
2019-08-19 19:05:08 -06:00 |
Ganesh Gore
|
8f8707ff98
|
Added option to filter results after parsing
|
2019-08-19 19:04:14 -06:00 |
Ganesh Gore
|
cb5b16c949
|
Moved required files to openfpga folder
|
2019-08-19 18:57:42 -06:00 |
Ganesh Gore
|
5d3708651e
|
Added fpga_flow and fpga_task script
+ Missed local intermediate commits
|
2019-08-15 14:39:58 -06:00 |
Ganesh Gore
|
9ab57d1b2e
|
Added fpga_flow script - Working Yosys
|
2019-08-09 16:49:05 -06:00 |
Ganesh Gore
|
b82369dd96
|
Added first draft of fpga_task script
|
2019-08-09 00:17:06 -06:00 |