tangxifan
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068d9943e7
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update all the templates and regression test cases with simulation settings
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2020-06-11 19:31:16 -06:00 |
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tangxifan
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96b58dfdbb
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use new simulation setting command in openfpga shell
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2020-06-11 19:31:15 -06:00 |
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tangxifan
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bba476fef4
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add explicit port mapping support to Verilog testbench generator
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2020-06-11 19:31:07 -06:00 |
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tangxifan
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1943929353
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add write_fabric_hierarchy to regression tests
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2020-06-11 19:31:04 -06:00 |
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tangxifan
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42cede37fa
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add testcases on generate fabric/testbench only
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2020-06-11 19:31:01 -06:00 |