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[lib] now accept reset and set in programmable clock network

This commit is contained in:
tangxifan 2024-06-25 12:24:46 -07:00
parent fbece49047
commit 66af73e91e
1 changed files with 10 additions and 8 deletions
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18
libs/libarchopenfpga/src/read_xml_tile_annotation.cpp
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@ -89,14 +89,6 @@ static void read_xml_tile_global_port_annotation(
get_attribute(xml_tile, "is_clock", loc_data, pugiutil::ReqOpt::OPTIONAL) get_attribute(xml_tile, "is_clock", loc_data, pugiutil::ReqOpt::OPTIONAL)
.as_bool(false)); .as_bool(false));
/* Get clock tree attributes if this is a clock */
if (tile_annotation.global_port_is_clock(tile_global_port_id)) {
tile_annotation.set_global_port_clock_arch_tree_name(
tile_global_port_id, get_attribute(xml_tile, "clock_arch_tree_name",
loc_data, pugiutil::ReqOpt::OPTIONAL)
.as_string());
}
/* Get is_set attributes */ /* Get is_set attributes */
tile_annotation.set_global_port_is_set( tile_annotation.set_global_port_is_set(
tile_global_port_id, tile_global_port_id,
@ -109,6 +101,16 @@ static void read_xml_tile_global_port_annotation(
get_attribute(xml_tile, "is_reset", loc_data, pugiutil::ReqOpt::OPTIONAL) get_attribute(xml_tile, "is_reset", loc_data, pugiutil::ReqOpt::OPTIONAL)
.as_bool(false)); .as_bool(false));
/* Get clock tree attributes if this is a clock, reset or set */
if (tile_annotation.global_port_is_clock(tile_global_port_id)
|| tile_annotation.global_port_is_reset(tile_global_port_id)
|| tile_annotation.global_port_is_set(tile_global_port_id)) {
tile_annotation.set_global_port_clock_arch_tree_name(
tile_global_port_id, get_attribute(xml_tile, "clock_arch_tree_name",
loc_data, pugiutil::ReqOpt::OPTIONAL)
.as_string());
}
/* Get default_value attributes */ /* Get default_value attributes */
tile_annotation.set_global_port_default_value( tile_annotation.set_global_port_default_value(
tile_global_port_id, tile_global_port_id,