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Merge pull request #237 from lnis-uofu/dev 

Move quicklogic regresssion tests to a dedicated CI run
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ganeshgore 2021-02-16 11:45:33 -07:00 committed by GitHub
parent d4ab913baa 62bf0d0c5d
commit 5828e51144
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2 changed files with 14 additions and 0 deletions
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2
.github/workflows/build.yml vendored
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@ -209,6 +209,7 @@ jobs:
- name: fpga_bitstream_reg_test
- name: fpga_sdc_reg_test
- name: fpga_spice_reg_test
- name: quicklogic_reg_test
steps:
- name: Checkout OpenFPGA repo
uses: actions/checkout@v2
@ -253,6 +254,7 @@ jobs:
- name: fpga_bitstream_reg_test
- name: fpga_sdc_reg_test
- name: fpga_spice_reg_test
- name: quicklogic_reg_test
steps:
- name: Checkout OpenFPGA repo
uses: actions/checkout@v2

12
.github/workflows/quicklogic_reg_test.sh vendored Executable file
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@ -0,0 +1,12 @@
#!/bin/bash
set -e
source openfpga.sh
PYTHON_EXEC=python3.8
###############################################
# OpenFPGA Shell with VPR8
##############################################
echo -e "QuickLogic regression tests";
echo -e "Testing yosys flow using custom ys script for running quicklogic device";
run-task quicklogic_tests/flow_test --debug --show_thread_logs