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[core] now constant_undriven_inputs are force to enable when perimeter_cb is selected

This commit is contained in:
tangxifan 2024-07-04 20:46:38 -07:00
parent 72ee39f178
commit 1f8c2436ef
2 changed files with 3 additions and 6 deletions
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6
openfpga/src/base/openfpga_verilog_template.h
View File

@ -62,11 +62,9 @@ int write_fabric_verilog_template(T& openfpga_ctx, const Command& cmd,
if (g_vpr_ctx.device().arch->perimeter_cb) {
options.set_constant_undriven_inputs(true);
VTR_LOG("Automatically enable the constant_undriven_input option as perimeter connection blocks are seen in FPGA fabric\n");
if (!cmd_context.option_enable(cmd, opt_constant_undriven_inputs)) {
VTR_LOG("User forces to disable the constant_undriven_input option even when perimeter connection blocks are enabled\n");
}
} else {
options.set_constant_undriven_inputs(cmd_context.option_enable(cmd, opt_constant_undriven_inputs));
}
options.set_constant_undriven_inputs(cmd_context.option_enable(cmd, opt_constant_undriven_inputs));
return fpga_fabric_verilog(
openfpga_ctx.mutable_module_graph(),

3
openfpga/src/fpga_verilog/verilog_module_writer.cpp
View File

@ -619,8 +619,7 @@ void write_verilog_module_to_file(
for (std::pair<std::string, std::vector<BasicPort>> port_group :
local_undriven_wires) {
for (const BasicPort& local_undriven_wire : port_group.second) {
fp << generate_verilog_port_constant_values(local_undriven_wire, std::vector<size_t>(local_undriven_wire.get_width(), 0), false) << ";"
<< std::endl;
print_verilog_wire_constant_values(fp, local_undriven_wire, std::vector<size_t>(local_undriven_wire.get_width(), 0));
}
}
}