OpenFPGA/openfpga/src/base/openfpga_build_fabric.cpp

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/********************************************************************
* This file includes functions to compress the hierachy of routing architecture
*******************************************************************/
/* Headers from vtrutil library */
#include "vtr_time.h"
#include "vtr_log.h"
/* Headers from openfpgashell library */
#include "command_exit_codes.h"
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#include "device_rr_gsb.h"
#include "device_rr_gsb_utils.h"
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#include "build_device_module.h"
#include "openfpga_build_fabric.h"
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/* Include global variables of VPR */
#include "globals.h"
/* begin namespace openfpga */
namespace openfpga {
/********************************************************************
* Identify the unique GSBs from the Device RR GSB arrays
* This function should only be called after the GSB builder is done
*******************************************************************/
static
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void compress_routing_hierarchy(OpenfpgaContext& openfpga_ctx,
const bool& verbose_output) {
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vtr::ScopedStartFinishTimer timer("Identify unique General Switch Blocks (GSBs)");
/* Build unique module lists */
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openfpga_ctx.mutable_device_rr_gsb().build_unique_module(g_vpr_ctx.device().rr_graph);
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/* Report the stats */
VTR_LOGV(verbose_output,
"Detected %lu unique X-direction connection blocks from a total of %d (compression rate=%.2f%)\n",
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openfpga_ctx.device_rr_gsb().get_num_cb_unique_module(CHANX),
find_device_rr_gsb_num_cb_modules(openfpga_ctx.device_rr_gsb(), CHANX),
100. * ((float)find_device_rr_gsb_num_cb_modules(openfpga_ctx.device_rr_gsb(), CHANX) / (float)openfpga_ctx.device_rr_gsb().get_num_cb_unique_module(CHANX) - 1.));
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VTR_LOGV(verbose_output,
"Detected %lu unique Y-direction connection blocks from a total of %d (compression rate=%.2f%)\n",
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openfpga_ctx.device_rr_gsb().get_num_cb_unique_module(CHANY),
find_device_rr_gsb_num_cb_modules(openfpga_ctx.device_rr_gsb(), CHANY),
100. * ((float)find_device_rr_gsb_num_cb_modules(openfpga_ctx.device_rr_gsb(), CHANY) / (float)openfpga_ctx.device_rr_gsb().get_num_cb_unique_module(CHANY) - 1.));
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VTR_LOGV(verbose_output,
"Detected %lu unique switch blocks from a total of %d (compression rate=%.2f%)\n",
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openfpga_ctx.device_rr_gsb().get_num_sb_unique_module(),
find_device_rr_gsb_num_sb_modules(openfpga_ctx.device_rr_gsb()),
100. * ((float)find_device_rr_gsb_num_sb_modules(openfpga_ctx.device_rr_gsb()) / (float)openfpga_ctx.device_rr_gsb().get_num_sb_unique_module() - 1.));
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VTR_LOG("Detected %lu unique general switch blocks from a total of %d (compression rate=%.2f%)\n",
openfpga_ctx.device_rr_gsb().get_num_gsb_unique_module(),
find_device_rr_gsb_num_gsb_modules(openfpga_ctx.device_rr_gsb()),
100. * ((float)find_device_rr_gsb_num_gsb_modules(openfpga_ctx.device_rr_gsb()) / (float)openfpga_ctx.device_rr_gsb().get_num_gsb_unique_module() - 1.));
}
/********************************************************************
* Build the module graph for FPGA device
*******************************************************************/
int build_fabric(OpenfpgaContext& openfpga_ctx,
const Command& cmd, const CommandContext& cmd_context) {
CommandOptionId opt_compress_routing = cmd.option("compress_routing");
CommandOptionId opt_duplicate_grid_pin = cmd.option("duplicate_grid_pin");
CommandOptionId opt_verbose = cmd.option("verbose");
if (true == cmd_context.option_enable(cmd, opt_compress_routing)) {
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compress_routing_hierarchy(openfpga_ctx, cmd_context.option_enable(cmd, opt_verbose));
/* Update flow manager to enable compress routing */
openfpga_ctx.mutable_flow_manager().set_compress_routing(true);
}
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VTR_LOG("\n");
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openfpga_ctx.mutable_module_graph() = build_device_module_graph(openfpga_ctx.mutable_io_location_map(),
g_vpr_ctx.device(),
const_cast<const OpenfpgaContext&>(openfpga_ctx),
cmd_context.option_enable(cmd, opt_compress_routing),
cmd_context.option_enable(cmd, opt_duplicate_grid_pin),
cmd_context.option_enable(cmd, opt_verbose));
/* TODO: should identify the error code from internal function execution */
return CMD_EXEC_SUCCESS;
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}
} /* end namespace openfpga */