* Bug: In Katana::BloatProfile::FlatInstance for X & Y calculation of
flattened instances reserse the order of transformation. We must apply
the occurrence path transformation to the instance transformation,
and not the other way around.
Was causing the bug in SNX example.
* Bug: In Katana::BloatProfile::Slice::tagOverloadeds(), the underlying
Gcell was not kept in synch with the instance. This was causing a right
shift of the bloated area.
* New: In Katana::BloatProfile, add the selection of overloaded edges and
failed nets.
Add a flag to KatanaEngine::runGlobalrouter() to choose what failed/
overloaded components to display (selectors).
This commit contains two set of features that should have been commited
separately.
1. Compliance with clang 5.0.1, tested with the RedHat collection
llvm-toolset-7. This allow Coriolis to be compiled under Darwin (MacOS)
with Xcode & macports. The bootstrap install system has been modificated
accordingly.
2. The basic support for routing density driven placement. Related
features are:
* Bloat property. Each Occurrence of an Instance can be individually
bloated. This property not attached to any tool to allow the placer and
router to share it as wanted. Nevertheless, it is defined in Etesian.
* BloatProfile in Katana, add individual Bloat properties to Instances
occurrences based on the East & North overflowed edges of each GCell.
* Support in ToolEngine for a "pass number" of a tool. This pass number
is mainly used to make "per pass" measurements. The MeasureSet system
is improved accordingly to support multiple values of a same measure.
* Embryo of "P&R Conductor" to perform the place & route loop until the
design is successfully placed. May be the first brick of a Silicon
Compiler.
* Change: In boostrap/FindBoostrap.cmake, in setup_boost(), added tag to
the python component for macport (ex: python27).
* Change: In boostrap/build.conf, put etesian before anabatic for
instance occurrence BloatProperty dependency.
Added option support for the "llvm-toolset-7" collection to build
against clang 5.0.1.
* Bug: In Hurricane::getRecord( const pair<T,U>& ), the getSlot<> templates
for first & second arguments must be called with <const T> and <const U>
as the pair itself is const (and not simply <T> & <U>).
* Change: In Hurricane::getSlot() temlate, only use "string" arguments and
not const string&, simpler for template argument deduction.
* Bug: In Hurricane::AnalogCellExtension, the StandardPrivateProperty<>
template has a static member "_name". Clang did show that the template
for this static number has to be put inside the namespace where the
template *is defined* (i.e. Hurricane) instead of the namespace where
it is instanciated (i.e. Analog).
* Bug: In Isobar, Matrix_FromListOfList(), PyInt_AsPlacementStatus() must
be put outside the C linkage back in the Isobar C++ namespace (clang).
* Bug: In Hurricane::DBo::~DBo, and derived add a throw() specification
(clang).
* Bug: In Hurricane::RegularLayer::getEnclosure() & setEnclosure(), change
signature so it matches the one of the base class (clang).
* Bug: In Hurricane::CellPrinter, use double brackets for initializer list
(clang).
* Change: In Hurricane::Breakpoint, reverse the meaning of the error level.
Only error level *lesser or equal* than the stop level will be enabled.
* Bug: In CRL/python/helpers/__init__.loadUserSettings(), must put the
current working directory in the sys.path as in certain configuration
it may not be included.
* Bug: In CRL::ApDriver, DumpSegments(), no longer generate segments when
encountering a RoutingPad on a top-level Pin Occurrence. The segment
was generated in the wrong direction, creating DRC violations on the
"mips_core_flat" example.
* Change: In CRL::Measures, partial re-design of the measurements management.
Now, each kind of measure can accept multiple values put in a vector.
The index is intented to match a tool run number.
* Change: In CRL::Histogram, add support for multiple sets of datas,
indexeds with tool run number.
* Change: In CRL::ToolEngine, add support for multiple pass number, add
addMeasure<> templates for the various data-types.
* Change: In CRL::gdsDriver & CRL::gdsParser(), comment out unused GDS record
name constants.
* New: Etesian::BloatProperty, property to attach to Instance occurrences
that contains the extra number of pitch to add to the cell width.
* Bug: In AutoSegment::CompareByDepthLength, the segment length comparison
was wrong, it was always returning true, which broke the "strick weak
ordering" of the comparison.
This was producing a core-dump in GCell::updateDensity() when sorting
a vector<>. The end() iterator was being dereferenced, leading to the
problem.
* Bug: In Katana::DataSymmetric::checkPairing(), the test for segments
whose axis is perpandicular to the symmetry axis was wrong
("!=" instead of "-").
* New: In Katana/GlobalRoute, new ::selectSegments(), selectOverloadedgcells()
and selectBloatedInstances() to automatically select segments from
overloaded edges, overloaded GCells and bloated cells.
* Change: In KatanaEngine, return a more detailed success state, distinguish
between global and detailed.
Add support for multiple routing iterations.
* New: In cumulus/python/plugins/ConductorPlugin.py, embryo of routing
driven placement.
* Change: In Hurricane::DBo::CompareById, starting from gcc 8, the compare
function is checked inside the STL map<>/set<> so the lhs & rhs arguments
are of the exact type of the Key, even excluding a base class.
So now, in complement of the normal function, we provide a templated
comparison functor in CompareById.
* Bug: In Bora::BoxSet::destroy(), perform the actual destroy only when
the reference count reaches zero.
In Bora::HVBoxSet CTOR, when duplicating the vector<BoxSet*> arguments,
we must increase the refcount of the all the BoxSet.
The refcounting mecanism of the BoxSet & NodeSet is badly implemented
and should need a full reviewing and redesigning.
* Bug: In CRL/python/helpers/__init__.py, in textPythonTrace(), when an
ErrorMessage was catched, the trace parameter was not correctly
extracted leading to an "exception in exception".
* New: In Isobar/PyCell, exported Cell::getNonLeafInstanceOccurrences()
collection.
* New: In Isobar/PyTransformation, type is now built so the tp_compare
is linked to the C++ operator==().
* Change: In Hurricane::SelectionModel, Hurricane::SelectionWidget and
CellWidget, no longer use Occurrences but directly the Selector property.
We also use the Selector to know if an Occurrence is selected by
looking at that property on it's Quark. This avoid a very lengthy
search in vector when there is many elements (say > 10000).
NOTE: This is a bad implementation as there is a confusion between
beeing selected (that is, having a Selector property attached to
an Occurrence Quark) and being actually displayed as selected.
This lead to awkward implatation of the various "toggle" methods.
Have to rethink that more clearly later.
* Bug: In CRL::Histogram, the non-inline template full specialisation
of Measure<Histogram> must not be put in the header but in the module
to avoid multiple definition and link failure. They are actually
real, classic functions.
* New: In CRL/python/helpers.io, vprint() wrapper around print to display
messages according to the verbose level.
In etc/*, add messages in every configuration files so we may know
under which we are running.
* Bug: In EtesianEngine, it was using the vertical track pitch from the
routing gauge, but it may differ from the cell pitch. For example in
"cmos350" the cell step is 10 lambdas while the vertical routing
pitch may be only 8 lambdas.
This bug shows because now we try to use the non-PinOnly routing
gauge for the reference routing gauge.
* Change: In Hurricane::Isobar/PyHurricane.h, make the hash function use
the DBo id whenever possible instead of the object pointer, fall back
to it for standalone objects (Box like one). The DirectHashMethod()
macro generate a C style function (linkage) which call a template
function "getPyHash<>()" that uses a SFINAE mechanism to select
the right variant.
Create two comparison macros DirectCmpByPtrMethod() and
DirectCmpByValueMethod() to customize the comparison for objects that
have C++ operator==(). So now two boxes with the same contents will
be seen equal by Python. For DBo objects we keep the previous
comparison by C++ pointer.
* Change: In CRL::RoutingLayerGauge::getHorizontalGauge(), when selecting
the default gauge, try, if possible to avoid the PinOnly one.
Same goes for the vertical one.
* Bug: In Katana::TrackCost CTOR, symmetric track axis position was wrong,
was using the reference instead of the symmetric.
* Bug: In BoraEngine::updatePlacement(), set up the Dijkstra search halo
to one pitch so it can use immediately neighboring channels.
* New: In BoraEngine, added python startup hook like in Katana. Mainly
to setup debug nets.
* New: In BasicLayer::Material, added "info" kind of material for layers
that are only informationals (i.e. not real GDS one). Created to
store geometric combination of layers, this is a temporary solution.
Have to define a clearer semantic for that.
* New: In CRL/helpers/AnalogTechno.py, new "Count" type for count numbers
that must not go through DbU::Unit converter. They are plain integers,
but stored in DbU::Unit (keeping track of that semantic is left to
the user).
* New: In Analog, added Analog::ResitorFamily & Analog::Resistor classes.
* New: In Analog, added inspector support for all Parameter classes.
* New: In Analog, new FloatParameter class (for resistor value).
* New: In CRL/etc/scn6m_deep_09/devices.py, added resistor device.
* New: In Oroshi, support for Resistors, stub for ResistorSnake generator.
* New: In Bora::DNodeSets, added support for Resistor devices.
* Change: In Bora::DSlicingNode, rename setNFing()/getNFing() into
setBoxSetIndex()/getBoxSetIndex() for semantic coherency.
* New: In Karakaze/python/AnalogDesign.py, added support for Resistor.
Change in addDevice(), the span which was only meaningful for
transistor devices is replaced by a parameter argument.
The parameter argument has to be consistent with the device type.
* Bug: In Technology::getPhysicalRule(), if the named layerdo not exists,
throw an exception instead of silently putting a NULL pointer inside
a rule.
* New: In Hurricane/Analog, new parameters classes for capacitor devices:
- Analog::Matrix, a matrix of null or positives integers to encode
capacitor matrix matching.
- Analog::Capacities, a list of float values for all component of a
multi-capacitor.
* New: In Hurricane::Script, add a "getFileName()" method to get the full
path name of the Python module.
* Change: In Analog::LayoutGenerator, completly remove the logger utility
as it is no longer used. Simply print error messages instead.
* Change: In Analog::MetaCapacitor, rename top & bottom plate 'T' & 'B'.
Accessors renamed in "getTopPlate()" & "getBottomPlate()".
* New: In Analog::MultiCapacitor, complete rewrite. Makes use of the
new parameters "capacities" and "matrix". Dynamically generates it's
terminals as we do not know beforehand how many capacitors could be
put in it.
* Bug: In isobar/PyHurricane.h, in Type object definition, do not prepend
a "Py" to class name (so the keep the C++ name).
* Change: In CRL/etc/scn6m_deep_09/devices.py, add entry for the new
capacitor generator.
* New: In oroshi/python/ParamsMatrix, add a "family" entry in the [0,0]
element to distinguish between transistor, capacitor and resistor.
(this is the matrix of values returned to the LayoutGenerator after
device generation).
Now have one "setGlobalParams()" function per family.
* New: In oroshi/python/Rules.py, added DTR rules needed by capacitors.
Catch exceptions if something wrong append when we extract the rules
from the technology.
* New: In Bora, the devices are no longer *only* transistors, so the
possibles configurations are no longer defined only by a number of
fingers. We must be able to support any kind of range of configuration.
So the explicit range of number of fingers is replaced by a base
class ParameterRange, and it's derived classes:
- Bora::StepParameterRange, to encode the possible number of fingers
of a transistor (the former only possibility).
- Bora::MatrixParameterRange, to encode all the possible matching
scheme for a capacitor. As there is no way to compress it, this
is a vector of Matrix (from Analog).
* Change: In Bora::DSlicingNode::_place(), the ParameterRange has to be set
on the right configuration (through the index) before being called.
The generation parameters are taken from the active item in the
ParameterRange.
* Change: In Bora::NodeSets::create(), iterate over the ParameterRange
to build all the configuration. Adjustement to the routing gauge
pitchs are moved into the DBoxSet CTOR to save a lot of code.
Semantic change: the index in the NodeSets is now the index in
the associated ParameterRange and no longer the number of fingers
of a transistor.
Check that the ParameterRange dynamic class is consitent with the
device family.
* Change: In Bora::DBoxSet, same semantic change as for NodeSets, the
number of finger become an index in ParameterRange.
In DBoxSet::create(), now also perform the abutment box adjustement
to the RoutingGauge, if possible.
* New: In Karakaze/python/AnalogDesign.py, add support for Capacitor
devices.
* In CRL::Cyclop/CMakeLists.txt, add *again* the MOC files to the list
of .cpp . Don't know what is happening here with MOC under Qt 5.
* In CRL/python/helpers.io, cleanly fails if neither PyQt 4 nor PyQt 5 is
found. And tell it directly because this the module tasked to handle
the exceptions/errors...
* In Cumulus/plugins/AboutWindow.py, try PyQt 4 then PyQt 5.
* In documentation/UsersGuide, now tells explicitely that Qt 4 must be
used under RedHat 7 and Qt 5 under Debian.
* New: In bootstrap/coriolisEnv.py, add the "etc" directory to the
PYTHONPATH as initialization are now Python modules.
* New: In Hurricane/analogic, first groundwork for the integration of
PIP/MIM/MOM multi-capacitors. Add C++ and Python interface for the
allocation matrix and the list of capacities values.
* Change: In Hurricane::RegularLayer, add a layer parameter to the
constructor so the association between the RegularLayer and it's
BasicLayer can readily be done.
* Change: In Hurricane::Layer, add a new getCut() accessor to get the
cut layer in ViaLayer.
* Change: In Hurricane::DataBase::get(), the Python wrapper should no
longer consider an error if the data-base has not been created yet.
Just return None.
* Bug: In Isobar::PyLayer::getEnclosure() wrapper, if the overall
enclosure is requested, pass the right parameter to the C++ function.
* Change: In AllianceFramework, make public _bindLibraries() and export
it to the Python interface.
* Change: In AllianceFramework::create(), do not longer call bindLibraries().
This now must be done explicitely and afterwards.
* Change: In AllianceFramework::createLibrary() and
Environement::addSYSTEM_LIBRARY(), minor bug corrections that I don't
recall.
* Change: In SearchPath::prepend(), set the selected index to zero and
return it.
* Change: In CRL::System CTOR, add "etc" to the PYTHONPATH as the
configuration files are now organized as Python modules.
* New: In PyCRL, export the CRL::System singleton, it's creation is no
longer triggered by the one of AllianceFramework.
* New: In CRL/etc/, convert most of the configuration files into the
Python module format. For now, keep the old ".conf", but that are no
longer used.
For the real technologies, we cannot keep the directory name as
"180" or "45" as it not allowed by Python syntax, so we create "node180"
or "node45" instead.
Most of the helpers and coriolisInit.py are no longer used now.
To be removed in future commits after being sure that everything
works...
* Bug: In AutoSegment::makeDogleg(AutoContact*), the layer of the contacts
where badly computed when one end of the original segment was attached
to a non-preferred direction segment (mostly on terminal contacts).
Now use the new AutoContact::updateLayer() method.
* Bug: In Dijkstra::load(), limit symetric search area only if the net
is a symmetric one !
* Change: In Katana/python/katanaInit.py, comply with the new initialisation
scheme.
* Change: In Unicorn/cgt.py, comply to the new inititalization scheme.
* Change: In cumulus various Python scripts remove the call to
helpers.staticInitialization() as they are not needed now (we run in
only *one* interpreter, so we correctly share all init).
In plugins/__init__.py, read the new NDA directory variable.
* Bug: In cumulus/plugins/Chip.doCoronafloorplan(), self.railsNb was not
correctly managed when there was no clock.
* Change: In cumulus/plugins/Configuration.coronaContactArray(), compute
the viaPitch from the technology instead of the hard-coded 4.0 lambdas.
In Configuration.loadConfiguration(), read the "ioring.py" from
the new user's settings module.
* Bug: In stratus.dpgen_ADSB2F, gives coordinates translated into DbU to
the XY functions.
In st_model.Save(), use the VstUseConcat flag to get correct VST files.
In st_net.hur_net(), when a net is POWER/GROUND or CLOCK also make it
global.
* Change: In Oroshi/python/WIP_Transistor.py, encapsulate the generator
inside a try/except block to get prettier error (and stop at the first).
* Bug: In Katana::SegmentFsm CTOR, when computing costs for METAL2 in
non-preferred direction attached to METAL1 terminals, do not try to
align on a METAL3 track, as there may be not. Especially when the
METAL3 pitch is not multiple of the METAL1 one.
Compute at least one cost (with the same axis as the vertical METAL1
terminal).
* Change: In Etesian::BloatCells, adjust the "90%" bloat profile for a
METAL3 pitch of 8 lambdas (sligh decrease).
* Bug: In cumulus/plugins/ChipPLace.py, import chip.Chip, not only chip.
* New: In Etesian::BloatCells, new profile for hihgly saturated designs named
"90%", as it add, on average, 90% of free space. This has been made for
the "ao68000" of Staf Verhaegen and may needs some refinement as it is a
bit brutal.
* Change: In Hurricane::Script, when running a script, no longer do it
inside a Python sun-interpreter, use the current one. This way we
no longer have our modules initialized twice or more, which was
starting to be unmanageable (with the NDA support).
The settings were re-read multiple time to the same value, so it
was working, but still...
I hope I didn't left some dangling Python objects now.
* Bug: In Hurricane::LayoutGenerator::drawLayout(), get the device abutment
box though a Pyhon object *before* finalizing which removes that objet.
* New: In cumulus/plugins/__init__.py, add a "loadPlugins()" and static
initialisation to preload plugins modules.
We use that pre-loading step to append to the module __path__ attribute
the alternate directory where a NDA covered may be found. This assume that
the directory tree under the NDA root is identical to the one under the
public root.
* New: In cumulus/plugins/chip/__init__.py, small utility function
importContants() to import the constants inside another module namespace,
to have more consise notations.
* Change: In cumulus/plugins/, in the various plugins sub-modules import
use the full path from plugins, that is, for example:
from plugins.core2chip.CoreToChip import IoPad
* Change: In Unicorn/python/unicornInit.py, no longer directly load the
plugins modules, this is now done by cumulus/plugins/__init__.py.
Instead, iterate through sys.modules for the ones starting by "plugins/"
and try to execute a Unicorn hook, if present.
* Change: In Karakaze/python/AnalogDesign.py, update for the new Instance.create()
prototype (added placement parameter).
* New: In CRL::ApDriver::DumpSegments(), drive as top-level segments the
RoutingPads using a Pin, and not only using a segment. They are not
exported as top level Pin but only as Segment as they do belong to
a deeper level.
* New: In Cumulus/plugins/PadsCorona.Side._placePads(), now manage both
"pxlib" and "phlib*". Pad library management is still hardcoded, this
should be made a configuration option someday.
* Bug: In CRL::cstDriver(), re-activate the management of the VstUseConcat
flag. Why was he removed in the first place?
* Change: In KatanaEngine::runGlobalRouter(), no longer give the details of
each overflowed edge and the complete list of impacted nets.
Only a count.
* Change: In Anabatic::AutoContactTerminal::updateGeometry(), when a
draggable AutoContact is moved, pitch it on the routing grid instead
of putting it in lowest/highest position.
* Change: In Anabatic::GCell::updateDensity(), all non-passthrough wires
now have a cost of 0.5 instead of 0.33 for locals.
* Change: In Manipulator::canMoveUp(), increase the "reserve" amount to
1.0 for "far from terminal" wires (rpDistance > 2).
* Change: In NegociateWindow::NegociateOverlapCost(), always sets "AtRipupLimit"
when the overlapping segment is nearing it's maximum ripup limit.
(different detection for non-preferred and regular)
* Change: In SegmentFsm::_slackenStrap(), call avoidBlockage() if it is
overlapping a blockage *or* a segment at it's ripup limit. I hope I
didn't create an infinite loop here.
* Bug: In cumulus/plugins/PadsCorona.py, CoreWire._computeCoreLayers(),
the big contact between symbolic and real was badly computed for
east/west (was using width instead of height, bummer!).
In Corona._createCoreWire(), completly screwed computation of the
side gap, was using a badly initialized value of the "bb" variable.
* Bug: In cumulus/plugins/Chip.py, the computation of the minimal size
for the corona was wrong, do *not* add the size of the pads and
multiply by two as it is done by "inflate". This was forcing the user
to create way to large chips for a given core size.
This commit degrades the run success rate of ARMv2a to 87% (40 iters).
* New: In CRLcore/etc/.../kite.conf, add configuration parameters:
katana.termSatReservedlocal
katana.termSatthreshold
for the new edge capacity computation system.
* New: In CRLcore/etc/symbolic/phenitec06/, add support for N. Shimizu
small I/O pads (supplied in phlib80). Tune various parameters of
Anabatic/Katana to increase routing success.
* Change: In CRLcore/alliance/ap/ApParser, make Pin external components,
so RoutingPad will be build upon in global routing.
Do not complain when a I/O pad has a physical instance that did
not exists in the netlist. Just create it (appeared in phlib80).
When no netlist instance exists in a pad, the pad Cell is still
considered as terminal.
* New: In Etesian::BloatCells, new profile named "3metals" better suited
for two routing metals technologies (i.e. Phenitec).
* New: In Anabatic::RawGCellsUnder, new CTOR which take only source &
target points instead of a segment. Needed to manage wide segment for
which the axis to consider is not that of the segment (one axis for
each track it intersect).
* New: In Anabatic::GCell, add a RoutingPad count attribute, for Edge
reservation computation.
* New: In AnabaticEngine::computeEdgeCapacities(), instead of decreasing
all edges of a fixed amount (hTrackReservedLocal), guess the GCell
cluttering from the number of RoutingPads that it contains.
For non-saturated GCells, the four edges are decreased by the number
of RoutingPads. We use the maximum from the two neigboring GCells.
The hTrackReservedLocal parameter is now used only as a *maximum*
that the edge reservation can reach.
If a GCell is saturated (more than 8 RoutingPads, the saturation is
propagated horizontally to 2 neigboring GCells).
* Change: In AutoContactTerminal::getNativeConstraintBox(), use a more
flexible gauge name matching for terminal vertical extensions correction.
Namely, match all "msxlib*" kind of gauges.
* Change: In AutoSegment::setAxis(), add the ability to force the axis
position, even if it is a non-canonical segment. Maybe needed in the
initialisation steo, before the first canonisation is performed.
* New: In NetBuilder, added new methods _do_1G_1PinM1() and _do_2G_1PinM1(),
to manage coronas for Phenitec designs.
To avoid various side effects from segments being too close from
the north / east side of the routing area, make those segments fixeds.
* Change: In KatanaEngine::annotateGlobalGraph(), the management of wide
wires was wrong. The axis to use to find the underlying GCells is the
one of the track, not of the segment. This was creating bad edge
capacity computation under the power ring of a block and subsequently
routing failures.
* New: In Kanata::Manipulator, added method reprocessParallels(), not used
though, but keep it anyway, might be of use later...
* New: In Kanata::Manipulator, added method avoidBlockage() for terminal
METAL2 in non-preferred direction, restrict the terminal and turn
constraint box at the current position of the perpandicular, so it
doesn't create a deadlock in METAL2.
* Change: In SegmentFsm::conflictSolveByPlaceds(), if we cannot break
using the whole overlap, try the first atomic overlap.
* New: In SegmentFsm::_slackenStrap(), manage conflict between a non-prefered
segment and a blockage, this when to call avoidBlockage()...
* New: In Katana::Configuration, management of the new edge computation
parameters:
katana.termSatReservedlocal
katana.termSatthreshold
* New: In Cumulus/plugins/Core2Chip, support for Phenitec I/O pads.
Now reliably work for 20 successive runs (doRun.sh) with pseudo-random
variations.
* Change: In AnabaticEngine::computeNetConstraints(), fully recompute
the "distance to RoutingPads" for all AutoSegments.
Previously we tried to do it incrementally, but as it's computed
as a minimum, it stayed stuck at the lowest value, event after a
net's change of topology that could made it increase (a new dogleg
did appear between the segment and the RoutingPad).
* Change: In Katana::SegmentFsm::_slackenStrap(), make unbreakable segments
pass through the LocalVsGlobal state so when other try to ripup them
they are prioritary. Otherwise some could go through Unimplemented
directly, without allowing other to attempt to make a detour.
* Change: In Katana::NegociateWindow::NegociateOverlapCost(), when a
global, which is about to be slackened wants to use a track where there
is a segment directly connected to a terminal with a significant
ripup count, mark it as "AtRipupLimit" so it tries to avoid it.
The idea is that globals with high ripup count must avoid terminal
segments because it is likely they will be riped up again so they
better find another track. This was leading to unsolvable configuration
when two segments always want the same track. In this cas, the global
would loose.
* Bug: In Katana::TrackSegment::canSlacken(), never slacken a segments in
non-preferred direction.
* Change: In Anabatic::AutoHorizontal::_slacken(), allow slackening of
segments which perpandiculars are in non-preferred direction, and
not only directly attached to terminals.
* Change: In Anabatic::AutoSegment::canMoveUp(), re-allow segments which
perpandiculars are in non-preferred direction to be moved up.
* Bug: In Katana::Manipulator::moveUp(), when moving up, do not forget
to ripup and reschedule said segment.
This non-deterministic behavior was showing only in the ARMv2a benchmark
around event 180k...
* Bug: In Anabatic::Session::_netInvalidateds & _netRevalidateds, the
set<> was still sorted on pointers. As contacts & segments can be
created to maintain connexity after a layer change, we got a
discrepency in objects Ids that may generate a change in ordering
later.
* Bug: In Katana::Session::_doRemovalEvents(), the set of Tracks that
got elements deleted was still using pointers. Now we use a TrackSet
sorted on (direction,depth,axis). This should not have created
a change in the results, as destructions do not change Ids, but it
genereate extra differences in traces.
* Bug: In Anabatic::AutoSegment::reduceDoglegLayer(), we did not check
that not only source and target depth span was zero, but also both
on the same one. This was seen in the RISC-V where a METAL2 small
segment was demoted into METAL1 causing a gap in the routing (and
a short in the underlying standart cell).
* Bug: In cumulus/plugins/PadsCorona.py, when a pad is at the beginning
or at the end of the side, the pad corona terminal may be outside
the corona range (not directly facing it). In that case, create a
bend to reach it.
Worse, in some case more than one (but likely no more), could be
in that case, so not only do we create a bend but also make a
shift in the bended segment so two consecutive ones are not on the
same axis, causing shorts.
If both end pads of a corner are in that case, we cannot prevent
a short, so at least, issue a warning.
* Bug: In CRL::Vhdl, the Entity::VstUseConcat was not passed correctly
along, so we did get a strange mix of conat and direct assignment.
* New: In Unicorn/cgt.py : added --vst-use-concat options to control
the VST driver behavior.
* Bug: In CRL::ApDriver & CRL::ApParser, when saving a fused net, do not
use it's name but put a star (*) character to set it anonymous.
Having all component named was creating problems in cougar and
subsquently in yagle (bad name for master latch).
Conversely, in the parser, if the name of the net is "fused_net",
make it a real fused_net and not an ordinary one.
* New: In CRL::AllianceFramework::saveCell(), through the view flag we
can pass an option 'CRL::Catalog::State::VstUseConcat' to tell the
driver tu use or not the concat '&' in PORT MAP statements.
It is not completely clean that the flag for controlling the VST
driver behavior is put in the Catalog states, but it's easier for
now...
And, of course, exported at Python level.
* New: In CRL/etc/symbolic/phenitec06, configuration for symbolic
layout targeted for Phenitec 0.6um (do not contains any NDA
covered informations). Could be used for any 3 metal layers
techno.
* Bug: In Cumulus/plugins/chip/Configuaration.py, _setStackposition()
disable stack error when there is no slave component on the stack
(happens when the stack consists only of one contact).
* Change: In Cumulus/plugins/chip/PadsCorona, if the external pins of
the corona are in GCells that are also under the core block ring
power lines, they are flagged as "go straight" and this produce
impossible configurations for the router to solve. Now we ensure
that there is one free GCell all around the corona border.
* Bug: In Cumulus/plugins/chip/Configuration.py & PadsCorona.py,
at the begin/end of a side of pad, connectors can be outside the
corona range (i.e. not directly face to face). Now make a dogleg
if needed. This is a work in progress as if there are two of them,
they will short on the perpandicular part. We must compute a
shift.
* Change: In Anabatic::AutoHorizontal::_canSlacken(), if the source or
target contact is in a GCell flagged "go straight", do not slacken,
which would create a dogleg. This case is usually meet under big
power rails that render a dogleg impossible to place as all tracks
are used.
Same modification for AutoVertical.
* Bug: In Cumulus/plugins/core2chip/CoreToChip.py, when creating the ioNet
objects, when a signal is an enable we must not set the external chip
net (the name for the PAD terminal) as it may be set later if it is
also used as an individual pad.
* Change: In Cumulus/plugins/core2chip/CoreToChip.py, in IoNet select
the external I/O net (pad connected) signal to be generated in the
context of the I/O pad instanciation. This should allow an enable
signal in one pad to be also used in a direct output pad.
* In CRL::vstDriver(), remove the Vhdl::EntityExtension right after driving
the file. This avoid keeping in memory a mostly usnused structure and
solve the "second write after modification" problem.
* New: In Cumulus/plugins/CoreToChip, added support for Tristate ouput
pads and bidirectional pads.
Added capability to name the I/O pad instance and their external
terminals so we can override the default naming scheme.
Mandatory anyway for bidirectional and tristate I/O pad as we
cannot guess the core net grouping (in/out/enable).
Support is available for symbolic CMOS and AMS c35b4 (but not
published due to NDA).
* Change: In Cumulus/plugins/chip/Configuration.py, the configuration
file is now named simply "ioring.py" instead of being prefixed by
the design name. As a consequence we can have only one chip per
directory. But now all the tools, for any design in that directory
can peek datas into it.
Mariam Tlili
Jean-Paul Chaput
Gabriel Gouvine