80 lines
3.2 KiB
TeX
80 lines
3.2 KiB
TeX
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\begin{itemize}
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\item Name : DpgenFifo -- Fifo Macro-Generator
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\item Description : Generates a FIFO pf \verb-ergNumber- words of \verb-n- bits named \verb-modelname-.
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\item How it works :
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\begin{itemize}
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\item datain0 and datain1 : the two write busses. Only one is used to actually write the FIFO, it is selected by the sel signal.
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\item sel : when set to \verb-zero- the datain0 is used to write the register word, otherwise it will be datain1.
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\item r, rok : set r when a word is requested, rok tells that a word has effectively been popped (rok == not empty).
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\item w, wok : set w when a word is pushed, wok tells that the word has effectively been pushed (wok == not full).
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\end{itemize}
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\item Terminal Names :
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\begin{itemize}
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\item ck : clock signal (input, 1 bit)
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\item reset : reset signal (input, 1 bit)
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\item r : read requested (input, 1 bit)
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\item w : write requested (input, 1 bit)
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\item rok : read acknowledge (output, 1 bit)
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\item wok : write acknowledge (output, 1 bit)
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\item sel : select the write bus (input, 1 bit)
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\item datain0 : first write bus (input, \verb-n- bits)
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\item datain1 : second write bus (input, \verb-n- bits)
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\item dataout : read bus (output, \verb-n- bits)
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\item vdd : power
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\item vss : ground
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\end{itemize}
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\item Parameters : Parameters are given with a map called \verb-param-.
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\begin{itemize}
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\item nbit : Defines the size of the words (even, between 2 and 64)
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\item nword : Defines the number of words (even, between 4 and 32)
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\end{itemize}
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% \item Behavior :
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%\begin{verbatim}
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%\end{verbatim}
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\item Example :
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\begin{verbatim}
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class myClass ( Model ) :
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global nbit, nword
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nbit = 4
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nword = 16
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def Interface ( self ) :
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self._ck = LogicIn ( "ck", 1 )
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self._reset = LogicIn ( "reset", 1 )
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self._r = LogicIn ( "r", 1 )
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self._w = LogicIn ( "w", 1 )
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self._rok = LogicInOut ( "rok", 1 )
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self._wok = LogicInOut ( "wok", 1 )
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self._sel = LogicIn ( "sel", 1 )
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self._datain0 = LogicIn ( "datain0", nbit )
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self._datain1 = LogicIn ( "datain1", nbit )
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self._dataout = LogicOut ( "dataout", nbit )
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self._vdd = VddIn ( "vdd" )
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self._vss = VssIn ( "vss" )
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def Netlist ( self ) :
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Inst ( 'DpgenFifo'
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, param = { 'nword' : nword
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, 'nbit' : nbit
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}
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, map = { 'ck' : self._ck
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, 'reset' : self._reset
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, 'r' : self._r
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, 'w' : self._w
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, 'rok' : self._rok
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, 'wok' : self._wok
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, 'sel' : self._sel
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, 'datain0' : self._datain0
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, 'datain1' : self._datain1
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, 'dataout' : self._dataout
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, 'vdd' : self._vdd
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, 'vss' : self._vss
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}
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)
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\end{verbatim}
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\end{itemize}
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