riscv-openocd/tcl
Nishanth Menon de4f52179c tcl/board: Add J721s2 EVM basic support
Add basic connection details with J721s2 EVM.

For further details, see https://www.ti.com/lit/zip/sprr439

Signed-off-by: Nishanth Menon <nm@ti.com>
Change-Id: I68f8818c492ea6e07c14f2da305671c26da801cb
Reviewed-on: https://review.openocd.org/c/openocd/+/6797
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2022-03-12 09:41:26 +00:00
..
board tcl/board: Add J721s2 EVM basic support 2022-03-12 09:41:26 +00:00
chip tcl: [3/3] prepare for jimtcl 0.81 'expr' syntax change 2021-05-08 09:49:08 +01:00
cpld cpld: altera-epm240: Increase adapter speed 2022-02-26 15:29:52 +00:00
cpu tcl: [1/3] prepare for jimtcl 0.81 'expr' syntax change 2021-05-08 09:48:44 +01:00
fpga tcl: add lattice ECP5 family support 2021-08-25 03:47:50 +00:00
interface Cadence virtual debug interface (vdebug) integration 2022-02-14 15:12:10 +00:00
target tcl/target/ti_k3: Add J721S2 SoC 2022-03-12 09:41:16 +00:00
test tcl: [1/3] prepare for jimtcl 0.81 'expr' syntax change 2021-05-08 09:48:44 +01:00
tools tcl: [3/3] prepare for jimtcl 0.81 'expr' syntax change 2021-05-08 09:49:08 +01:00
bitsbytes.tcl tcl: fix some minor typo 2021-05-22 10:06:26 +01:00
mem_helper.tcl tcl: [1/3] prepare for jimtcl 0.81 'expr' syntax change 2021-05-08 09:48:44 +01:00
memory.tcl tcl: [3/3] prepare for jimtcl 0.81 'expr' syntax change 2021-05-08 09:49:08 +01:00
mmr_helpers.tcl tcl: [3/3] prepare for jimtcl 0.81 'expr' syntax change 2021-05-08 09:49:08 +01:00