riscv-openocd/tcl
Tarek BOCHKATI c2ad18d68b flash/stm32l4x: add support of STM32U57x/U58x
this device flash registers are quite similar to STM32L5
with this changes :
 - flash size is up to 2MB
 - 2MB variants are always dual bank
 - 1MB and 512KB variants could be dual bank (contiguous addressing)
   depending on DUALBANK bit(21)
 - flash data width is 16 bytes (quad-word)

Change-Id: Id13c552270ce1071479ad418526e8a39ebe83cb1
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6108
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2021-08-30 07:51:52 +00:00
..
board tcl: add lattice ECP5 family support 2021-08-25 03:47:50 +00:00
chip tcl: [3/3] prepare for jimtcl 0.81 'expr' syntax change 2021-05-08 09:49:08 +01:00
cpld xilinx-xc7: Add additional IDCODEs. 2018-10-27 14:37:43 +01:00
cpu tcl: [1/3] prepare for jimtcl 0.81 'expr' syntax change 2021-05-08 09:48:44 +01:00
fpga tcl: add lattice ECP5 family support 2021-08-25 03:47:50 +00:00
interface tcl: add lattice ECP5 family support 2021-08-25 03:47:50 +00:00
target flash/stm32l4x: add support of STM32U57x/U58x 2021-08-30 07:51:52 +00:00
test tcl: [1/3] prepare for jimtcl 0.81 'expr' syntax change 2021-05-08 09:48:44 +01:00
tools tcl: [3/3] prepare for jimtcl 0.81 'expr' syntax change 2021-05-08 09:49:08 +01:00
bitsbytes.tcl tcl: fix some minor typo 2021-05-22 10:06:26 +01:00
mem_helper.tcl tcl: [1/3] prepare for jimtcl 0.81 'expr' syntax change 2021-05-08 09:48:44 +01:00
memory.tcl tcl: [3/3] prepare for jimtcl 0.81 'expr' syntax change 2021-05-08 09:49:08 +01:00
mmr_helpers.tcl tcl: [3/3] prepare for jimtcl 0.81 'expr' syntax change 2021-05-08 09:49:08 +01:00