830d70bfc6
Tigard[1] is an FT2232H-based development tool designed for ease of use with many different protocols and targets. It includes a JTAG header wired to channel B, with labeled pins for the four required signals as well as nTRST and nSRST, which are connected through an output buffer to BDBUS4 and BDBUS5 respectively. Add an interface config for Tigard. I wrote it by referencing the Tigard schematic and tested it by debugging a couple of RISC-V development boards. [1] https://github.com/tigard-tools/tigard Signed-off-by: Thomas Hebb <tommyhebb@gmail.com> Change-Id: I34df9f72538ba1e40ad53b568c9cdca96ae4b082 Reviewed-on: https://review.openocd.org/c/openocd/+/6952 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> |
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| .. | ||
| board | ||
| chip | ||
| cpld | ||
| cpu | ||
| fpga | ||
| interface | ||
| target | ||
| test | ||
| tools | ||
| bitsbytes.tcl | ||
| mem_helper.tcl | ||
| memory.tcl | ||
| mmr_helpers.tcl | ||