interesting
/
riscv-openocd
mirror of https://github.com/riscv/riscv-openocd.git
1
0
Fork 0
Code Issues Projects Releases Wiki Activity
riscv-openocd/tcl
History
Ranjith Chandran 53556fcded tcl/interface: add Ashling Opella-LD FTDI config files 
Adding Ashling's FTDI based Debug adapter Opella-LD's JTAG and SWD config files

Change-Id: Ie0e82e3b8326de37641901f5c825372cab31de58
Signed-off-by: ranjith.tc@ashling.com
Reviewed-on: http://openocd.zylin.com/6379
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
 		2021-08-14 13:38:03 +01:00
..
board tcl: Adapt config files to new usb_blaster command syntax 2021-08-14 13:37:29 +01:00
chip tcl: [3/3] prepare for jimtcl 0.81 'expr' syntax change 2021-05-08 09:49:08 +01:00
cpld xilinx-xc7: Add additional IDCODEs. 2018-10-27 14:37:43 +01:00
cpu tcl: [1/3] prepare for jimtcl 0.81 'expr' syntax change 2021-05-08 09:48:44 +01:00
fpga tcl: [3/3] prepare for jimtcl 0.81 'expr' syntax change 2021-05-08 09:49:08 +01:00
interface tcl/interface: add Ashling Opella-LD FTDI config files 2021-08-14 13:38:03 +01:00
target add config for Microchip SAMA5D27 SOM1 Kit1 2021-08-14 08:04:38 +01:00
test tcl: [1/3] prepare for jimtcl 0.81 'expr' syntax change 2021-05-08 09:48:44 +01:00
tools tcl: [3/3] prepare for jimtcl 0.81 'expr' syntax change 2021-05-08 09:49:08 +01:00
bitsbytes.tcl tcl: fix some minor typo 2021-05-22 10:06:26 +01:00
mem_helper.tcl tcl: [1/3] prepare for jimtcl 0.81 'expr' syntax change 2021-05-08 09:48:44 +01:00
memory.tcl tcl: [3/3] prepare for jimtcl 0.81 'expr' syntax change 2021-05-08 09:49:08 +01:00
mmr_helpers.tcl tcl: [3/3] prepare for jimtcl 0.81 'expr' syntax change 2021-05-08 09:49:08 +01:00