It had a very little bit of content; move that to the more extensive
chapter on config file guidelines, and give more current "ls" output
to show the available library code.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2820 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- revert to previous default: don't talk JTAG during SRST
- add "srst_nogates" flag, the converse of "srst_gates_jtag"
- with no args, display the current configuration
And update the User's Guide text with bullet lists to be a bit more clear.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2818 b42882b7-edfa-0310-969c-e2dbd0fdcd60
The model is that this fires after scanchain verification, when it's
safe to call "jtag tapenable $TAPNAME". So it will fire as part of
non-error paths of "init" and "reset" command processing. However it
will *NOT* trigger during "jtag_reset" processing, which skips all
scan chain verification, or after verification errors.
ALSO:
- switch DaVinci chips to use this new mechanism
- log TAP activation/deactivation, since their IDCODEs aren't verified
- unify "enum jtag_event" scripted event notifications
- remove duplicative JTAG_TAP_EVENT_POST_RESET
git-svn-id: svn://svn.berlios.de/openocd/trunk@2800 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- ETB
* report _actual_ hardware status, not just expected status
* add a missing diagnostic on a potential ETB setup error
* prefix any diagnostics with "ETB"
- ETM
* make "etm status" show ETM hardware status too, instead of
just traceport status (which previously was fake, sigh)
- Docs
* flesh out "etm tracemode" docs a bit
* clarify "etm status" ... previously it was traceport status
* explain "etm trigger_percent" as a *traceport* option
ETM+ETB tracing still isn't behaving, but now I can see that part of
the reason is that the ETB turns itself off almost immediately after
being enabled, and before collecting any data.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2790 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- Commands were supposed to have been "arm11 memwrite ..."
not "memwrite ..."
- Get rid of obfuscatory macros
- Re-alphabetize
- Add docs for "arm11 vcr"
git-svn-id: svn://svn.berlios.de/openocd/trunk@2776 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Change the handling of the "-ircapture" and "-irmask" parameters
to be slightly more sensible, given that the JTAG spec describes
what is required, and that we already require that conformance in
one place. IR scan returns some bitstring with LSBs "01".
- First, provide and use default values that satisfy the IEEE spec.
Existing TAP configs will override the defaults, but those parms
are no longer required.
- Second, warn if any TAP gets set up to violate the JTAG spec.
It's likely a bug, but maybe not; else this should be an error.
Improve the related diagnostics to say which TAP is affected.
And associated minor fixes/cleanups to comments and diagnostics.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2758 b42882b7-edfa-0310-969c-e2dbd0fdcd60
only expose the registers which are actually present. They
could be missing for two basic reasons:
- This version might not support them at all; e.g. ETMv1.1
doesn't have some control/status registers. (My sample of
ARM9 boards shows all with ETMv1.3 support, FWIW.)
- The configuration on this chip may not populate as many
registers as possible; e.g. only two data value comparators
instead of eight.
Includes a bugfix in the "etm info" command: only one of the
two registers is missing on older silicon, so show the first
one before bailing.
Update ETM usage docs to explain that those registers need to be
written to configure what is traced, and that some ETM configs
are not yet handled. Also, give some examples of the kinds of
constrained trace which could be arranged.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2752 b42882b7-edfa-0310-969c-e2dbd0fdcd60
of a (NOR) flash chip: allow passing "last" as an alias
for the number of the last sector.
Improve several aspects of error checking while we're at it.
From: Johnny Halfmoon <jhalfmoon@milksnot.com>
git-svn-id: svn://svn.berlios.de/openocd/trunk@2746 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Highlight that the "post-reset" event kicks in before the
scan chain is validated, which limits what can be done
in a post-reset handler.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2745 b42882b7-edfa-0310-969c-e2dbd0fdcd60
done on exit from the config stage, how JTAG clocking issues can
trigger errors there, and how to avoid such problems.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2737 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Erase logic:
- command invocation
+ treat "nand erase N" (no offset/length) as "erase whole chip N"
+ catch a few more bogus parameter cases, like length == 0 (sigh)
- nand_erase() should be static
- on error
+ say which block failed, and if it was a bad block
+ don't give up after the first error; try to erase the rest
- on success, say which nand device was erased (name isn't unique)
Device list ("nand list"):
- say how many blocks there are
- split summary into two lines
- give example in the docs
Doc tweaks:
- Use @option{...} for DaVinci's supported hardware ECC options
For the record, I've observed that _sometimes_ erasing bad blocks causes
failure reports, and that manufacturer bad block markers aren't always
erasable (even when erasing their blocks doesn't trigger an error report).
git-svn-id: svn://svn.berlios.de/openocd/trunk@2724 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- update comments to say so.
- update docs to clarify that the "arm9tdmi" command prefix
is a misnomer.
- bugfix some messages that wrongly assume only ARM9TDMI
based processors use this code.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2719 b42882b7-edfa-0310-969c-e2dbd0fdcd60
JTAG clocking by gating the core clock, and workarounds.
Most details are with the "halt" command, which is one
of the first places this issue will be noticed.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2718 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Fix docs on ARM11 MCR and MRC coprocessor commands:
correct read-vs-write; and describe the params.
(ARM920 and ARM926 have cp15-specific commands; this
approach is more generic. MCR2, MRC2, MCRR, MCRR2,
MRRC, and MRRC2 instructions could also get exposed.)
git-svn-id: svn://svn.berlios.de/openocd/trunk@2679 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Provide an "armv7a disassemble" command. Current omissions include
VFP (except as coprocessor instructions), Neon, and various Thumb2
opcodes that are not available in ARMv7-M processors.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2676 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- Itemize the list of private customization examples
for openocd.cfg
- Add "override defaults" as a customization, specifically
for the work area (back it up or relocate it)
- Highlight some work area location issues
git-svn-id: svn://svn.berlios.de/openocd/trunk@2651 b42882b7-edfa-0310-969c-e2dbd0fdcd60
For ARMv4/ARMv5:
- better command parameter error checking
- don't require an instruction count; default to one
- recognize thumb function addresses
- make function static
- shorten some too-long lines
For Cortex-M3:
- don't require an instruction count; default to one
With the relevant doc updates.
---
Nyet done: invoke the thumb2 disassembler on v4/v5,
to better handle branch instructions.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2624 b42882b7-edfa-0310-969c-e2dbd0fdcd60
the values that are written in the mini-IC (plus documentation updates that
describe why this is needed).
git-svn-id: svn://svn.berlios.de/openocd/trunk@2613 b42882b7-edfa-0310-969c-e2dbd0fdcd60
issue with this is that the core debug support uses this
mechanism, then trashes its state over reset. Users can
Work around that (for now) by re-assigning the desired
config after reset.
Also fixes "target halted due to target-not-halted" goof.
When we can't describe the reason using OpenOCD's limited
vocabulary, say "reason undefined" instead of saying it's
not halted.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2588 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Add flash programming support for NXP LPC1700 cortex_m3 based family
git-svn-id: svn://svn.berlios.de/openocd/trunk@2579 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Initial support for disassembling Thumb2 code. This works only for
Cortex-M3 cores so far. Eventually other cores will also need Thumb2
support ... but they don't yet support any kind of disassembly.
- Update the 16-bit Thumb decoder:
* Understand CPS, REV*, SETEND, {U,S}XT{B,H} opcodes added
by ARMv6. (It already seems to treat CPY as MOV.)
* Understand CB, CBNZ, WFI, IT, and other opcodes added by
in Thumb2.
- A new Thumb2 instruction decode routine is provided.
* This has a different signature: pass the target, not the
instruction, so it can fetch a second halfword when needed.
The instruction size is likewise returned to the caller.
* 32-bit instructions are recognized but not yet decoded.
- Start using the current "UAL" syntax in some cases. "SWI" is
renamed as "SVC"; "LDMIA" as "LDM"; "STMIA" as "STM".
- Define a new "cortex_m3 disassemble addr count" command to give
access to this disassembly.
Sanity checked against "objdump -d" output; a bunch of the new
instructions checked out fine.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2530 b42882b7-edfa-0310-969c-e2dbd0fdcd60
on ARM9 cores, and update the DaVinci config files so they
no longer explicitly specify it.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2484 b42882b7-edfa-0310-969c-e2dbd0fdcd60
reading the output, and both were reported in openocd.log
after making the PDF.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2449 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Add some text to introduce the project to new users.
Move packaging, configuration, and compilation of OpenOCD out of
the User's Guide and into README, where it can be used by users
before configuring and compiling the documentation.
Improve notes about required Subversion repository build steps.
Add reference to the standard GNU INSTALL file.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2436 b42882b7-edfa-0310-969c-e2dbd0fdcd60
This patch adds support for the Luminary Micro LM3S9B90 target and
LM3S9B92 Evaluation Kit. These kits include a new ft2232 adapter, the
Luminary In-Circuit Debug Interface (ICDI) Board, so this is added as a
new ft2232 layout called "luminary_icdi".
git-svn-id: svn://svn.berlios.de/openocd/trunk@2429 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Add "jtag names" command, mirroring "target names" but returning
TAP names instead of target names. This starts letting TAPs be
manipulated in scripts ... much like what works now for targets.
It's a bit limited just yet, since "jtag cget $TAPNAME" doesn't
expose all TAP attributes. "$TARGETNAME cget" is more functional.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2428 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Warn when people (or scripts) use numeric identifiers for TAPs,
instead of dotted.name values. We want this usage to go away,
so that for example adding more TAPs doesn't cause config scripts
to break because some sequence number changed.
It's been deprecated since late 2008, but putting a warning on
this should help us remove it (say, in June 2010) by helping to
phase out old (ab)usage in config scripts.
Other than in various config files, the only code expecting such
a number was the almost unused str9xpec driver. This code was
changed to use the TAP it was passed, instead of making its own
dubious lookup and ignoring that TAP.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2415 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Minor fixup to the User's Guide, primarily related to the
handful of commands defined in "startup.tcl"; "help" was
not previously documented.
Also, be more consistent about "Config Command" definitions
(and to be explicit about that doc convention).
git-svn-id: svn://svn.berlios.de/openocd/trunk@2414 b42882b7-edfa-0310-969c-e2dbd0fdcd60
and some formatting issues with sam7 and stm32 keyword params.
Tweak at91sam3 docs. Remove ninth nibble from flash bank addresses,
clarify "at91sam3 show" variants and that the flash bank layout is
not needed as a parameter (unlike with sam7); formatting fixes.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2400 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Move the short chapter about JIM-Tcl earlier, so that we
can reasonably assume it's been introduced before we start
presenting things that presume such an introduction.
Plus a few minor typo-level fixes.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2355 b42882b7-edfa-0310-969c-e2dbd0fdcd60
This should be my last significant update of the User's Guide for
this release. Mostly it's a rework of the config file chapter's
presentation of board and target config files.
- Give the new path for scripts!
- Move board-config material out of the target-config section
- Add more board-config info, notably for reset-init events
- Link out of the board-config section to NAND, NOR, and Reset chapters
- Emphasize target input vs. output naming conventions
- Other textual improvements
Plus some other updates, like adding my copyright (now that I've
basically rewritten much of this).
git-svn-id: svn://svn.berlios.de/openocd/trunk@2354 b42882b7-edfa-0310-969c-e2dbd0fdcd60
This is minimal patch to support FA526 ARMv4 compatible core.
Since it is very similar to ARM920T I tried to reuse as much
code as possible.
CPU and board configs will follow soon.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2292 b42882b7-edfa-0310-969c-e2dbd0fdcd60
The PLD stuff hasn't been documented yet. It's just Virtex2 for now,
but it looks like adding others would be easy.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2273 b42882b7-edfa-0310-969c-e2dbd0fdcd60
dbrownell
oharboe
ntfreak
zwelch
duane