Commit Graph

7 Commits

Author SHA1 Message Date
Sean Anderson a84d1b5f5e tcl/target: Add helpers for booting Xilinx ZynqMP from JTAG
Add some helpers for booting ZynqMPs over JTAG. Normally, the CSU ROM
will load boot.bin from the boot medium. However, when booting from JTAG
we have to do this ourselves. There are generally two parts to this.
First, we need to load the PMU firmware. Xilinx's tools do this by
attaching to the PMU (a Microblaze CPU) over JTAG. However, the TAP is
undocumented and we don't have any microblaze support in-tree. So
instead we do it the same way FSBL does it:

- We ask the PMU to halt
- We load the firmware into the PMU RAM
- We ask the PMU to resume

The second thing we need to do is start one of the APU cores. When an
APU is released from reset, it starts executing at the value of its
RVBARADDR. While we could load the APU firmware over the AXI target,
it is faster to load it over the APU target. To do this, we put the APU
into an infinite loop before halting it. As an aside, I chose to use the
"APU" terminology as opposed to "core" to make it clear that these
commands operate on the A53 cores and not the R5F cores.

Typical usage of these commands could look something like

	targets uscale.axi
	boot_pmu /path/to/pmu-firmware.bin
	boot_apu /path/to/u-boot-spl.bin

But of course there is always the option to call lower-level commands
individually if your boot process is more unusual.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Change-Id: I816940c2022ccca0fabb489aa75d682edd0f6138
Reviewed-on: https://review.openocd.org/c/openocd/+/8133
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
2024-05-04 08:36:23 +00:00
Antonio Borneo a3ed12401b tcl/target: enable -rtos hwthread
The rtos hwthread has been merged in 2019 with commit 85ba2dc4c6
("rtos/hwthread: add hardware-thread pseudo rtos").
During review in patchset 19 the name of the rtos has been changed
from 'hawt' to 'hwthread'.

Some target config file was already merged ready for hwthread, but
keeping the relevant lines commented and still reporting the old
name.

Enable rtos hwtread to the target that were supposed to use it.
Fix the name of the rtos.

Change-Id: I877862dcdba39f26462bb542bac06d1a5f5f222d
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7384
Tested-by: jenkins
2023-01-15 15:10:42 +00:00
Antonio Borneo e6505b0489 tcl/target: add SPDX tag
For historical reasons, no license information was added to the
tcl files. This makes trivial adding the SPDX tag through script:
	fgrep -rL SPDX tcl/ target| while read a;do \
	sed -i '1{i# SPDX-License-Identifier: GPL-2.0-or-later\n
	}' $a;done

With no specific license information from the author, let's extend
the OpenOCD project license GPL-2.0-or-later to the files.

Change-Id: I7b2610300b24cccd07bfa6fb5f1266970d5d3a1b
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7027
Tested-by: jenkins
2022-06-24 21:53:35 +00:00
Antonio Borneo 9a6417e035 tcl: don't use 'set' to retrieve the value of a variable
Original TLC syntax uses 'set varname' to retrieve the value of
variable 'varname'. Such archaic syntax is still valid, but the
shorter '$varname' makes the code easier to read.

Replace 'set varname' with '$varname'.
While there, remove some useless curly brackets.

Change-Id: I27310e8c05afe56ea8bd0e41d4ae2c34447b725c
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6863
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2022-03-12 09:43:00 +00:00
Olivier DANET 4e872a797f target/zynqmp : Add AXI AP access port
The Xilinx Zynq UltraScale+ SoC have an "AXI-AP" access port for direct memory accesses without halting CPUs.

Change-Id: I6303331c217795657575de4759444938e775dee1
Signed-off-by: Olivier DANET <odanet@caramail.com>
Reviewed-on: http://openocd.zylin.com/6263
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2021-05-22 10:12:01 +01:00
Antonio Borneo 360b2c2701 tcl: replace '-ctibase' with '-baseaddr'
Replace the deprecated option '-ctibase' with the generic option
'-baseaddr'.

Change generated with command:
	sed -i 's/-ctibase/-baseaddr/g' $(find tcl/ -type f)

Change-Id: If776934d2ac106532708768bb3a4ec6fcffb0368
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5870
Tested-by: jenkins
2020-11-04 17:37:36 +00:00
Jonathan McDowell d2fb461621 Correct ZynqMP configuration to be appropriately named
The xilinx_ultrascale.cfg target is actually the configuration for a
ZynqMP, which is a combination of an UltraScale+ FPGA core and a quad
core A53. Update the filename/comments to reflect this, and include
the tap IDs for all known FPGA cores for this part.

Change-Id: I70dfcc99861a482b83b6a795e83021d9cf1fe047
Signed-off-by: Jonathan McDowell <noodles@earth.li>
Reviewed-on: http://openocd.zylin.com/4850
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-01-23 15:26:48 +00:00