target/zynqmp : Add AXI AP access port
The Xilinx Zynq UltraScale+ SoC have an "AXI-AP" access port for direct memory accesses without halting CPUs. Change-Id: I6303331c217795657575de4759444938e775dee1 Signed-off-by: Olivier DANET <odanet@caramail.com> Reviewed-on: http://openocd.zylin.com/6263 Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com> Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
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@ -92,6 +92,8 @@ for { set _core 0 } { $_core < $_cores } { incr _core } {
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eval $_command
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}
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target create uscale.axi mem_ap -dap uscale.dap -ap-num 0
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eval $_smp_command
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targets $_TARGETNAME.0
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