Commit Graph

22 Commits

Author SHA1 Message Date
Tim Newsome 8c1f1b77d3 Merge commit 'ee31f1578a333a75737bc5b183cd4ae98cdaf798' into from_upstream
Conflicts:
	Makefile.am
	jimtcl
	src/helper/Makefile.am
	src/rtos/rtos.c
	src/rtos/rtos.h
	src/rtos/rtos_standard_stackings.c

Change-Id: I00c98d20089558744988184370a8cb7f95f03329
2023-09-12 12:55:10 -07:00
Tim Newsome da44fb5407 Merge commit '228fe7300c7df7aa05ba2c0bc19edde6d0156401' into from_upstream
Conflicts:
	doc/openocd.texi
	src/jtag/aice/aice_pipe.c
	src/jtag/aice/aice_usb.c
	src/rtos/FreeRTOS.c
	src/rtos/hwthread.c
	src/rtos/rtos_standard_stackings.c
	src/target/riscv/riscv.c

Change-Id: I0c6228c499d60274325be895fbcd8007ed1699bc
2023-05-04 14:38:10 -07:00
Tim Newsome 868ebdd89c Merge commit '1293ddd65713d6551775b67169387622ada477c1' into from_upstream
This includes
https://sourceforge.net/p/openocd/mailman/message/37710818/, which
should fix #814.

Conflicts:
	.travis.yml
	contrib/loaders/flash/stm32/stm32f1x.S
	contrib/loaders/flash/stm32/stm32f2x.S
	doc/openocd.texi
	src/rtos/FreeRTOS.c
	src/server/gdb_server.c
	src/target/riscv/riscv-013.c
	src/target/riscv/riscv.c
	src/target/riscv/riscv.h
	src/target/riscv/riscv_semihosting.c
	tcl/target/esp_common.cfg
	tcl/target/gd32vf103.cfg
	tools/scripts/checkpatch.pl

Change-Id: I1986c13298ca0dafbe3aecaf1b0b35626525e4eb
2023-03-16 18:02:35 -07:00
Erhan Kurubas 227577ba76 rtos: remove config.h includes from stackings headers
And add its own header to the rtos_xxx_stackings.c

Signed-off-by: Erhan Kurubas <erhan.kurubas@espressif.com>
Change-Id: I084130fde7ee8645129a7cf60bb7bf59448e2f39
Reviewed-on: https://review.openocd.org/c/openocd/+/7441
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-01-28 15:55:36 +00:00
Antonio Borneo da34e36cdb nds32: drop it, together with aice adapter driver
The target nds32 and its companion adapter aice have not received
any real improvement since 2013.
It has been hard to keep them aligned during the evolution of
OpenOCD code, with no way for maintainers to really check if they
are still working.
No real documentation is present for them in OpenOCD.
The nds32 code triggers ~50 errors/warnings with scan-build.

The arch nds32 has been dropped from Linux kernel v5.18-rc1.

For all the reasons above, this code has been deprecated with
commit 2e5df83de7 ("nds32: deprecate it, together with aice
adapter driver") and tagged to be dropped before v0.13.0.

Let it r.i.p. in OpenOCD git history.

While there, drop from checkpatch list the camelcase symbols that
where only used in this code.

Change-Id: Ide52a217f2228e9da2f1cc5036c48f3536f26952
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7382
Tested-by: jenkins
2023-01-15 14:46:36 +00:00
Antonio Borneo 58f987aa85 openocd: src/rtos: replace the GPL-2.0-or-later license tag
Replace the FSF boilerplate with the SPDX tag.

The SPDX tag on files *.c is incorrect, as it should use the C99
single line comment using '//'. But current checkpatch doesn't
allow C99 comments, so keep using standard C comments, by now.

Change-Id: If0194089baded7f58dc5d87a35d6e0aff9f43785
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7070
Tested-by: jenkins
2022-07-23 13:58:32 +00:00
Tim Newsome e487205410 uint64_t->target_addr_t for stack pointers.
This might be incomplete. It's just a quick attempt to reduce some of
the difference between riscv-openocd and mainline. Other stack pointers
can be updated as I come across them.

Change-Id: Id3311b8a1bb0667f309a26d36b67093bfeb8380a
Signed-off-by: Tim Newsome <tim@sifive.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6586
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2021-10-02 13:17:41 +00:00
Tim Newsome dc1e8484e2 Fix build.
Change-Id: I1ef6978fed7de7fa0b82f07d5bcb2f0264fda037
Signed-off-by: Tim Newsome <tim@sifive.com>
2021-08-31 10:27:39 -07:00
Tim Newsome a1146731a8 Merge branch 'master' into from_upstream
Conflicts:
	src/flash/nor/fespi.c
	src/jtag/drivers/ftdi.c
	src/rtos/FreeRTOS.c
	src/rtos/hwthread.c
	src/rtos/rtos.c
	src/rtos/rtos.h
	src/rtos/rtos_ecos_stackings.c
	src/rtos/rtos_embkernel_stackings.c
	src/rtos/rtos_standard_stackings.c
	src/rtos/rtos_standard_stackings.h
	src/rtos/rtos_ucos_iii_stackings.c
	src/server/gdb_server.c
	src/server/server.c
	src/target/riscv/riscv-013.c
	src/target/target.c
	src/target/target.h

Change-Id: If0924a3e799260c33fae5feb85975b1273b45a0f
2021-08-30 15:03:59 -07:00
Antonio Borneo a489058d7b rtos: rename CamelCase symbols
Only one exported symbol from eCos is included in this patch.
The eCos code is left untouched to prevent conflicts with patches
currently under review.

While there, remove an unused camelcase macro

Change-Id: I8d22dec6e243c00665d99a8b8ba00474b4f088db
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/6305
Tested-by: jenkins
Reviewed-by: Marc Schink <dev@zapb.de>
2021-07-02 17:11:13 +01:00
Tim Newsome 737f013ada
Support RV32/RV64 mainline/metal stackings (#586)
* Support mainline FreeRTOS instead of metal FreeRTOS

I'll have to add an option or something before this can be merged.

The stack pointer value for suspended threads is computed, and I didn't
check that it's right. Can't be written.
Does not support accessing gp/tp in suspended threads.

Change-Id: Ibe7f5167b970d5990a296e968df2b4480135d673
Signed-off-by: Tim Newsome <tim@sifive.com>

* Add riscv_freertos_stacking command.

This lets the user describe how registers are stored on the stack.

Change-Id: I052188fa9c6cb4f8670fa4b01a8878272ed6fc4d

* Redo how we handle offsets in FreeRTOS.

Instead of hard-coding them for each "target," hard code the data types
in FreeRTOS list structures, and compute the offsets based on size of
pointers and ubase_t types.

Doesn't work right now.

Change-Id: I444cd1ef47121190e2222f19a67edf3c6155a96a

* Correctly get thread list.

Works on RV32 and RV64.

Change-Id: I27768aef698475bef425d6a7e27ea609c9b9a1b6

* Fix SP calculation and RV64 register stacking.

Smoketest now passes on spike with both RV32 and RV64.

Change-Id: I94b43e041abe5370a833bd3afb4a2a8591538d7a
Signed-off-by: Tim Newsome <tim@sifive.com>

* Style fixes.

Change-Id: I269b5aac8c233022c41ebc8ac8c5aeb437882719
Signed-off-by: Tim Newsome <tim@sifive.com>

* Style fix.

Change-Id: I18fbff7dcaad9bd35f0942598c05c2a45bdb9f3b
Signed-off-by: Tim Newsome <tim@sifive.com>
2021-04-08 12:53:30 -07:00
Tim Newsome 50a5971be2
RISC-V Freertos support (#582)
Support reading names/status of all threads, as well as all registers that are stored on the stack.

Limited to RV32, no FPU.

---

* WIP

Change-Id: I09417c2e45748504be449d74c39ae0b6b311e277

* WIP

Change-Id: I975fa2cabbf43ccf64f5162337c394f9c8e3017f

* Import rbtreehash-list from gnulib.

The main change to get this to build was to remove 3 includes from
config.h (actual code change in configure.ac) because lib/Makefile.am
doesn't contain the correct flags to find the files referenced there.
Instead I sprinkled necessary includes throughout the source code.

This feels like less of a hack regardless, so hopefully that's OK.

I'm not actually using the new library. Just got it to build.

Change-Id: I824000d8be0b6f58b6f2036498b37c33f453515a

* Actually use linkedhash_map.

Moved some files around to get it to link. Also note I'm using a
different module than before. This is the one I want (I think right
now).

Change-Id: I6161bffd4b5f916602c33c1930be6e061cefe982

* Properly track TCB/threadid mappings.

Change-Id: I725abb96f880745d78c5634d5faff7385c2773e1

* OpenOCD no longer crashes reading rv32 freertos regs

Change-Id: Ia84502dbf007145995d4fba8661153ab7f58f26f

* WIP

The register values reported for threads that aren't the current thread
look believable to me.

Change-Id: I94b109565c8cc2029fa77657a7fc10291bcb36e3

* Correctly mark the current thread.

Change-Id: Id94ababb55a222292090e6465e47ebf92ca26291

* Try to make the build pass.

Change-Id: I0fddd10fe22c013464f9a1e106cd21470fa7afe1
Signed-off-by: Tim Newsome <tim@sifive.com>

* Exclude new gnulib files.

Change-Id: I8b95615908034124f2236422771b5079f3304e37
Signed-off-by: Tim Newsome <tim@sifive.com>

* Style fixes.

Change-Id: I4aef0b1d0b0e366893c740ab89756fe8ea033ddb
Signed-off-by: Tim Newsome <tim@sifive.com>

* Don't include string.h.

It breaks the i686-w64-mingw32-gcc build, which complains:
error: incompatible implicit declaration of built-in function ‘strndup’

Change-Id: I8d758fe092efa503e015f71f34721f2c44632516
Signed-off-by: Tim Newsome <tim@sifive.com>

* Hopefully fix mingw32 build.

Change-Id: I8703b834b5679588b3aa6602ae4add7258dbd879
Signed-off-by: Tim Newsome <tim@sifive.com>

* Include winsock2 in replacements.

Change-Id: I77cfc90736c771a3cdefb39062e6c5b59de52cd5
Signed-off-by: Tim Newsome <tim@sifive.com>

* Zero now gets the correct value.

Change-Id: Ia7da043439a82081629b8a5991ed8cbc382d5ac8
Signed-off-by: Tim Newsome <tim@sifive.com>

* Accommodate non-general regs on the stack.

Also refactor FreeRTOS a little to separate out target-specific code
from target-indepent code.

Change-Id: Icc74d85b24f35d069be091e32e23144573560e9f

* All registers now read sane values.

It appears that FreeRTOS wastes a space on the stack, where x0 would be
saved. Am I missing something?

Correctly read mstatus as it is saved on the stack as well. This same
mechanism should also work for FPU registers, although there's more work
to be done before we get there.

Change-Id: Iabacc3af2ab368aa7b9090c1ff719451a087b5ed
Signed-off-by: Tim Newsome <tim@sifive.com>
2021-03-05 15:52:33 -08:00
Marc Schink d4b7cbff88 Make #include guard naming consistent
Change-Id: Ie13e8af0bb74ed290f811dcad64ad06c9d8cb4fa
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/2956
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2016-05-24 22:30:55 +01:00
Marc Schink d0e763ac7e Remove FSF address from GPL notices
Also make GPL notices consistent according to:
https://www.gnu.org/licenses/gpl-howto.html

Change-Id: I84c9df40a774958a7ed91460c5d931cfab9f45ba
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/3488
Tested-by: jenkins
Reviewed-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2016-05-24 22:30:01 +01:00
Jonathan Dumaresq f5b7033742 RTOS support: Add FPU support for FreeRTOS
Add new structure for for working with FPU thread in thread view.
This modification support both stacking.
When FPU is activated, LR must be validated to check if the FPU
register are push on the stack. This is mandatory to find the correct
stack pointer position.

the modified code was inspired and adapted from

88d2003bb8

Change-Id: I6641926aa14e7216cacb399cbc8bb0db324cc9fc
Signed-off-by: Jonathan Dumaresq <jdumaresq@cimeq.qc.ca>
Reviewed-on: http://openocd.zylin.com/3397
Tested-by: jenkins
Reviewed-by: Sergey A. Borshch <sb-sf@users.sourceforge.net>
Reviewed-by: Harry Zhurov <harry.zhurov@gmail.com>
Reviewed-by: Anton Gusev
Reviewed-by: Михаил Цивинский <mtsivinsky@gmail.com>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2016-05-04 22:36:23 +01:00
Andrew Ruder afb083625c rtos: handle STKALIGN adjustments on cortex m
In the case that the STKALIGN bit is set on Cortex M processors, on
entry to an exception - the processor can store an additional 4 bytes
of padding before regular stacking to achieve 8-byte alignment on
exception entry.  In the case that this padding is present, the
processor will set bit (1 << 9) in the stacked xPSR register.  Use the
new calculate_process_stack callback to take into account the xPSR
register and use it on the standard Cortex_M3 stacking.

Note: Change #2301 had some misinformation regarding the padding.  On
Cortex-M the padding is stored BEFORE stacking so xPSR is always
available at a fixed offset.

Tested on a Cortex-M0+ (Atmel SAMR21) board which has STKALIGN fixed
to a '1' such that this alignment always occurs on non-aligned stacks.

Behavior of xPSR verified via the (bad-sorry) assembly program below by
setting a breakpoint on the SVC_Handler symbol.  The first time
SVC_Handler is triggered the stack was 0x20000ff8, the second time
SVC_Handler is triggered the stack was 0x20000ffc.  Note that in both
cases the interrupt handler gets 0x20000fd8 for a stack pointer.

GDB exerpt:

Breakpoint 1, 0x000040b6 in Reset_Handler ()
(gdb) hbreak SVC_Handler
Hardware assisted breakpoint 2 at 0x40f8
(gdb) cont
Continuing.

Breakpoint 2, 0x000040f8 in SVC_Handler ()
(gdb) print $msp
$3 = (void *) 0x20000fd8
(gdb) x/9w $msp
0x20000fd8:     0x1     0x2     0x3     0x4
0x20000fe8:     0x88160082      0xa53   0x40ce  0x21000000
0x20000ff8:     0x0
(gdb) cont
Continuing.

Breakpoint 2, 0x000040f8 in SVC_Handler ()
(gdb) print $msp
$4 = (void *) 0x20000fd8
(gdb) x/9w $msp
0x20000fd8:     0x1     0x2     0x3     0x4
0x20000fe8:     0x88160082      0xa53   0x40e8  0x21000200
0x20000ff8:     0x0

Assembly program:

	.cpu cortex-m0plus
	.fpu softvfp
	.thumb
	.syntax unified

.section .vectors
@ pvStack:
	.word	0x20001000
@ pfnReset_Handler:
	.word	Reset_Handler + 1
@ pfnNMI_Handler:
	.word	0
@ pfnHardFault_Handler:
	.word	0
@ pfnReservedM12:
	.word	0
@ pfnReservedM11:
	.word	0
@ pfnReservedM10:
	.word	0
@ pfnReservedM9:
	.word	0
@ pfnReservedM8:
	.word	0
@ pfnReservedM7:
	.word	0
@ pfnReservedM6:
	.word	0
@ pfnSVC_Handler:
	.word	SVC_Handler + 1

.section .text
.global Reset_Handler
Reset_Handler:
    cpsie i
    ldr r0, .stack_start
    ldr r2, .stack_last
    eors r1, r1
.loop_clear:
    str r1, [r0]
    adds r0, r0, #4
    cmp r0, r2
    bne .loop_clear
    subs r2, r2, #4
    mov sp, r2
    movs r0, #1
    movs r1, #2
    movs r2, #3
    movs r3, #4
    svc #0
    ldr r0, .stack_start
    ldr r2, .stack_last
    eors r1, r1
.loop_clear2:
    str r1, [r0]
    adds r0, r0, #4
    cmp r0, r2
    bne .loop_clear2
    mov sp, r2
    movs r0, #1
    movs r1, #2
    movs r2, #3
    movs r3, #4
    svc #0
.loop:
	b .loop
.align 4
.stack_start:
    .word 0x20000f00
.stack_last:
    .word 0x20000ffc

@ first call - 0x2000fff8 -- should already be aligned
@ second call - 0x2000fffc -- should hit the alignment code
.global SVC_Handler
SVC_Handler:
    bx lr

Change-Id: Id0940e6bbd6a59adee1378c0e86fe86830f0c8fc
Signed-off-by: Andrew Ruder <andrew.ruder@elecsyscorp.com>
Cc: Paul Fertser <fercerpav@gmail.com>
Cc: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Cc: Evan Hunter <evanhunter920@gmail.com>
Cc: Jon Burgess <jburgess777@gmail.com>
Reviewed-on: http://openocd.zylin.com/3003
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2015-10-30 23:44:04 +00:00
Andrew Ruder 9413a7a814 rtos: turn stack alignment into a function pointer
Some targets (Cortex M) require more complicated calculations for
turning the stored stack pointer back into a process stack pointer.
For example, the Cortex M stores a bit in the auto-stacked xPSR
indicating that alignment had to be performed and an additional 4
byte padding is present before the exception stacking.  This change
only sets up the framework for Cortex-M unstacking and does not
add Cortex-M support.

Note: this also fixes the alignment calculation nearly addressed by
change #2301 entitled rtos/rtos.c: fix stack alignment calculation.
Updated calculation is in rtos_generic_stack_align.

Change-Id: I0f662cad0df81cbe5866219ad0fef980dcb3e44f
Signed-off-by: Andrew Ruder <andrew.ruder@elecsyscorp.com>
Cc: Paul Fertser <fercerpav@gmail.com>
Cc: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Cc: Evan Hunter <evanhunter920@gmail.com>
Cc: Jon Burgess <jburgess777@gmail.com>
Reviewed-on: http://openocd.zylin.com/3002
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Tested-by: jenkins
2015-10-30 23:41:44 +00:00
Hsiangkai Wang 356f8a7412 nds32: support FreeRTOS
Change-Id: I117b5541fb19388c0f5c2344ee42d9151c9a222e
Signed-off-by: Hsiangkai Wang <hsiangkai@gmail.com>
Reviewed-on: http://openocd.zylin.com/1577
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-09-13 19:37:45 +00:00
Spencer Oliver 08d4411b59 update files to correct FSF address
Change-Id: I429f7fd51f77b0e7c86d7a7f110ca31afd76c173
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1426
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2013-06-05 19:52:42 +00:00
Evan Hunter 26902bb317 rtos: Add Cortex-R4 support for ThreadX
Change-Id: I0b55af690ed917ca783d90d11dcf012f49792ed7
Signed-off-by: Evan Hunter <ehunter@broadcom.com>
Reviewed-on: http://openocd.zylin.com/994
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-12-14 20:45:22 +00:00
Spencer Oliver 7b032df3aa build: cleanup src/rtos directory
Change-Id: I24bc62d12409dbfc20a0a986acf6b3f2c913e36d
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/416
Tested-by: jenkins
2012-02-06 10:50:26 +00:00
Broadcom Corporation (Evan Hunter) b69119668e RTOS Thread awareness support wip
- works on Cortex-M3 with ThreadX and FreeRTOS

Compared to original patch a few nits were fixed:

- remove stricmp usage
- unsigned compare fix
- printf formatting fixes
- fixed a bug with overrunning a memory buffer allocated with malloc.
2011-04-15 08:24:18 +02:00