* port to new migen
* streamline package/part specification
* add pullup (Series3, Series6) and pullnone (Series7) for unused pins
as xilinx impact/vivado do it.
* specify respective toolchains
* build Series7 with vivado (broader support, faster)
* point to prebuilt bitstreams at https://github.com/jordens/bscan_spi_bitstreams
Change-Id: Ibfef3d78f855b754425f3e6131e2e49fa111e09a
Signed-off-by: Robert Jordens <jordens@gmail.com>
Reviewed-on: http://openocd.zylin.com/3173
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Tested-by: jenkins
Reviewed-by: Robert Jördens
Reviewed-by: William D. Jones
Reviewed-by: Tim "mithro" Ansell <mithro@mithis.com>
The code memory size was a bug and seemed to be working by
accident since there happened to be 256 pages in the device that was
tested on which corresponded to 256kb.
Also don't fail if memory size != expected memory size based on hwid
as this hwid is unstable and should be used only for debug/diagnostics.
Change-Id: I4e98f7498a36c53fc51783eddfdaba704d30e3ca
Signed-off-by: Michael Dietz <mjdietzx@gmail.com>
Reviewed-on: http://openocd.zylin.com/3510
Tested-by: jenkins
Reviewed-by: Jiří Pinkava <j-pi@seznam.cz>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Currently if ftdi device is removed, OpenOCD will stall forever.
Only kill -9 will help in this case.
This patch makes use of libusb timeout functions and
trying to break out of while loop if some error is detected.
[andreas.fritiofson@gmail.com]: Add missing retval check
Change-Id: I97506190e376026705f14ef9fe37dc811b99b3ac
Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/3419
Reviewed-by: Andreas Färber <afaerber@suse.de>
Tested-by: jenkins
Believe in using defines to make maintenance easier.
Change-Id: I8edf151352131bbf2b884dfcd67ca5764b11b13c
Signed-off-by: Kent Brinkley <jkbrinkley.imgtec@gmail.com>
Reviewed-on: http://openocd.zylin.com/2350
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Tested-by: jenkins
Added new chip id based flash size.
Change-Id: I5b5e71074af0e50352443f66f88adfc6e14280bf
Signed-off-by: Peter Kuhar <peter@pkuhar.com>
Reviewed-on: http://openocd.zylin.com/3732
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
It's not a failure in the debugger or even a real problem if a user asks
to access memory that's not accessible.
Change-Id: I30b8424d5265d1996fe4826012ed160a83f0bc6c
Also only do work for debug RAM that actually exists on the target
(exposing the off-by-one error on 32-bit targets).
Change-Id: I37e0005b6a70e949286f1d6494716f3abea03c12
Read dtmcontrol's idle field to decide how many run-test/idle cycles are
required to communicate with the target.
In riscv_examine(), write and read all of Debug RAM to check the target
is at least somewhat sane.
Change-Id: Ieedb7a50418fa1f5e0d456cde53c52f7fc51662b
Old code would write 64 bytes of DRAM if the dbus was busy in
cache_write().
New code clears the dbus error condition when the bus is busy. (This
part is untested.)
Change-Id: Ia396fe819fa1828bb75726d85513b113cc9e13f0
Now logging is consistent and more readable.
I did remove most logging during riscv_poll() since it clutters up the
log/screen and is not generally helpful.
Users can use this register to inspect and change the privilege level of
the core. It doesn't make any assumptions about the actual underlying
debug mechanism (as opposed to having the user change DCSR directly,
which may not exist in all debug implementations).
Robert Jordens
Michael Dietz
Andreas Fritiofson
Andreas Färber
Kent Brinkley
Peter Kuhar
Spencer Oliver
Tim Newsome
Megan Wachs