Commit Graph

4251 Commits

Author SHA1 Message Date
Freddie Chopin 9c3b4cfc5d add correct CPUTAPID value for LPC2129
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-05-24 09:21:18 +01:00
Freddie Chopin 0e4f4bacdc Update "flash bank" helper comments for LPC2xxx chips
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-05-24 09:21:08 +01:00
Freddie Chopin 06df4664a9 LPC23xx and LPC24xx after reset run on internal 4MHz RC oscillator, so "flash bank" parameter should be 4000 (not 12000)
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-05-24 09:20:43 +01:00
Øyvind Harboe 2e1eaaae35 at91sam9260: use RCLK
It might be possible to get this target going without
RCLK, but it would require more careful analysis and
usage of the reset events.

Enable fast memory accesses.

Tested on an at91sam9260 custom board w/external DRAM
and flash.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-05-21 14:00:11 +02:00
Spencer Oliver 82ef8472bf cfg: update stm32 performance stick config
- As this is a complete unit, including jtag we might as welli nclude
the jtag cfg.
 - Add missing id for the str750 that is also in the jtag chain.
 - Reduce jtag startup speed to 500kHz.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-05-21 11:45:40 +01:00
Spencer Oliver c0cdb7c631 arm_adi_v5: correct ahbap_debugport_init mem-ap id (bug #23)
We request a id register read at the end of ahbap_debugport_init
but we never actually run the queue. In some cases this causes a
segfault.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-05-21 11:43:17 +01:00
Jon Povey 72ba8ec90e board: dm355evm.cfg SDTIMR0/1 minor naming fix
Register name fix; ref. TI document sprueh7d

Signed-off-by: Jon Povey <jon.povey@racelogic.co.uk>
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-05-21 07:31:40 +02:00
gcembed f40faeb349 nand : Add Freescale iMX27 nand flash controller support
This patch add support of iMX27 nand flash controller. This is based on
driver for imx31 nand flash controller.
OOB functionality is not fully working. As in mx31 controller, mx2 NFC
has a bug that swap two bytes between SPARE and MAIN buffer.
I used this driver for several months and no problems appear.
2010-05-20 08:28:36 +02:00
Gary Carlson 8465e99442 reset: fix reset halt bug
I was finally able to figure out the cause of this problem.  There are two
parts to the patch.  The first patch modifies the configuration file I
originally generated for the Atmel AT91SAM9G20 board and achieves the
following:

+++ Splits the reset-init handler into a reset-start handler for some of the
initial configuration activities and keeps the remainder in the reset-init
handler as was the case before.  This was the real issue that was causing
the timing problems I identified before.  This solution was confirmed with
an o-scope on actual target hardware.

+++ Adds a new instruction in the reset-start handler to disable fast memory
accesses in the reset-start handler.  When the target jtag clock is started
out at 2 kHz during system clock initialization, memory writes (i.e.
register write to enable external reset pin -- basically to RSTC_MR) are
naturally slow and cause GDB keep-alive issues (refer to PATCH 2/2 for
additional fixes).

+++ Modifies the configuration file to use srst_only reset action. The
reset-start/reset-init handler split also now allows the correct behavior to
be used in the configuration file (previously had to use both SRST and TRST
even though only SRST is actually used and connected on the evaluation
board).

+++ Adds external NandFlash configuration support to take advantage of flash
driver added earlier.  Doesn't fix any bugs but adds functionality that was
marked as TBD before and thrown in when I did other work on the
configuration file.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-05-19 07:37:07 +02:00
Gary Carlson b80d0501b6 target: slow targets could cause GDB to time out
This second half of the patch is proposed to clean up some GDB keep alive
issues on arm7_9 targets that start up with very slow clocks.  If an attempt
is made to write to key registers on the processor with a slow jtag speed,
GDB timeout warnings appear on the console (at least mine) when "reset halt"
or "reset init" commands are issued from the gdb client:

*** BEFORE PATCH ***

(gdb) monitor reset init
fast memory access is disabled
2 kHz
keep_alive() was not invoked in the 1000ms timelimit. GDB alive packet not
sent! (1026). Workaround: increase "set remotetimeout" in GDB
JTAG tap: at91sam9g20.cpu tap/device found: 0x0792603f (mfg: 0x01f, part:
0x7926, ver: 0x0)
target state: halted
target halted in ARM state due to breakpoint, current mode: Supervisor
cpsr: 0x000000d3 pc: 0x00000000
MMU: disabled, D-Cache: disabled, I-Cache: disabled
keep_alive() was not invoked in the 1000ms timelimit. GDB alive packet not
sent! (1027). Workaround: increase "set remotetimeout" in GDB
keep_alive() was not invoked in the 1000ms timelimit. GDB alive packet not
sent! (1006). Workaround: increase "set remotetimeout" in GDB
keep_alive() was not invoked in the 1000ms timelimit. GDB alive packet not
sent! (1006). Workaround: increase "set remotetimeout" in GDB
keep_alive() was not invoked in the 1000ms timelimit. GDB alive packet not
sent! (1006). Workaround: increase "set remotetimeout" in GDB
keep_alive() was not invoked in the 1000ms timelimit. GDB alive packet not
sent! (1004). Workaround: increase "set remotetimeout" in GDB
RCLK - adaptive
dcc downloads are enabled
fast memory access is enabled
NAND flash device 'NAND 256MiB 3,3V 8-bit' found
(gdb)

I added additional keep alive steps in areas that troubleshooting revealed
were causing problems.  I only did this however for non-fast write memory
accesses.  I don't think most people would be using fast memory accesses to
write to memory when the jtag and system clocks are slow anyway.

If you disagree with my feeling, think there is a more elegant way to handle
the problem, or think the patch will cause other unforeseen problems with
other targets, let me know.  As you can see below, the patch does eliminate
the problem on my development station and I suspect that it will benefit
others.

*** AFTER PATCH ***

(gdb) monitor reset init
fast memory access is disabled
2 kHz
JTAG tap: at91sam9g20.cpu tap/device found: 0x0792603f (mfg: 0x01f, part:
0x7926, ver: 0x0)
target state: halted
target halted in ARM state due to breakpoint, current mode: Supervisor
cpsr: 0x000000d3 pc: 0x00000000
MMU: disabled, D-Cache: disabled, I-Cache: disabled
RCLK - adaptive
dcc downloads are enabled
fast memory access is enabled
NAND flash device 'NAND 256MiB 3,3V 8-bit' found
(gdb)

Gary Carlson

Gary Carlson, MSEE
Principal Engineer
Carlson-Minot Inc.
2010-05-19 07:33:27 +02:00
Øyvind Harboe c86d7bdad4 jim: fix bug in tcl "puts"
tcl "puts" didn't work because the logging code sensored strings
that did not include a '\n'. The correct thing is to sensor
empty strings, which are used to keep gdb connection alive.

The tcl "puts" code broke apart strings which do contain '\n' in
order to implement the -nonewline argument, which is how it
got hurt by the bug in log.c

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-05-18 12:34:12 +02:00
Øyvind Harboe e804a34a63 zy1000: fix false positive warning about unitialized local variable
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-05-18 12:10:44 +02:00
Marc Pignat e92b203a76 at91rm9200 : reset_config should go to the board config file
Let other boards do other things with srst and trst.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-05-18 11:48:47 +02:00
Jon Povey dc464ad88e NAND/davinci: Fix segfault for hwecc4_infix reads
Page reads using hwecc4_infix layout segfaulted for check_bad_blocks because
the read assumed a valid data buffer, which check_bad_blocks does not use
(it only passes a 6 byte buffer for the start of OOB).

This version copes with undersized or missing data or oob buffers and uses
random read commands within the page to skip unwanted areas of data/OOB for
speed.

NOTE: Running check_bad_blocks with this layout will be reading infix
OOB locations, not manufacturer bad block markers. This means that if you
check blocks written in infix layout they will appear good, but manufacturer-
marked bad blocks may also appear good.
If you want to scan for manufactuer-marked bad blocks, you need to enable
raw_access before running check_bad_blocks, or use the non-infix layout.

Signed-off-by: Jon Povey <jon.povey@racelogic.co.uk>
CC: David Brownell <dbrownell@users.sourceforge.net>
2010-05-18 09:25:03 +02:00
Jon Povey fafed75d98 NAND: catch read errors when building BBT
nand_build_bbt() was ignoring the return value from nand_read_page() and
blindly continuing.
It now passes the return value up to the caller if the read fails.

Signed-off-by: Jon Povey <jon.povey@racelogic.co.uk>
2010-05-18 09:23:48 +02:00
Spencer Oliver 3ecc191b36 gdbserver: gdb cmds returning failure on success
The gdb_memory_map cmd for example fell through and returned
ERROR_COMMAND_SYNTAX_ERROR on success - behaviour is now as expected.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-05-17 10:17:58 +01:00
Jon Povey 5fd1c2db9a Change kb/s to KiB/s in messages about kibibytes
Change download rate messages about kibibytes from "kb/s" to "KiB/s" units.
See: http://en.wikipedia.org/wiki/Data_rate_units

Signed-off-by: Jon Povey <jon.povey@racelogic.co.uk>
2010-05-16 13:55:01 +02:00
Antonio Borneo 76b81682ee NOR/CFI: minor code cleanup
Remove few LOG_DEBUG() messages, together with code and
variables required to build such messages.

Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2010-05-16 13:39:47 +02:00
Antonio Borneo 602685e66f NOR/CFI: add cfi_read() implementation
Final step to force bus_width size during CFI flash
read.

Added CFI specific implementation cfi_read() that uses
only accesses at bus_width size.

Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2010-05-16 13:39:47 +02:00
Antonio Borneo bc8be110ff NOR: add read() callback to struct flash_driver
Final target is to force bus_width size during CFI flash
read.
In this first step I need to replace default flash read
with flash specific implementation.
This patch introduces:
- flash_driver_read() layer;
- default_flash_read(), backward compatible;
- read() callback in struct flash_driver;
- proper initialization in every flash_driver instance.

Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2010-05-16 13:39:47 +02:00
Antonio Borneo 24ebfffff5 NOR/TCL: fix typo in error message
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2010-05-16 13:39:47 +02:00
Antonio Borneo feb95fbb7b NOR: fix comment for Doxygen
Either bus_width and chip_width are in bytes.

Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2010-05-16 13:39:47 +02:00
Antonio Borneo ebdd3a1670 NOR/CFI: remove use of cfi_add_byte()
Remove the function cfi_add_byte() and rewrite the only
instance of it.

Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2010-05-16 13:39:47 +02:00
Antonio Borneo 34f70956ed NOR/CFI: use bus_width for memory access in cfi_write()
During cfi_write(), head and tail of destination area
could be not aligned to bus_width.
Since write operation must be at bus_width size, source
buffer size is extended and buffer padded with current
values read from flash.

Force using bus_width to read current value from flash.
Do not use cfi_add_byte() anymore, to allow removing this
function later on.

Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2010-05-16 13:39:47 +02:00
Antonio Borneo a69cbf0f74 NOR/CFI: use bus_width for memory access on flash ID.
NOR flash structure requires each access to be bus_width wide.
Fix read of flash ID accordingly to rule above.
Add case (chip_width == 4), allowed by CFI spec and coherent
with current value of CFI_MAX_CHIP_WIDTH but currently not
used by any target.

Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2010-05-16 13:39:47 +02:00
Antonio Borneo 61bb0d3d23 NOR/CFI: identify memory accesses not using "bus_width".
Since NOR flash devices does not handle "byte enable lanes",
each read/write access involves the whole "chip_width".
When multiple devices are in parallel, usually all chips are
enabled during each access.
All such cases are compatible with flash accesses at
"bus_width" size.

Access at "bus_width" size is mandatory for write access to
avoid transferring of garbage values to flash.
During read access the flash controller should take care,
and discard unneeded bytes. Anyway, it is good practice to
use "bus_width" size also for read.

Every memory access that does not respect "bus_width" size
is marked with a "FIXME" comment.

Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2010-05-16 13:39:47 +02:00
Antonio Borneo 89747f81f2 NOR/CFI: simplify bufferwsize computation
Review and simplify computation of bufferwsize.
Add comments about variables' meaning.

The same code is present 3 times in the file.
Current patch updates all the 3 instances.

Step 1)
  Replace "switch(bank->chip_width) {...}".
  Illegal values of bank->chip_width are already dropped.
  For legal values, the code is equivalent to:
        bufferwsize = buffersize / bank->chip_width;

Step 2)
  The above code replacement plus the following line:
        bufferwsize /= (bank->bus_width / bank->chip_width);
  is merged in a single formula:
        bufferwsize = (buffersize / bank->chip_width) /
                (bank->bus_width / bank->chip_width);
  and simplified as:
        bufferwsize = buffersize / bank->bus_width;

Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2010-05-16 13:39:47 +02:00
Antonio Borneo c7b269ace1 NOR/CFI: check "flash bank" command arguments
Arguments chip_width and bus_width of command "flash bank" are
not fully checked.
While bus_width is later on redundantly checked in several other
parts (e.g. in cfi_command_val()) and generates run-time error,
chip_width is never checked, nor related to actual bus_width
value.
Added check to avoid:
- (chip_width == 0), that would mean no memory chip at all,
  avoiding also division by zero e.g. in cfi_get_u8();
- (bus_width == 0), that would mean no bus at all;
- unsupported cases of chip_width or bus_width value not power
  of 2;
- unsupported case of chip width wider than bus.

Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2010-05-16 13:39:47 +02:00
Jun Ma b8c54b362b comments on doc/manual/primer/jtag.txt
1. fix some errors in jtag.txt(in my personal opinion, please review).
2. remove a broken link

Signed-off-by: Jun Ma <sync.jma@gmail.com>
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-05-15 10:07:55 +02:00
Jun Ma 9597dcefaa missing pointer's declaration when enable macro -D_DEBUG_GDB_IO_.
reproducable when "./configure --enable-maintainer-mode CFLAGS=-D_DEBUG_GDB_IO_"

Signed-off-by: Jun Ma <sync.jma@gmail.com>
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-05-14 15:08:29 +02:00
Jon Povey dcca0b7694 NAND: fix first and last handling in nand_build_bbt
Last block was being skipped, fix by changing the loop test from "<" to "<="

First block argument was ignored, always started from block 0 (and counted
the wrong blocks as bad if first was nonzero). Now we use it.

Signed-off-by: Jon Povey <jon.povey@racelogic.co.uk>
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-05-14 13:23:01 +02:00
Jon Povey 0eb7fb59a0 NAND: fix off-by-one error in erase command argument range
The last_block argument to nand_erase() is checked against nand->num_blocks,
but the highest valid block number is (total - 1), the test for invalid should
be ">=" rather than ">".

Signed-off-by: Jon Povey <jon.povey@racelogic.co.uk>
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-05-14 13:22:59 +02:00
Spencer Oliver 215a5f7442 scripts: update flash bank names
As the flash bank name is now unique update the scripts to suit.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-05-13 20:44:08 +01:00
Spencer Oliver a7fb60dc7b flash: require unique flash bank name
Make sure the flash bank name is unique

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-05-13 20:44:07 +01:00
Spencer Oliver 7b36d2a229 flash: add flash bank name support
flash cmds can now be passed either the bank name or the bank number.
For example.
flash info stm32.flash
flash info 0

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-05-13 20:44:07 +01:00
Øyvind Harboe 7b76da57f4 zy1000.cfg: gdb connect will fail first time without gdb-attach
gdb-attach does a reset init to make sure that the CFI probe
will succeed upon first gdb connect.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-05-12 13:45:04 +02:00
Jun Ma b05f8171c9 fix instruction refilling bug when using software breakpoints on a big-endian arm926ej-s system
Signed-off-by: Jun Ma <sync.jma@gmail.com>
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-05-12 13:37:33 +02:00
Karl Kurbjun 6f03e92959 Fujitsu MBM29SL800TE flash support
Hi,

This is my first post to the list.  First, I would like to thank
everyone for their work on OpenOCD, it is a great tool to work with.  I
have been using it to debug code on hardware for the Rockbox project
(www.rockbox.org).

The target that I primarily work with has a Spansion/Fujitsu NOR flash
(MBM29SL800TE).  I attached a patch that adds support for this flash.  I
hope it can be included in the main repository.  If there is something
that needs to be changed with the patch before inclusion please let me
know.

-Karl Kurbjun
2010-05-11 20:10:08 +02:00
Marc Pignat 4e022886d6 Documentation: consistency in GDB command name
Always use the complete name of the GDB command, not an abbreviation.
2010-05-11 20:01:18 +02:00
Marc Pignat 4cf13101e5 Documentation : arm920t implements armv4
There is a small typo in the cpu list, arm920t is armv4.
2010-05-11 20:01:18 +02:00
Spencer Oliver 3650981de7 mips32: 20 second timeout/megabyte for CRC check
There was a fixed 20 second timeout which is too little
for large, slow timeout checks.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-05-10 15:39:56 +01:00
Spencer Oliver 2ae192699f armv7m: 20 second timeout/megabyte for CRC check
There was a fixed 20 second timeout which is too little
for large, slow timeout checks.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-05-10 15:39:46 +01:00
Spencer Oliver bbc8f4e6ce cfi: add Numonyx M29W128G reset workaround
The ST/Numonix M29W128G has an issue when a 0xff cmd is sent,
it cause an internal undefined state. The workaround according
to the Numonyx is to send another 0xf0 reset cmd

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-05-10 15:39:29 +01:00
Spencer Oliver cf811d8e6b cfg: add stm32eval board configs
Increase working area for stm3210e_eval.cfg.
Add new configs for the following boards:
STM321000B-EVAL, STM32100C-EVAL, STM32100B-EVAL

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-05-07 14:24:13 +01:00
Spencer Oliver f32492c74f server: incorrectly display socket port number
c->sin.sin_port does not contain a valid port number so just use
service->port as this is always correct.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-05-06 22:51:20 +01:00
Øyvind Harboe 737c9b6258 flash: stop caching protection state
There are a million reasons why cached protection state might
be stale: power cycling of target, reset, code executing on
the target, etc.

The "flash protect_check" command is now gone. This is *always*
executed when running a "flash info".

As a bonus for more a more robust approach, lots of code could
be deleted.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-05-05 15:24:25 +02:00
Øyvind Harboe f7e0f3c285 flash: erase_address now has an unlock option
Quite useful to be able to unlock the flash, just like in
the flash write_image cmd.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-05-05 15:24:25 +02:00
Øyvind Harboe 3077f5845f cfi: fix error handling for protect fn
No error was propagated.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-05-05 15:24:24 +02:00
Øyvind Harboe 2fba796e27 zy1000: fix tcl command to read power dropout status
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-05-05 15:24:24 +02:00
Øyvind Harboe 82ea640830 gdb: connect will now fail if flash autoprobe fails
This stops GDB from launching with an empty memory map,
making gdb load w/flashing fail for no obvious reason.

The error message points in the direction of the gdb-attach
event that can be set up to issue a halt or "reset init"
which will put GDB in a well defined stated upon attach
and thus have a robust flash autoprobe.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-05-05 15:24:24 +02:00