Commit Graph

8921 Commits

Author SHA1 Message Date
Jonathan McDowell d2fb461621 Correct ZynqMP configuration to be appropriately named
The xilinx_ultrascale.cfg target is actually the configuration for a
ZynqMP, which is a combination of an UltraScale+ FPGA core and a quad
core A53. Update the filename/comments to reflect this, and include
the tap IDs for all known FPGA cores for this part.

Change-Id: I70dfcc99861a482b83b6a795e83021d9cf1fe047
Signed-off-by: Jonathan McDowell <noodles@earth.li>
Reviewed-on: http://openocd.zylin.com/4850
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-01-23 15:26:48 +00:00
Antonio Borneo 45b4998e93 arm_opcode: fix encoding of ARMv5 breakpoint instruction
The encoding of BKPT instruction is 0xE12###7#, where the four '#'
characters should be replaced by the 16 bits immediate value.
The macro uses an incorrect shift amount, thus the immediate value
is not properly coded and bits 20~23 of the opcode could get
corrupted.

Fixed by using the proper shift amount.

Change-Id: I32db8224ab57aad6d3b002f92f9f259056593675
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4854
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-01-23 15:26:39 +00:00
Antonio Borneo c2e18bfaea arm_adi_v5: fix and update sequences to spec IHI 0031E
Fix the SWD line reset sequence accordingly to Arm specification IHI
0031E that requires at least 2 idle clocks after the 50 clocks with
SWDIO high.
Fix the value of the activation code in the (currently unused)
sequence dormant-to-SWD.
Make each sequence's length multiple of 8, so it is compatible with
adapters that have such limitation (e.g. buspirate) and try to split
and comment each part of the sequence (when possible keep each part
byte aligned, inspired from commit 3ef9beb52c). This slightly
increases the sequence length but does not impact run-time
performance because these are rarely used sequences.
Add the missing sequence dormant-to-JTAG and JTAG-to-dormant, not
used yet.

On devices that implements the dormant state, IHI 0031E deprecates
the direct switching between SWD and JTAG, and recommends using a
transition through dormant. This is not implemented.

Change-Id: Iad18c0e736cfd9366be175d22658d664b0c61eab
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4851
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-01-23 15:26:28 +00:00
Tomas Vanek 418515b21e target/arm_dap: fix segmentation fault in 'dap info' cmd
'dap info' command fails hard on a hla target.

Change-Id: Ia188b1afe527e0ed64512d1bddadd507f978e40b
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4860
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2019-01-23 15:25:53 +00:00
Tim Newsome 906635c4bd Move version check until after dmactive=1.
This should allow OpenOCD to work with targets where version is not
readable when dmactive=0, which is allowed by the spec.
2019-01-22 12:48:47 -08:00
Mirko Vogt 8896abbf07 nrf5: add nrf5 device definition for HWID 0x00E3
This hardware id is e.g. used by the Insight SiP ISP1507-AX.

Change-Id: I82568d292f9882372ab061d8e3e36906b0cc5882
Signed-off-by: Mirko Vogt <mirko.vogt@sensorberg.com>
Reviewed-on: http://openocd.zylin.com/4845
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
2019-01-21 00:01:16 +00:00
Tim Newsome c296c62521 Halt all SMP harts on halt request.
38/45 tests pass.

Change-Id: Ia4fd523139c197020d9277be4bf5f92079520068
2019-01-18 13:18:15 -08:00
Tim Newsome 348f15315e Don't reset current thread id on single step.
Now passing 36/45 tests.

Change-Id: I244b045f84397b058cf526e3bff238cb05d8ad06
2019-01-18 11:34:26 -08:00
Tim Newsome c1ef5f61c3 Fix reading of non-general registers for hwthread
Previously the code made the assumption (which is valid for conventional
RTOSs) that special registers (e.g. CSRs) are the same across threads.

26/45 tests pass.

Change-Id: Ibb3398790d7354a995d506772375d869f608f1f0
2019-01-17 15:01:47 -08:00
Tarek BOCHKATI d140fb27c6 cortex_m: fix bug in poll() machine state (external resume awareness)
This patch covers the fact that cortex_m could be resumed externally by
Cross Trigger Interface or by direct write to DHSCR ...

To reproduce:
 - halt the target
 - then run the core through DHCSR (mww 0xe000edf0 0xa05f0001)
 => this resumes the core, but target state in OpenOCD remains HALTED.

Change-Id: Ifa1ae18645bfeb863acc78a039bbf04873fd78fe
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/4817
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-01-16 10:53:24 +00:00
Tarek BOCHKATI 63aa917015 cortex_a_poll: minor code factorization to enhance readability
cortex_a_debug_entry and update_halt_gdb are called in two consecutive
conditions which are complementary, so externalizing the common code
makes the conditions' body lighter

With the removal of LOG_DEBUG(" ") since it does not look too informative

Change-Id: I0c54e413619576bb3af164f2dcf256c5a862c5fd
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/4832
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
2019-01-16 10:52:43 +00:00
Severin Junker c915e70568 at91samd: added SAM-DA1 parts
Change-Id: I1b206461052ee1897432e379505fdf95372a9e24
Signed-off-by: Severin Junker <s.junker@cartelsol.com>
Reviewed-on: http://openocd.zylin.com/4835
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-01-16 10:52:06 +00:00
Antonio Borneo c4a7a62262 helper/command: check for malloc failure in __command_name
If malloc fails in __command_name, the following strcpy will
segfault, thus preventing __command_name to return.
The actual calls to command_name() implement the correct check
for the NULL pointer, but propagate error -ENOMEM, that is not
an error value coherent within OpenOCD. Plus, in one case it
overwrites an already detected error.

Check the pointer returned by malloc and, in case of failure,
issue an error message and return the NULL pointer.
Let the caller of command_name() to keep the already detected
error or to return ERROR_FAIL in case of end of memory.

Change-Id: I151a24569409777dd5bc09a3daf5dba2b8e2829b
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4838
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-01-16 10:51:28 +00:00
Tomas Vanek c0ec54d8ae target/stm8: add missing destroy_reg_param()
Change-Id: Ibd8a423a4400226790cfbb9a6f113b7ea762c436
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4814
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Ake Rehnman <ake.rehnman@gmail.com>
2019-01-14 08:46:36 +00:00
Antonio Borneo 87adca299d drivers/sysfsgpio: fix usage messages
The notation "(tck tms tdi tdo)* " is incorrect, because it means the
quadruple of gpio can be repeated on the command-line.
The correct syntax of the command requires instead to provide either
all the four gpio numbers (in order to set the values) or to pass an
empty command-line (to dump the values previously set).

Change the .usage field to "[tck tms tdi tdo]".
Change similarly the corresponding .usage field for SWD command.
Add the .usage field for the commands that individually set each gpio.

Change-Id: If5b3c618097b71dfe7fcf988fb3c1499ae03a6d5
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4833
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-01-14 08:45:35 +00:00
Tim Newsome c84d56debc rtos support to write registers on current thread
I don't understand how it was ever possible to change the registers on a
thread that's not the current active one when a halt happened. Really
instead of the RTOS tracking what the currently selected thread is, it
would make more sense to have gdb_server do that and simply pass it
along in every call to the RTOS layer.

Now MulticoreRegTest passes.

Change-Id: I399b9b2b05a147aa6b41463714ed3a39534b1fc8
2019-01-11 13:53:53 -08:00
Tim Newsome 31ea7037b3 Add flash support for SiFive's Freedom E platforms
Valgrind and Clang Static Analyzer have no complaints about this change.

Change-Id: I7757615ec52448372bdc57729cdf97c7016d97e8
Signed-off-by: Tim Newsome <tim@sifive.com>
Reviewed-on: http://openocd.zylin.com/4656
Tested-by: jenkins
Reviewed-by: Philipp Guehring <pg@futureware.at>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-01-11 19:50:09 +00:00
Tim Newsome 1599853032
Merge pull request #345 from darius-bluespec/set_ir
Add 'riscv set_ir' command to set IR value for JTAG registers.
2019-01-11 08:44:59 -08:00
Tim Newsome 02ece46105 Clean up register caching a little.
Change-Id: Id039aedac44d9c206ac4bd30eb3ef754e190c3fe
2019-01-10 12:32:03 -08:00
Darius Rad 00b591a09a Add 'riscv set_ir' command to set IR value for JTAG registers.
This allows using different TAP addresses, for example, if using
BSCANE2 primitives on a Xilinx FPGA.
2019-01-09 17:20:39 -05:00
Tim Newsome fe1280438b
Merge pull request #344 from riscv/idle
Deal with DMI busy in block reads/writes
2019-01-09 11:35:09 -08:00
Tim Newsome e6b6aa615b Add comment for reset_delays_wait.
Also refactor so there's just one of them in riscv, instead of one for
0.11 and one for 0.13.

Change-Id: I0dbbf112b4c57f76bed971a22dadf844fa27cd4e
2019-01-08 14:01:25 -08:00
Austin Phillips 42d8fa899c stlink_usb: Submit multiple USB URBs at once to improve performance
Commands to stlink devices are typically comprised of multiple
transactions with each transaction completing before moving to the next.
This change allows for multiple USB transactions to be issued at once
followed by a check that all transactions completed successfully.  This
improves performance on some machines where there is a large turn-around
time between USB transfers such as is seen on some virtual machines.

This change is only supported when compiled with libusb1 as libusb1
supports and asynchronous interface.

Multi-transaction queueing introduced in this change paves the way for
improving speed of other transactions in the future such as memory and
register reads where multiple USB transactions in succession are
required to complete a command.  Multiple USB transactions can be
submitted at once using jtag_libusb_bulk_transfer_n function.

Change-Id: I924e049217a789ef445b14e00aa1983576970fbf
Signed-off-by: Austin Phillips <austin_phillips@hotmail.com>
Reviewed-on: http://openocd.zylin.com/4484
Tested-by: jenkins
Reviewed-by: Andreas Bolsch <hyphen0break@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2019-01-08 10:05:36 +00:00
Antonio Borneo 3792f3c114 libusb: add debug message on adapter not found due to wrong serial
When few adapters of the same type are in use, the serial string is
the way to select the right one.
Currently a serial string that does not match any of the connected
adapters will just fail the open, without specific information to
track the issue.

Add a specific message to highlight that the open failure is caused
by a serial mismatch.

Change-Id: I5cb77f1045cc746e532d395b2e5ced40a23ab638
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4701
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2019-01-08 10:04:42 +00:00
Antonio Borneo bf7a363b44 jtag/drivers/usb_common: return oocd error values
Where possible, keep the same style for returning error.

Change-Id: I3a04220c0b9f129a36e9fe83038b7c19dd57fe61
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4699
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2019-01-08 10:02:43 +00:00
Antonio Borneo 1b8091d253 libusb0: return oocd error values
Commit d1b7437633 fixes libusb1 to
return OpenOCD error values instead of negative errors in Linux
kernel's style.
The same fix should be applied to libusb0 too.

Fix return value of libusb0 to uniform it to OpenOCD style.

Change-Id: I68478c29c91c6be720074f58c432fe51477e03ed
Fixes: d1b7437633 ("libusb: return oocd error values")
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4698
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2019-01-08 10:01:48 +00:00
Antonio Borneo 3799eded67 target/aarch64: add support for multi-architecture gdb
GDB can be built for multi-architecture through the command
	./configure --enable-targets=all && make
Such multi-architecture GDB requires the target's architecture to
be selected either manually by the user through the GDB command
"set architecture" or automatically by the target description sent
by the remote target (i.e. OpenOCD).

Commit e65acd889c ("gdb_server: add
support for architecture element") already provides the required
infrastructure to support multi-architecture gdb.

aarch64-linux-gnu-gdb 8.2 uses "aarch64" as default architecture,
but also supports the value "aarch64:ilp32" and all the values
supported by arm-none-eabi-gdb.
These values can be displayed on arm gdb prompt by typing
"set architecture " followed by a TAB for autocompletion.

Set the gdb architecture value for aarch64 target to "aarch64".

Change-Id: I63e9769f47d8e73f048eb84fa73e082dd1c8e52c
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4755
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2019-01-08 10:00:09 +00:00
Antonio Borneo 5c941edc7b target/arm: add support for multi-architecture gdb
GDB can be built for multi-architecture through the command
	./configure --enable-targets=all && make
Such multi-architecture GDB requires the target's architecture to
be selected either manually by the user through the GDB command
"set architecture" or automatically by the target description sent
by the remote target (i.e. OpenOCD).

Commit e65acd889c ("gdb_server: add
support for architecture element") already provides the required
infrastructure to support multi-architecture gdb.

arm-none-eabi-gdb 8.2 uses "arm" as default architecture, but also
supports the following values: "arm_any", "armv2", "armv2a",
"armv3", "armv3m", "armv4", "armv4t", "armv5", "armv5t", "armv5te",
"armv5tej", "armv6", "armv6k", "armv6kz", "armv6-m", "armv6s-m",
"armv6t2", "armv7", "armv7e-m", "armv8-a", "armv8-m.base",
"armv8-m.main", "armv8-r", "ep9312", "iwmmxt", "iwmmxt2", "xscale".
These values can be displayed on arm gdb prompt by typing
"set architecture " followed by a TAB for autocompletion.

Set the gdb architecture value for all arm targets to "arm".

Change-Id: I176cb89878606e1febd546ce26543b3e7849500a
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4754
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2019-01-08 09:59:42 +00:00
Antonio Borneo 97afb8b372 target/stm8: add support for multi-architecture gdb
GDB can be built for multi-architecture through the command
	./configure --enable-targets=all && make
Such multi-architecture GDB requires the target's architecture to
be selected either manually by the user through the GDB command
"set architecture" or automatically by the target description sent
by the remote target (i.e. OpenOCD).

Commit e65acd889c ("gdb_server: add
support for architecture element") already provides the required
infrastructure to support multi-architecture gdb.

The gdb patches for stm8 are still not merged in the official
repository and are temporarily hosted in
	https://stm8-binutils-gdb.sourceforge.io/
The latest patch set
	stm8-binutils-gdb-sources-2018-03-04.tar.gz
define only one possible value ("stm8") for this architecture; it
can be displayed typing "set architecture " followed by a TAB for
autocompletion in gdb for stm8.

Set the gdb architecture value for stm8 to "stm8".

Change-Id: I643ceba662de46cecf061d1dc672b9178a077f1b
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4753
Tested-by: jenkins
Reviewed-by: Ake Rehnman <ake.rehnman@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2019-01-08 09:58:17 +00:00
Cody P Schafer 49bd64347a armv7m: always set xPSR.T=1 when starting an algorithm
xPSR.T sets the processor to Thumb mode when set to 1. ARMv7-M only
supports execution of Thumb instructions, so it must always be set to 1.

If xPSR.T is set to 0 on armv7m, a usage fault is generated when a
instruction execution is attempted.

On armv7m, issuing a reset causes the vector table to be examined. PC
and xPSR.T  are loaded from the vector table at byte offset 4. xPSR.T is
taken from the least significant bit this value, PC from the remaining
bits.  This occurs even with `reset halt`, as the reset itself causes
this load to occur without the execution of any instructions.

As a result of this, following a reset with a "bad" value programmed in
the vector table, openocd would be unable to run algorithms on the
target, as running them would immediately result in a usage fault due to
xPSR.T being unset (0).

Allow algorithms to run regardless of the content of the vector table by
explicitly setting xPSR so that xPSR.T=1 prior to executing an
algorithm. One can think of this as openocd more closely emulating a
reset or branch instruction in executing it's algorithms.

Ticket: https://sourceforge.net/p/openocd/tickets/203/
Signed-off-by: Cody P Schafer <openocd@codyps.com>
Change-Id: I4dc3427ab195d06c3fd780ea768027fefccc4c28
Reviewed-on: http://openocd.zylin.com/4658
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2019-01-08 09:56:48 +00:00
Edward Fewell 5fd1cb0e5b icepick.cfg: add cancel reset bit to TAP register writes
The Agama family of devices (CC26x2/CC13x2) required an
additional bit to be set when adding the core's TAP into
the scan chain. The cancel reset bit 0x10000 tells the
ICEPick to take the bus out of reset so that the other
bits will take effect. This bit is a NOP on other devices
and ICEPicks, so the change shouldn't adversely affect
other devices.

Change-Id: I9245eef0936ea7eea28ae84ab5e8ce05fa63af40
Signed-off-by: Edward Fewell <efewell@ti.com>
Reviewed-on: http://openocd.zylin.com/4789
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2019-01-08 09:51:13 +00:00
Edward Fewell 615a066629 drivers: xds110: Add support for XDS110 stand-alone probe
The XDS110 stand-alone version has the ability to supply
voltage to the target board via it's AUX FUNCTIONS port.
Added command to enable setting the voltage on the XDS110
stand-alone.

Change-Id: I2f21c4a3d15ed99e649f3a83973c5e724c4bfeb6
Signed-off-by: Edward Fewell <efewell@ti.com>
Reviewed-on: http://openocd.zylin.com/4793
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2019-01-08 09:49:03 +00:00
Jerome Forissier 9388915dc6 HACKING: add note about refs/for/master
The fact that one needs to always push contributions to a single
remote reference (refs/for/master) might seem odd to people unfamiliar
with Gerrit. GitHub, for instance, hosts personal repositories where
developers typically create topic branches for each contribution and
use a proprietary mecanism to request a review (the "pull request").
More generally, one normally does not expect to be able to push
non-fast-forwarding stuff to a remote branch.

This commit adds a clarifying note to the patch guidelines.

Change-Id: Ia750b815b82b18e92b6109c07f451000dcbecf9b
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-on: http://openocd.zylin.com/4806
Tested-by: jenkins
Reviewed-by: Christopher Head <chead@zaber.com>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2019-01-08 09:46:04 +00:00
Jerome Forissier a6f5a16705 HACKING: replace refs/publish/master with refs/for/master
refs/publish/master is deprecated and gives a warning in newer Gerrit.
Replace with refs/for/master.

Change-Id: I56871cc6e80c014ba81f4458230cd67dc318ecb3
Suggested-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-on: http://openocd.zylin.com/4810
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2019-01-08 09:45:52 +00:00
Tim Newsome fd49f5e967 Make riscv_get_gdb_reg_list read the registers.
This may not be the correct behavior, but it gets me further through the
tests.

Change-Id: I6e9b77e927700de706b6ece723f4d530fa566761
2019-01-07 12:17:41 -08:00
Tim Newsome 6faa9ded26 Clean up debug printf.
I only need to see 64 bits of PC if the high bits are non-zero.

Change-Id: I29397791da1e3f1705e573b2eaafc3eac202e178
2019-01-07 12:16:51 -08:00
Tim Newsome f9af0b6cca Handler target_get_gdb_reg_list() better.
That function might change from NULL reg_list but then return failure.
In that case reg_list shouldn't be freed.

Change-Id: I5380630c871d056fb52e25bda16836e346bd74b2
2019-01-07 12:15:18 -08:00
Tim Newsome 4bb8bd005c Implement hwthread_get_thread_reg_list.
MulticoreRegTest now gets past the first check on all GPRs.

Change-Id: I35f3c51273542668985f7a86965c1e947fc12194
2019-01-07 08:48:49 -08:00
Tim Newsome a9d436e77f WIP make riscv work with -rtos hwthread.
Change-Id: I37bb16291fa87a83f21e5fd8bad53492a4d69425
2019-01-03 15:06:35 -08:00
Tim Newsome 0736929512 Neuter hwthread_get_thread_reg_list so it builds
Change-Id: I07cf72ea1874ca7cb5557677ecb751c931174419
2019-01-03 12:47:14 -08:00
Rod Boyce b3ed97a492 NOR: lpc2000 Add support for LPC84x devices
These devices differ from LPC8xx devices in that they have a different
IAP entry point, but everything else is the same.  Using Tcl to pass
different IAP entry point.
no new Clang analyser warnings and no new build sanitizers issues.

Change-Id: I2d654dd250f416e74262c0228cad8713a283402f
Signed-off-by: Rod Boyce <developer@teamboyce.co.uk>
Reviewed-on: http://openocd.zylin.com/4684
Reviewed-by: Jean-Christian de Rivaz <jcamdr70@gmail.com>
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-01-02 21:54:03 +00:00
Oleksij Rempel 8f777bc1a6 flash: nor: ath79: remove base calculation
Currently it is impossible to flash ELF with correct offsets. The reason
is a bogus offset calculation extracted from base.
Since any other spi drivers do not care about base, do the same for
ath79 as well.

Change-Id: I9e46e01c9e7a709c2d07da9203c634f302603afd
Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
Reviewed-on: http://openocd.zylin.com/4821
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-01-02 21:53:41 +00:00
Jānis Skujenieks 08e64a828c flash/nor/nrf5: set correct timeout for nvmc operations
Longest erase all FLASH for nRF5 series is 295.3 ms for nRF52832.
Timeout period now is set to 340 ms (295.3 + 15%)

Change-Id: Iae00ed7b634f111b9798db11e35e4e066d4aaa95
Signed-off-by: Jānis Skujenieks <janis.skujenieks@gmail.com>
Reviewed-on: http://openocd.zylin.com/4822
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-01-02 21:52:58 +00:00
Matthias Welwarsky a01b079440 rtos/hwthread: add hardware-thread pseudo rtos
This patch adds "hwthread", a pseudo rtos that represents cpu cores
in an SMP system as threads to gdb. This allows to debug SMP
system kernels in a more sensible manner and removes the current
atrocities of switching gdb manually between CPU cores to update
the context.

Change-Id: Ib781c6c34097689d21d9e02011e4d74a4a742379
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>

Source: http://openocd.zylin.com/#/c/3999
2019-01-02 13:16:13 -08:00
Tim Newsome ccc093ab82 Fix typo.
Change-Id: Ibdd26c5c524b10a3518fe708e9b7fc917b0cb1b6
2019-01-02 12:42:31 -08:00
Tim Newsome afb450af6f
Merge pull request #335 from aka-sps/merge-master-to-riscv
Merge master to riscv
2018-12-31 11:03:10 -08:00
Tarek BOUCHKATI db070eb85d target/arm_cti : export CTI APPPULSE and INACK register
this permits the full control of CTI from config files

Change-Id: Ia27ac8e12e08ec72da05f26dcbd81d24fa1a0f6f
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/4815
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2018-12-27 12:47:47 +00:00
Tarek BOCHKATI d1c7b0ab8a target/arm_cti: add debug message when an incorrect CTI register name is used
the patch also contains some typo fixes

Change-Id: Ia4267036068455144cdcbfdffed15518d48f445e
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/4816
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2018-12-27 12:47:35 +00:00
Jean-Christian de Rivaz 44009186cf command: Log the failed command name
Change-Id: I03938a845110002755636a9514b17a213bf1cc72
Signed-off-by: Jean-Christian de Rivaz <jcamdr70@gmail.com>
Reviewed-on: http://openocd.zylin.com/4808
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
2018-12-25 19:01:48 +00:00
Jean-Christian de Rivaz a15c11d7d0 Add LPC8Nxx and NHS3xx support.
Change-Id: I0bdbca8dd9b234aca355230af7269463c9f70bd1
Signed-off-by: Jean-Christian de Rivaz <jcamdr70@gmail.com>
Reviewed-on: http://openocd.zylin.com/4515
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-12-23 15:08:36 +00:00