Commit Graph

7687 Commits

Author SHA1 Message Date
Andreas Färber 5fba5068b7 breakpoints: Add missing space in error message
A space after the format specifier was missing.

Change-Id: Ib67eb0fb0d6e05d765206d30d5e4a74cb41bb47b
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/3715
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2016-10-17 09:21:14 +01:00
Andreas Färber da74594150 target: Fix working_area_phys_spec comment
working_area_phys_spec clearly refers to the physical, not virtual address.

Change-Id: I639ea00bb5d05e845b8a56815a571375849f1225
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/3714
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2016-10-17 09:21:06 +01:00
Paul Fertser 3ae41fcf82 jtag: drivers: mpsse: ignore error to detach kernel driver
This makes it possible to run OpenOCD as unprivileged user on FreeBSD.

Change-Id: If1182d09ad2d51f370ae7e6da02f19c7a21c66c9
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/3800
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2016-10-17 09:20:22 +01:00
Paul Fertser 67c9a5561e jtag: drivers: cmsis-dap: add TRST handling
Even when TRST and SRST are not present in reset_config we still should
set them appropriately (to 1) as we can't tristate them anyhow.

Change-Id: Iec5bcf09340136f5e6ccfb05fa2697c53fa6609f
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/3798
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2016-10-17 09:19:59 +01:00
Tomas Vanek 5fa3bfa074 flash Kinetis: fix mdm check_security regression in JTAG mode
Commit 6d5b4d709c causes failed assert
when JTAG transport is selected:

src/target/arm_adi_v5.h:346: dap_queue_ap_read:
  Assertion `ap->dap->ops != ((void *)0)' failed.

As check_security runs early in examine-start event, dap->ops must
be checked.

Change-Id: Ibd8312a3c668fbce834eed9790eabeed794117aa
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/3712
Tested-by: jenkins
Reviewed-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2016-10-17 09:17:37 +01:00
Vivien Didelot 9d98f8b7a7 tcl/board: add Linksys WAG200G config
The Linksys WAG200G router has a TI AR7 SoC and a 4MB Flash layout
similar to the Netgear DG834v3 router [1].

Below is an example of a successful flash recovery, using a TUMPA,
connected to the MIPS EJTAG 2.6 header (JP102) of the router.

     WAG200G [2]  TUMPA [3]
     Desc  Pin    Pin  Desc
    ------------------------
     nTRST   1    3   nTRST
     TDI     3    5     TDI
     TDO     5    13    TDO
     TMS     7    7     TMS
     TCK     9    9     TCK
     nSRST  11    15    RST
     GND     2    4     GND

Note that nSRST is optional to halt the CPU, but is required to probe
the flash. For instance, recover the kernel with:

    $ sudo ./src/openocd -s tcl \
      -f interface/ftdi/tumpa.cfg \
      -f tools/firmware-recovery.tcl \
      -c 'board linksys-wag200g;
          reset_config srst_only;
          flash_part kernel /path/to/kernel.bin;
          shutdown'

[1] https://wiki.openwrt.org/toh/linksys/wag200g
[2] https://www.linux-mips.org/wiki/JTAG#JTAG_headers
[3] http://www.tiaowiki.com/w/TIAO_USB_Multi_Protocol_Adapter_User's_Manual#20_PIN_JTAG_Connector

Change-Id: I952ba9f706e2e4f8f95ca03a5fa58f391ca030b6
Signed-off-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com>
Reviewed-on: http://openocd.zylin.com/3776
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2016-10-17 09:16:33 +01:00
Sean Cross 537c019ced tcl/board: add configuration for Novena's integrated FPGA
Change-Id: Iecd57c0ef59cfde98de36464a73436f57b0835e2
Signed-off-by: Sean Cross <xobs@kosagi.com>
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/3532
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2016-10-17 09:14:17 +01:00
Sandeep Mistry ca6ccad439 gdb server: Add back support to disable the gdb server via the gdb_port config
As per the documentation, used "disabled" as the value to disable, as this
is the same value to disable the telnet and tcl server.

Change-Id: Idc4a8580098ec1107dcc6e1f59e817ecdebc38ac
Signed-off-by: Sandeep Mistry <s.mistry@arduino.cc>
Reviewed-on: http://openocd.zylin.com/3175
Tested-by: jenkins
Reviewed-by: Cristian Maglie
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2016-10-17 09:11:10 +01:00
Tim Newsome 4eba841bfe Print when we're ready for gdb to connect.
This should help gdbserver.py to connect reliably to really slow targets
(ie. simulators).

Change-Id: I8e9adbaf2ebde11b44e15582f036622a2d00c1f9
2016-10-14 12:40:52 -07:00
Tim Newsome 3f6c2a9f78 Be quiet when the target is just running normally.
Change-Id: I7861f16ba6b1b5c1851787ce5d78c02aff0568f6
2016-10-13 10:51:53 -07:00
Tim Newsome cb93bb9035 Use an easily changed constant for timeout.
Change-Id: I7aace463b0bd9916580e950d60b2940879b27b2a
2016-10-11 16:26:19 -07:00
Tim Newsome 4882de94cc Display pc to the user in 'monitor reset init'.
Change-Id: Ifb8df31954dfc5a3badef4f0a29eb510a97310a2
2016-10-10 08:22:51 -07:00
Marc Schink f109a93075 libjaylink: Update for API changes
Update to latest libjaylink version and incorporate API changes.

The major change in libjaylink is a rework of the device discovery.
Please test device discovery extensively, especially with multiple
devices connected. All other changes in libjaylink are of minor
importance for OpenOCD.

Change-Id: I9a50e83f59557505ce29809c7762c5df1cec10eb
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/3735
Reviewed-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Steven Stallion <stallion@squareup.com>
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2016-10-07 12:54:25 +01:00
Marc Schink 8515da60a8 jlink: Adjust log verbosity of libjaylink
Currently, the log verbosity of libjaylink is not accessible from the
user interface. Therefore, changing the log verbosity of libjaylink is
only possible from within the J-Link driver source code which is not
acceptable for end users.

Output the libjaylink log messages through the logging module of
OpenOCD rather than directly to stderr.

Change-Id: I6bf7bf8f4c8a12fb9e955eeced68224545fa0b5c
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/3701
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2016-10-07 12:51:47 +01:00
Marc Schink 3c8832fe6e helper/log: Add log_vprintf_lf()
Add log_vprintf_lf() to enable the possibility to output log messages
with a variable argument list.

Change-Id: I7fd6e93db63a7d98f662df2881a42e4d923c3848
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/3709
Tested-by: jenkins
Reviewed-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2016-10-07 12:35:54 +01:00
Tim Newsome 80e8101292 Make OpenOCD build using -Og.
With -Og gcc doesn't perform as many optimizations, and as a result
warns about some code that it wouldn't otherwise warn about.

These fixes all assign values to otherwise uninitialized variables.

Change-Id: I9a6ea5eadd73673891ecfec568b8b00d78b596a5
Signed-off-by: Tim Newsome <tim@sifive.com>
2016-10-04 10:02:42 -07:00
Tomas Vanek 640894e731 cortex_m: fix autoincrement range of Cortex-M7
Cortex-M7 has autoincrement range only 1024 bytes,
surprisingly smaller than M3, M4.

Change-Id: I35ff1f0e093aac4af79f98eb3b8058d4295942d1
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/3737
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2016-10-04 16:17:30 +01:00
Andreas Fritiofson 9292899bf4 stm32f2x: Increase options write timeout
Large flash parts time out when unlocking. Mass erase time is specified
as 32 seconds worst case for some parts. Automatic mass erase is
probably not using x8 parallelism, though, but a too large timeout
shouldn't hurt.

Also, use the new define instead of hardcoded timeout when mass
erasing.

Change-Id: Ib5af60d52ed7d53277bfe7176c4c44f79d3a26bc
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/3738
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2016-10-04 16:16:59 +01:00
Robert Jordens 12aee423db xilinx_bscan_spi: port to new migen and clean-up
* port to new migen
* streamline package/part specification
* add pullup (Series3, Series6) and pullnone (Series7) for unused pins
  as xilinx impact/vivado do it.
* specify respective toolchains
* build Series7 with vivado (broader support, faster)
* point to prebuilt bitstreams at https://github.com/jordens/bscan_spi_bitstreams

Change-Id: Ibfef3d78f855b754425f3e6131e2e49fa111e09a
Signed-off-by: Robert Jordens <jordens@gmail.com>
Reviewed-on: http://openocd.zylin.com/3173
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Tested-by: jenkins
Reviewed-by: Robert Jördens
Reviewed-by: William D. Jones
Reviewed-by: Tim "mithro" Ansell <mithro@mithis.com>
2016-10-04 12:06:33 +01:00
Michael Dietz 400dbedaee nRF51: Fix bug in Code memory size.
The code memory size was a bug and seemed to be working by
accident since there happened to be 256 pages in the device that was
tested on which corresponded to 256kb.

Also don't fail if memory size != expected memory size based on hwid
as this hwid is unstable and should be used only for debug/diagnostics.

Change-Id: I4e98f7498a36c53fc51783eddfdaba704d30e3ca
Signed-off-by: Michael Dietz <mjdietzx@gmail.com>
Reviewed-on: http://openocd.zylin.com/3510
Tested-by: jenkins
Reviewed-by: Jiří Pinkava <j-pi@seznam.cz>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2016-10-04 11:53:39 +01:00
Andreas Fritiofson db6c6f5da4 ftdi: don't wait forever if we fail
Currently if ftdi device is removed, OpenOCD will stall forever.
Only kill -9 will help in this case.
This patch makes use of libusb timeout functions and
trying to break out of while loop if some error is detected.

[andreas.fritiofson@gmail.com]: Add missing retval check

Change-Id: I97506190e376026705f14ef9fe37dc811b99b3ac
Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/3419
Reviewed-by: Andreas Färber <afaerber@suse.de>
Tested-by: jenkins
2016-10-04 11:51:31 +01:00
Andreas Färber 5fd5699859 nds32: Fix typo in debug log
wathcpoint -> watchpoint

Change-Id: If84cfb5097ed17ef97491667c622ba7d870ac9c2
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/3673
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2016-10-04 11:49:59 +01:00
Andreas Färber 7919694832 x86_32_common: Fix typo in function name
pyhs -> phys

Change-Id: Ie7edc74f1693b42f26e1e8475a93a7a6b9255cdd
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/3672
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Tested-by: jenkins
2016-10-04 11:49:52 +01:00
Kent Brinkley 727f178ab9 mips: Added #define for scan_delay legacy mode default value
Believe in using defines to make maintenance easier.

Change-Id: I8edf151352131bbf2b884dfcd67ca5764b11b13c
Signed-off-by: Kent Brinkley <jkbrinkley.imgtec@gmail.com>
Reviewed-on: http://openocd.zylin.com/2350
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Tested-by: jenkins
2016-10-04 11:41:34 +01:00
Peter Kuhar 5108fb591b STM32L433 Flash support
Added new chip id based flash size.

Change-Id: I5b5e71074af0e50352443f66f88adfc6e14280bf
Signed-off-by: Peter Kuhar <peter@pkuhar.com>
Reviewed-on: http://openocd.zylin.com/3732
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2016-10-04 10:30:49 +01:00
Spencer Oliver 56e60b0982 stm32l4x: fix incorrect device id mask
Change-Id: I37cf9cbdd07dc3764d2c719b7c6ed5852aea3943
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/3799
Tested-by: jenkins
2016-10-04 10:30:44 +01:00
Tim Newsome a08cef7633 Change invalid access from error to user message.
It's not a failure in the debugger or even a real problem if a user asks
to access memory that's not accessible.

Change-Id: I30b8424d5265d1996fe4826012ed160a83f0bc6c
2016-10-03 08:15:04 -07:00
Tim Newsome e273e23f41 Fix off-by-one error in assert.
Also only do work for debug RAM that actually exists on the target
(exposing the off-by-one error on 32-bit targets).

Change-Id: I37e0005b6a70e949286f1d6494716f3abea03c12
2016-09-29 10:40:50 -07:00
Tim Newsome 4dbc9962d3 Clear dmode triggers when we first halt the target
This helps repeated runs of the testsuite pass, and is probably a good
idea in general.

Change-Id: I89ed167968f8b8817c66f1718f374d0c502780c7
2016-09-29 10:23:46 -07:00
Tim Newsome 78fe0b56db Deal with dbus being busy in all cases.
Change-Id: Ifede6e05c3c4538f22a52cd0e9833cf3a9983d04
2016-09-29 08:28:31 -07:00
Tim Newsome b04d5e8821 Read idle, and test all debug RAM.
Read dtmcontrol's idle field to decide how many run-test/idle cycles are
required to communicate with the target.

In riscv_examine(), write and read all of Debug RAM to check the target
is at least somewhat sane.

Change-Id: Ieedb7a50418fa1f5e0d456cde53c52f7fc51662b
2016-09-27 13:06:32 -07:00
Tim Newsome c67850b63d Only write to existing dram. Clear dbus error.
Old code would write 64 bytes of DRAM if the dbus was busy in
cache_write().

New code clears the dbus error condition when the bus is busy. (This
part is untested.)

Change-Id: Ia396fe819fa1828bb75726d85513b113cc9e13f0
2016-09-27 08:45:51 -07:00
Tim Newsome 54c65a9a4b Improve low-level logging.
Now logging is consistent and more readable.
I did remove most logging during riscv_poll() since it clutters up the
log/screen and is not generally helpful.
2016-09-23 14:16:24 -07:00
Tim Newsome 08228e6f53 Make more code use the scans "class".
Helps with consistency, and this is a rare commit that net deletes
lines.
2016-09-23 14:16:24 -07:00
Tim Newsome cf1dc0b6cb Implement hardware triggers that match spec.
It's basically working, but the following corner cases are failing:
    TriggerDmode
    TriggerLoadAddressInstant
    TriggerStoreAddressInstant
2016-09-23 14:16:24 -07:00
Tim Newsome 526bbc5284 Optimize read a bit.
Remove some unnecessary scans.
2016-09-23 14:16:24 -07:00
Tim Newsome c68b13ed67 Properly mark the cache as clean after its written
This reduces the number of scans, but I doubt it noticeably improves
performance.
2016-09-23 14:16:24 -07:00
Tim Newsome 243233c8b8 Convert some more code for 64-bit. 2016-09-23 14:16:24 -07:00
Tim Newsome b04f89076a Properly write 64-bit PCs. 2016-09-23 14:16:24 -07:00
Tim Newsome e3e745abb9 WIP for 64-bit support.
GPR register writes/reads seem to work.
2016-09-23 14:16:24 -07:00
Megan Wachs 7927e90a42 Prevent the State Machine from moving during runtest 2016-09-23 14:16:24 -07:00
Tim Newsome 2f1b6b5803 Stop using conditional writes.
It doesn't help, and makes the spec more complex. Now that I've proven
OpenOCD doesn't need it, I'll remove it from the spec.
2016-09-23 14:16:24 -07:00
Tim Newsome 5dbad6b0c9 Check for business in block reads. 2016-09-23 14:16:24 -07:00
Tim Newsome f8b0f4bf29 Check for exceptions in reads and writes. 2016-09-23 14:16:23 -07:00
Tim Newsome f5ae4d864c Add support for virtual priv register.
Users can use this register to inspect and change the privilege level of
the core. It doesn't make any assumptions about the actual underlying
debug mechanism (as opposed to having the user change DCSR directly,
which may not exist in all debug implementations).
2016-09-23 14:16:23 -07:00
Tim Newsome 5de81da8f4 Remove commented out code.
Also added back the initial check that confirms debug RAM is written
correctly.
2016-09-23 14:16:23 -07:00
Tim Newsome a916d204b9 Optimize memory read.
Saves 8s on the full test suite.
2016-09-23 14:16:23 -07:00
Tim Newsome 32e7a962c3 Write fence.i before dret.
Makes things work if the ROM doesn't contain fence.i (which is slow, so
Andrew took it out).
2016-09-23 14:16:23 -07:00
Tim Newsome 4ced71b1f1 Log more. 2016-09-23 14:16:23 -07:00
Tim Newsome 20e2bfe3db Quickly read all GPRs on halt.
gdb will ask for them anyway, and one by one is slow.
StepTest went from 9.7s to 5.3s.
2016-09-23 14:16:23 -07:00