Changes from the flat namespace to heirarchical one. Instead of writing:
#include "time_support.h"
the following form should be used.
#include <helper/time_support.h>
The exception is from .c files in the same directory.
Switch "mrc" and "mcr" commands to be toplevel ARM operations,
as they should initially have been.
Correct the usage message for both commands: it matches ARM
documentation (as one wants!) instead of reordering them to
match the funky mrc() and mcr() method usage (sigh).
For Cortex-A8: restore a line that got accidentally dropped,
so the secure monitor mode shadow registers will show again.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Uses chaining of command_registration structures to eliminate all
target_type register_callback routines. Exports the command_handler
registration arrays for those target types that are used by others.
Start using the arm_reg_current() call. This shrinks and speeds
the affected code. It can also prevent some coredumps coming from
invalid CPSR values ... the ARMV4_5_CORE_REG_MODE() macro returns
bogus registers if e.g. "Secure Monitor" mode isn't supported by
the current CPU.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Have arm_set_cpsr() handle the two core state flags, updating
the CPU state. This eliminates code in various debug_entry()
paths, and marginally improves handling of the J bit.
Catch and comment a few holes in the handling of the J bit on
ARM926ejs cores ... it's unlikely our users will care about
Jazelle mode, but we can at least warn of Impending Doom. If
anyone does use it, these breadcrumbs may help them to find
the right path through the code.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Define arm_reg_current() ... returning handle to a given register,
and encapsulating the current mode's register shadowing. It's got
one current use, for reporting the current register set to GDB.
This will let later patches clean up much ARMV4_5_CORE_REG_MODE()
nastiness, saving a bit of code.
Define and use arm_set_cpsr() ... initially it updates the cached
CPSR and sets up state used by arm_reg_current(), plus any SPSR
handle. (Later: can also set up for T and J bits.)
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Stash a pointer to the CPSR in the "struct arm", to help get rid
of the (common) references to its index in the register cache.
This removes almost all references to CPSR offsets outside of the
toplevel ARM code ... except a pair related to the current ARM11
"simulator" logic (which should be removable soonish).
This is a net minor code shrink of a few hundred bytes of object
code, and also makes the code more readable.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Add a new is_arm_mode() predicate, and use it to replace almost
all calls to current armv4_5_mode_to_number().
Eventually those internal mode numbers should vanish... along
with their siblings in the armv7a.c file.
Remove a handful of superfluous checks ... e.g. the mode number
was just initialized, or (debug entry methods) already validated.
Move one of the macros using internal mode numbers into the only
file which uses that macro. Make the tables manipulated with
those numbers be read-only and, where possible, static so they're
not confused with part of the generic ARM interface.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Add and use arm_mode_name() to map from PSR bits to user
meaningful names. It uses a new table which, later, can
be used to hold other mode-coupled data.
Add definitions for the "Secure Monitor" mode, as seen on
some ARM11 cores (like ARM1176) and on Cortex-A8. The
previous mode name scheme didn't understand that mode.
Remove the old mechanism ... there were two copies, caused
by Cortex-A8 needing to add "Secure Monitor" mode support.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
And move the rest of the vector_catch stuff into the C file;
it's not part of the module interface.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Same deal: "register.h" got needlessly included all over the
place because of being in a few widely included headers.
So take it out of the header files which included it, and put
it in files which use it ... reduce needless interdependencies.
Also, don't need that extra "types.h" inclusion.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
The arm7_9_checksum_memory() and arm7_9_blank_check_memory()
routines are not actually specific to the ARM7 and ARM9 core
generations ... they can work for any core which can run
algorithms using basic ARM (not Thumb) instructions.
Rename them; move the declarations to a more generic site;
likewise move the code (and tidy it a bit in the process).
NOTE: the blank_check() method falsely returned a success
status (0) on one error path, when the algorithm failed.
Fixed this bug.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
No point in having two identical examine methods for the
ARM7TDMI and ARM9TDMI drivers; move, rename, shrink, share.
Add a bit of doxygen; stop needlessly exporting a method.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Use target_to_arm920(), replacing needless pointer traversals
and simplifying. Stop setting arm9tdmi->arch_info for arm920
type parts, it's not used any longer.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Unneeded exports cause confusion about the module interfaces.
Make most functions static. Add a short header comment.
The forward decls are just code clutter; remove them, by moving
their references after definitions. This is another file which
never needed even one internal forward declaration.
This saved almost 900 bytes of code on x86_32; it seems the
compiler can leverage its knowledge that these functions are
not called from the outside world...
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
The arm920t has a concept of read modify write cycles
that may have to be represented in the mrcmcr interface
eventually.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
The quit entry point was not being invoked. Just a source
of confusion at this point. XScale ran 100x reset upon
quit, but that code made no sense, wasn't commented
and never invoke.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
To support breakpoints, flush data cache line and invalidate
instruction cache when 4 and 2 byte words are written.
The previous code was trying to write directly to the physical
memory, which was buggy and had a number of other situations
that were not handled.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
This is minimal patch to support FA526 ARMv4 compatible core.
Since it is very similar to ARM920T I tried to reuse as much
code as possible.
CPU and board configs will follow soon.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2292 b42882b7-edfa-0310-969c-e2dbd0fdcd60
this fn has something to do with the queue, which it does not as such.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2050 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- Move definition of 'struct target_type_s' into new 'target_type.h' file.
- Forward delclaration remains in target.h, with comment pointing to new file.
- Replaces #define with #include in source files.
git-svn-id: svn://svn.berlios.de/openocd/trunk@1971 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- Add DEFINE_TARGET_TYPE_S symbol in files that need it defined.
- Forward declare 'struct target_type_s' only, unless that symbol is defined.
git-svn-id: svn://svn.berlios.de/openocd/trunk@1969 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- cleaned up headers to match rest of code
- added missing svn props for previously added files
git-svn-id: svn://svn.berlios.de/openocd/trunk@987 b42882b7-edfa-0310-969c-e2dbd0fdcd60
converts a number of 'simple string lookup tables' into NVP tables.
These NVP tables will be used by various commands coming in the next patch.
git-svn-id: svn://svn.berlios.de/openocd/trunk@962 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Wrote a default flash erase check fn which uses CFI's target algorithm
w/fallback to memory reads.
- "flash info" no longer prints erase status as it is stale.
- "flash erase_check" now prints erase status. erase check can take a
*long* time. Work in progress
- arm7/9 with seperate srst & trst now supports reset init/halt
after a power outage. arm7/9 no longer makes any assumptions
about state of target when reset is asserted.
- fixes for srst & trst capable arm7/9 with reset init/halt
- prepare_reset_halt retired. This code needs to be inside
assert_reset anyway
- haven't been able to get stm32 write algorithm to work. Fallback
flash write does work. Haven't found a version of openocd trunk
where this works.
- added target_free_all_working_areas_restore() which can
let be of restoring backups. This is needed when asserting
reset as the target must be assumed to be an unknown state.
Added some comments to working areas API
- str9 reset script fixes
- some guidelines
- fixed dangling callbacks upon reset timeout
git-svn-id: svn://svn.berlios.de/openocd/trunk@536 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- switch to synchronous halt during connect. This fixes the bug
where poll() was not invoked between halt() and servicing the
'g' register packet
- halt() no longer returns error code when target is already halted, just
logs a warning. Only the halt() implementation can say anything
meaningful about why a halt() failed, so error messages are pushed
up to halt()
- fixed soft_reset_halt infinite loop bug in arm7_9_common.c. The rest
of the implementations are still busted.
- by using USER() instead of command_print() the log gets the
source + line #. Nice.
- no longer invoke exit() if soft_reset_halt fails. A reset can often
fix the problem.
git-svn-id: svn://svn.berlios.de/openocd/trunk@475 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- bugfix in server.c
- removed unused parameter from jtag_add_ir_scan et al. This
wasn't necessary in hindsight but anyway.
- arm11 source committed but not not in Makefile.am/target.c for now.
git-svn-id: svn://svn.berlios.de/openocd/trunk@341 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- added arch_state to show status of currently selected target
- simplified target->type->arch_state() api.
- clean up telnet output a bit
- fixed GDB output for arch_state
- removed a couple of unecessary exit()'s
- cleaned up error propagation a bit in a few places
git-svn-id: svn://svn.berlios.de/openocd/trunk@332 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- make ep93xx and at91rm9200 bitbang JTAG interfaces dependant on ARM host (thanks to Vincent Palatin)
- various whitespace fixes
- removed various warnings
- add support for Debian GNU/kFreeBSD (thanks to Uwe Hermann)
- fix OpenOCD compilation for various platforms (thanks to Uwe Hermann and Vincent Palatin)
- switched order of JTAG chain examination and validation (examine first, then multiple validation tries even if examination failed)
- added target_request subsystem to handle requests from the target (debug messages and tracepoints implemented, future enhancements might include
semihosting, all ARM7/9 only for now)
- added support for GDB vFlashXXX packets (thanks to Pavel Chromy)
- added support for receiving data via ARM7/9 DCC
- reworked flash writing. the 'flash write' command is now deprecated and replaced by 'flash write_binary' (old syntax and behaviour) and 'flash
write_image' (write image files (bin, hex, elf, s19) to a target).
- added support for AMD/ST/SST 29F400B non-cfi flashes
git-svn-id: svn://svn.berlios.de/openocd/trunk@190 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- added "prepare_reset_halt()" to target_type_t, which allows reset_halt to be prepared before a reset is asserted, possibly preventing communication with the target
- arm7/9 devices now use a breakpoint at 0x0 or reset vector catching for debug out of reset
git-svn-id: svn://svn.berlios.de/openocd/trunk@141 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- fix infinite recursion in target_init_handler (thanks to jw and Magnus Lundin)
- fix CFI flash handlign with buswidth < 32bit (thanks to Daniele Orio for reporting this)
- add support for reading JTAG device id (currently only as debug output on startup)
- cleaned up handling of EmbeddedICE registers. Supported functionality and register size now determined by EmbeddedICE version number.
- small cleanups/fixes
git-svn-id: svn://svn.berlios.de/openocd/trunk@124 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- added access to ARM920T vector catch register (via generic register mechanism)
- don't disable linefills on ARM920T cores - this lead to lockups when accessing lines already contained in cache
- read content of ARM920T cache and tlb into file (arm920t read_flash/read_mmu commands)
- memory reading improved on ARM7/9, can be further accelerated with new "arm7_9 fast_memory_access enable" command (renamed from fast_writes)
- made in_handler independent from in field (makes the handler more flexible)
- added timeout to ft2232 when using D2XX library
- fixed STR7x protection bit handling on second bank (thanks to Bernard)
- added support for using the OpenOCD on AT91RM9200 systems (thanks to Anders Larsen)
- fixed AT91SAM7 flash handling when not running from 32kHz clock (thanks to Anders Larsen)
git-svn-id: svn://svn.berlios.de/openocd/trunk@90 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Zachary T Welch
David Brownell
Øyvind Harboe
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oharboe
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