Commit Graph

363 Commits

Author SHA1 Message Date
Tomas Vanek 1d7176f50b psoc4: support for Cypress PSoC 41xx/42xx family
New NOR flash driver was derived from stm32lx.
Procedure ocd_process_reset_inner is overriden in psoc4.cfg
to handle reset halt and system ROM peculiarities.

Change-Id: Ib835324412d106ad749e1351a8e18e6be34ca500
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/2282
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2015-02-11 14:59:55 +00:00
Paul Fertser 873774992d flash/nor/stm32lx: use 0 base to autodetect second bank location
Change-Id: I3c296b3e276fcd4d92e4180fc0d2133eebfcc240
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/2503
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2015-02-04 22:02:45 +00:00
Uwe Bonnes 5ffe5b9b2c Add more STM32F3 IDs in target/stm32f3.cfg.
Change-Id: I4c4462aa025639c4d20e6fa23c8845a69e60afc5
Signed-off-by: Uwe Bonnes <bon@elektron.ikp.physik.tu-darmstadt.de>
Reviewed-on: http://openocd.zylin.com/2435
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2015-02-02 10:29:01 +00:00
Paul Fertser 5b6c29a457 tcl/target: add lpc8xx.cfg
This adds a trivial config for LPC8xx chips based on the already
existing infrastructure in lpc1xxx.cfg.

Change-Id: I7384df1f3c2e3e8ab767319728db5c4f8149480f
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/2464
Tested-by: jenkins
Reviewed-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Nemui Trinomius <nemuisan_kawausogasuki@live.jp>
2015-01-30 09:40:55 +00:00
Paul Fertser 064dc5daac tcl/target/stellaris: Snowflake supports SYSRESETREQ too
Change-Id: If4bf472ab8867c54a976bdb5803f7e4f79f350a8
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/2461
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-by: Ed Beroset <beroset@ieee.org>
2015-01-26 20:57:56 +00:00
Paul Fertser 38107ff966 tcl/target: consolidate Kinetis configs
Change-Id: I75fe6b239ff435f700459e7d7040616503fa458e
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/2460
Reviewed-by: Andreas Färber <afaerber@suse.de>
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2015-01-26 20:57:41 +00:00
Paul Fertser a1bbf4b75b cfg: add srst_nogate to the supported targets, remove from board configs
It depends on the particular target whether it can work with SRST
asserted or not, so this belongs to the target config rather than the
board config.

Also, this allows for simple

openocd -f myboard.cfg -c "reset_config connect_assert_srst"

command to be used whenever a user feels a need to connect to an
unresponsive target.

Change-Id: I3d8da9ae47088fc0c75a20bfdd20074be1014de0
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/2459
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2015-01-26 20:54:51 +00:00
Karl Palsson 1663a17d9d target/stm32xx: Endian is not configurable.
So remove it from all the configs, it's misleading, and leads to cargo
culting of config files.

Change-Id: I2b77e60d5e96f9759c7c9fc91b20e73be2e95d9a
Signed-off-by: Karl Palsson <karlp@tweak.net.au>
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/2446
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2015-01-15 23:26:18 +00:00
Karl Palsson 0ea9a66239 cfg: stm32l1: Use specific chipname
This should have been corrected earlier with the split of l1/l0 code
apart.

Change-Id: I87b94a310ae7e76318554a9cd2705348a942d58b
Signed-off-by: Karl Palsson <karlp@tweak.net.au>
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/2447
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2015-01-15 23:20:44 +00:00
Karl Palsson c3ec1940b5 stm32l: split l0/l1 support no jtag, different HSI settings
L0 is cortex m0+, so different id codes, SWD only, different addresses
for the clock speedup.  It has no endian options, no boundary scan.

Removed all L0 specific portions from L1 files, and renamed files to clarify
their purpose.  The deprecated stm32lx_stlink.cfg is kept as is, as it is only
around for backwards compatibility with prior releases.

Tested on STM32L053 Discovery and STM32L151 Discovery.

Has _not_ been tested with jtag on L1.

Change-Id: I8eea890d2f92a302d9e9c8a8832d218ee1b6bcfc
Signed-off-by: Karl Palsson <karlp@tweak.net.au>
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/2405
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-by: Juha Niskanen <juha.niskanen@haltian.com>
2014-12-03 09:10:21 +00:00
Juha Niskanen 12b41a3409 stm32: Fix L0/1xx CPUTAPID setting and add new L1xx BSTAPIDs
Fix script parse error, when using JTAG, introduced in
commit 0187ced9ed

Add several BS TAPIDs with comments about ST documentation.

Change-Id: I8d0370b244ccaf7ea0dbe1919bfad1915f7317d4
Signed-off-by: Juha Niskanen <juha.niskanen@haltian.com>
Reviewed-on: http://openocd.zylin.com/2376
Tested-by: jenkins
Reviewed-by: Rémi PRUD'HOMME <prudhomme.remi@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2014-12-03 09:07:54 +00:00
Uwe Bonnes 9c4d294654 tcl/target/stm32f4: ramp up JTAG speed, HSI is 16MHz there
Since all F4 parts have an internal HSI providing 16MHz, it's safe to
use 2MHz JTAG frequency by default.

Change-Id: I2702d5a1d642d4acd4af2db54c028949132c6900
Signed-off-by: Uwe Bonnes <bon@elektron.ikp.physik.tu-darmstadt.de>
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/2383
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2014-11-24 22:28:10 +00:00
Uwe Bonnes 41a968ec05 tcl/target/stm32f4x: add F401 and F411 IDs
Change-Id: I12079586dafb8a7614bdf4cc0b13cd5030301742
Signed-off-by: Uwe Bonnes <bon@elektron.ikp.physik.tu-darmstadt.de>
Reviewed-on: http://openocd.zylin.com/2379
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2014-11-24 22:27:52 +00:00
Spencer Oliver 1ea25b85bb cfg: remove incorrect execute permissions
Change-Id: I0ba9dfdf876bc99df4e2d1f1f3bc0c9ccc6c98c2
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/2333
2014-10-06 18:56:14 +00:00
Rémi PRUD'HOMME 0187ced9ed stm32: add L0xx CPUTAPID
Add CPUTAPID for stm32 L0xx mcu devices. Using -expected-id to
add the new id with the id for L1xx devices. This for reduce the
duplicated code.

Change-Id: I48bd230884ecf38fa200c620b547bdf3b5f59132
Signed-off-by: Rémi PRUD'HOMME <prudhomme.remi@gmail.com>
Reviewed-on: http://openocd.zylin.com/2315
Tested-by: jenkins
Reviewed-by: Andrey Yurovsky <yurovsky@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2014-10-06 18:41:20 +00:00
Andreas Fritiofson 1c021ed0af target: Remove "-variant" argument
Remove this underutilized feature. Despite the fact that a lot of configs
specifies a arbitrary "variant", only the xscale target actually defines
any.

In the case of xscale, the use of -variant is dubious since

1) it's used as a redundant irlen specifier,
2) it carries a comment that it doesn't really need it and
3) only two xscale configs even specify it.

If there's a future target that needs a variant set, a target specific
option could be added when needed.

Change-Id: I1ba25a946f0d80872cbd96ddcc48f92695c4ae20
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/2283
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2014-09-22 19:39:24 +00:00
Vanya Sergeev b5a6ba46aa cfg: refactor lpc1xxx targets onto one base config
Since now auto-detection for flash size works nicely, there's no
reason to keep numerous configs around.

Change-Id: If0cbc37985abf17ef7c1f7d0688e76500fac228f
Signed-off-by: Vanya Sergeev <vsergeev@gmail.com>
Reviewed-on: http://openocd.zylin.com/1960
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2014-09-08 23:05:08 +00:00
Бурага Александр 1e439e2a9a tcl/target: add config for К1879ХБ1Я, a hybrid ARM11/DSP SoC by RC Module
This adds config to allow JTAG debugging of an ARM core of a modern
hybrid SoC by Research Centre "Module"
(http://www.module.ru/en/company/). К1879ХБ1Я is targetted at set-top
boxes and other multimedia equipment, the official SDK is Linux-based.

Change-Id: Ib2ae5784d25699f952682e66b025a3f677a76d5d
Signed-off-by: Бурага Александр <dtp-avb@yandex.ru>
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/2272
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2014-09-08 22:26:35 +00:00
Paul Fertser b171c7ab16 tcl/target/imx6: add yet another SJC tapid
This is for mx6q TO1.1.

Change-Id: Id6af2ed232fc19be9bf49eb6d2df0004c6668698
Reported-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/2253
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2014-09-08 20:21:37 +00:00
Angus Gratton 6d26e3e768 nRF51822: Add workaround for PAN-16 where not all RAM blocks reliably enabled on reset
According to Nordic Semiconductor Product Anomaly Notice (document
NRF51822-PAN), item 16, some revisions of nRF51822 sometimes reset
without all RAM blocks enabled. This was noted on NRF51822-QFAA rev
CA/C0, only 8KiB of memory was accessible.

This patch turns on all RAM following a debugger induced reset
(matches specified behaviour.)

Change-Id: I4f8be4ec3d1271da7fe5bc9a084fdcb2968535bb
Signed-off-by: Angus Gratton <gus@projectgus.com>
Reviewed-on: http://openocd.zylin.com/2202
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2014-08-11 22:26:44 +00:00
Andrey Skvortsov 4949757473 tcl/target: added support for TI OMAP/AM 3505 and 3517
added TAPID for OMAP/AM 3505 and 3517. Tested on TAM3517 Twister board
with AM3517 SoC.

Change-Id: I78a3268a4adb18092c694a556538c99c9032f648
Signed-off-by: Andrey Skvortsov <andrej.skvortzov@gmail.com>
Reviewed-on: http://openocd.zylin.com/2127
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2014-08-11 21:27:21 +00:00
Paul Fertser c7384117c6 Allow transports to override the selected target (hla configs unification)
This should allow to share common configs for both regular access and
high-level adapters.

Use the newly-added functionality in stlink and icdi drivers, amend
the configs accordingly.

Runtime-tested with a TI tm4c123g board.

Change-Id: Ibb88266a4ca25f06f6c073e916c963f017447bad
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
[gus@projectgus.com: context-specific deprecation warnings]
Signed-off-by: Angus Gratton <gus@projectgus.com>
[andrew.smirnov@gmail.com: additional nrf51.cfg mods]
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Tested-by: Andrey Skvortsov <andrej.skvortzov@gmail.com>
Reviewed-on: http://openocd.zylin.com/1664
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2014-08-11 21:25:56 +00:00
Paul Fertser 333df54fb7 tcl/target/stm32l: restore slow clock on reset
Change-Id: I63eafaa38b188fe50c13ab966be44a3eaa2006b0
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/2188
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2014-07-10 21:18:45 +00:00
Andreas Fritiofson 518ce9e19e cfg: Rename leftover cortex_a8 -> cortex_a
Change-Id: Id11d89ae2fb78854da4284afb7f14d8a892a2e49
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/2197
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2014-07-08 19:33:18 +00:00
Paul Fertser 335bafbb25 Auto-select JTAG transport when appropriate
I looked through all the target configs after stripping comments and
such from them with sed to see what jtag-specific commands can appear
first, and it looks like all the meaningful combinations should be
covered.

Change-Id: I8d543407b7f4ac8aca7354ecd50e841c8a04d5f3
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/2179
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2014-06-28 09:35:38 +00:00
Andrey Smirnov ccf4d6d648 cortex_m: Do additional initialization during reset
SAM4L requires additional steps to be taken right after SYSRESETREQ is
issued in order to function robustly:

       - CMSIS-DAP DAP driver needs to explicitly check for sticky bit
         errors since it is possible for adapter to perform successful
         write opration, report no errors and then, under the hood, do
         some other things that will result in sticky bit being set.

       - Debugger needs to wait for security system to finish
         intialization and assert CDBGPWRUPACK before proceeding

This change is related to commit http://openocd.zylin.com/#/c/1995/

Change-Id: I741c95a809bfd60d930cec9482239e4796a62326
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Reviewed-on: http://openocd.zylin.com/2088
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-by: Andrey Yurovsky <yurovsky@gmail.com>
2014-06-28 09:30:09 +00:00
Paul Fertser f8a6a07149 tcl: introduce using_(jtag|swd|hla) helpers and use them in reset handler
Barely tested with plain SWD transport.

Change-Id: I48b59136bf4294ffed737dba01f1b30ef83aa86b
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/2003
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2014-06-28 09:28:12 +00:00
Paul Fertser 8878673aa9 tcl/target/fm3.cfg: use a CHIPNAME known by the flash driver
fm3 flash driver needs to know which chip variant is used.

This fixes "unknown fm3 variant: mb9bf500.cpu" error if the config is
used as is.

Change-Id: I500fcfb413f23ee246678cec5bd19d14139a28e2
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/2160
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2014-06-22 08:45:51 +00:00
Franck Jullien 712165f483 openrisc: add support for JTAG Serial Port
Change-Id: I623a8c74bcca2edb5f996b69c02d73a6f67b7d34
Signed-off-by: Franck Jullien <franck.jullien@gmail.com>
Reviewed-on: http://openocd.zylin.com/2162
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2014-06-22 08:39:08 +00:00
Tom Rini f9e82f3ffb tcl/target/am335x.cfg: Drop gdb-attach stanza
This isn't needed nor a recommended practice now, was a simple
copy/paste from amdm37x.cfg anyhow.

Change-Id: I064226dc859d7563cfad945b577279fc37448645
Signed-off-by: Tom Rini <trini@ti.com>
Reviewed-on: http://openocd.zylin.com/2068
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2014-06-22 08:30:39 +00:00
Paul Fertser c8c10f77dc tcl/target/kl25.cfg: add maximum speed specification
Maximum frequency wasn't tested on hardware but the docs seem to be
quite explicit and do not mention any restrictions for that.

Change-Id: Idcf58df5358d06525e683f07c76eedad8f0b292d
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/2120
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2014-06-01 18:31:42 +00:00
Paul Fertser 76a765adbc tcl: add ASUS RT-N66U config
CFI flashing verified with real hardware. RAM configuration wasn't
attempted.

Change-Id: I9185ab71430d799793befef708a15f62edba1663
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/2153
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2014-06-01 18:27:09 +00:00
Yegor Yefremov 1a06fc6047 KS869x: add new target
This patch adds Micrel's KS869x target. The configuration was taken from
http://www.mmnt.net/db/0/0/www.micrel.com/ethernet/8695 - Micrel's
FTP server i.e. their OpenOCD 7.0 package.

The only change compared to the original file is the removal of
reset configuration, as it belongs to the board configuration.

Change-Id: Ic8509aa5fe5ce3166a3129e1c055280a3b2b9312
Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com>
Reviewed-on: http://openocd.zylin.com/2125
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2014-05-16 07:10:04 +00:00
Andrey Smirnov 46101959a6 kinetis: Revise CPU un-securing code
Old version of the code had several problems, among them are:
 * Located in a generic ADI source file instead of some Kinetis
   specific location
 * Incorrect MCU detection code that would read generic ARM ID
   registers
 * Presence of SRST line was mandatory
 * There didn't seem to be any place where after SRST line assertion
   it would be de-asserted.
 * Reset was asserted after waiting for "Flash Controller Ready" bit
   to be set, which contradicts official programming guide AN4835
 * Mass erase algorithm implemented by that code was very strange:
   ** After mass erase was initiated instead of just polling for the
      state of "Mass Erase Acknowledged" bit the code would repeatedly
      initiate mass erase AND poll the state of the "Mass Erase
      Acknowledged"
   ** Instead of just polling for the state of "Flash Mass Erase in
      Progress"(bit 0 in Control register) to wait for the end of the
      mass erase operation the code would: write 0 to Control
      register, read out Status register ignoring the result and then
      read Control register again and see if it is zero.
 * dap_syssec_kinetis_mdmap assumed that previously selected(before
   it was called) AP was 0.

This commit moves all of the code to kinetis flash driver and
introduces three new commands:

o "kinetis mdm check_security" -- the intent of that function is to be used as
  'examine-end' hook for any Kinetis target that has that kind of
  JTAG/SWD security mechanism.

o "kinetis mdm mass_erase""  -- This function removes secure status from
  MCU be performing special version of flash mass erase.

o "kinetis mdm test_securing" -- Function that allows to test securing
  fucntionality. All it does is erase the page with flash security settings thus
  making MCU 'secured'.

New version of the code implements the algorithms specified in AN4835
"Production Flash Programming Best Practices for Kinetis K-
and L-series MCUs", specifically sections 4.1.1 and 4.2.1.
It also adds KL26 MCU to the list of devices for which this security
check is performed. Implementing that algorithm also allowed to simplify
mass command in kinetis driver, since we no longer need to write security
bytes. The result that the old version of mass erase code can now be
acheived using 'kinetis mdm mass_erase'

Tested on accidentally locked FRDM-KL26Z with KL26 Kinetis MCU.

Change-Id: Ic085195edfd963dda9d3d4d8acd1e40cc366b16b
Signed-off-by: Andrey Smrinov <andrew.smirnov@gmail.com>
Reviewed-on: http://openocd.zylin.com/2034
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2014-05-10 09:15:35 +00:00
Andrey Smirnov d92a2ac330 generalplus: Add configuration file for General Plus GP326XXXA series
Add configuration file for General Plus GP326XXXA series. Tested on
GP326833A on GPC-1737B board.

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Change-Id: I1ad0e22598b01317bbc823870a7a262e9192c595
Reviewed-on: http://openocd.zylin.com/2058
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2014-05-05 20:23:45 +00:00
Seth LaForge 3427cf2b7e cortex_a: fix endiannes issues on TI TMS570
The TI TMS470 and TMS570 series of processors are BE-32 processors,
despite BE-32 not being supported by ARM in the Cortex-R4 core. TI
hacked in BE-32 support, which requires odd swizzling in OpenOCD to
make memory reads and writes function correctly. In particular,
without this change, OpenOCD word reads and writes had the bytes
reversed, and halfword and byte packed reads were reading garbage.
In my testing, this change fixes these problems.

Change-Id: I21dd30f4b9003f20fcc85f674ab833407bb61f74
Signed-off-by: Seth LaForge <sethml@google.com>
Reviewed-on: http://openocd.zylin.com/2064
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2014-04-14 18:20:36 +00:00
Lee Bowyer 47830f0ebf tcl: bcm6348 target config, BT HomeHub v1 board config
Also add the board to the firmware recovery script.

Change-Id: I4f9c895dae171df7249e3b1c0563b288518b9fe0
Signed-off-by: Lee Bowyer <lee@sodnpoo.com>
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/2097
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2014-04-14 18:15:24 +00:00
Paul Fertser de9ebc5ce6 tcl/target: make milandr configs swd-compatible
Change-Id: Ibb34f0d7829b205341bcce511ffc2624bdfe2c75
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/1962
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2014-03-29 08:07:16 +00:00
Andrey Smirnov ba66b4c594 nrf51: Add UICR writing support
SoftDevice stack ihex binary, provided by Nordic expects being able to
write data necessary for its correct operation at the adresses inside UICR.
This patch exposes UICR region of flash as a second bank on the MCU to
facilitate that.

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Change-Id: Idbc140b8de027f60655f78043877b7c054eb06f9
Reviewed-on: http://openocd.zylin.com/2013
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2014-03-29 07:25:21 +00:00
Tim Sander 91a36fcf0a tcl: add Zynq-7000 target and Zedboard board configs
Change-Id: Ia7f2a57d1b32dda9936ad87e22635f7749ff3ce1
Signed-off-by: Tim Sander <tim@krieglstein.org>
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/2061
Tested-by: jenkins
2014-03-29 07:16:00 +00:00
Felipe Balbi 058163e32e cfg: add TI am43xx devices
This adds support for the am43xx SoC and the AM437x GP EVM and AM438x
ePOS EVM.

Change-Id: I09cbb09072f38e0e08fdd520dedb6e67d45056be
Signed-off-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Tom Rini <trini@ti.com>
Reviewed-on: http://openocd.zylin.com/2047
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2014-03-29 07:00:22 +00:00
Felipe Balbi 3201a104fe tcl: target: icepick: add icepick_d_tapenable procedure
instead of replicating icepick_d_tapenable in many of TI's newer
platforms, we can move to icepick.cfg and just call it from board TCL
configuration file.  This is similar to the C but has a few changes we
need to make.

Change-Id: I0ab48005ccd66cd5b67b919fb5e3b462288f211d
Signed-off-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Tom Rini <trini@ti.com>
Reviewed-on: http://openocd.zylin.com/2030
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2014-03-17 12:53:02 +00:00
Spencer Oliver 0694bc652d cfg: change default SAM4L cortex_m reset_config
From testing this target does not seem to support using SYSRESETREQ, change
the default to the safe VECTRESET.

This target also has other reset issues (srst not working) that will be
addressed in another patch.

Change-Id: Icfc78347dc71aa3a062ddea63190a818d7fbc760
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1995
Tested-by: jenkins
Reviewed-by: Angus Gratton <gus@projectgus.com>
2014-03-17 12:50:17 +00:00
Jörg Wunsch 122ec5fbe2 Make the Atmel SAM3 family SWD-aware
Atmel's SAM3 and SAM4 processor families are very close to each other
in many respects.  However, so far, only the SAM4 target script
contained the magic to allow using SWD, while SAM3 was tied to JTAG
only.  This e.g. prevented the CMSIS-DAP driver from accessing SAM3
devices as it only uses SWD transport (by now).

The patch pulls all the things from the SAM4 target script that are
also applicable to SAM3 devices.  With the patch, an Atmel CMSIS-DAP
debugger (Atmel-ICE) was proven to be able to successfully attach to a
SAM3S-EK evaluation kit.  I also cross-checked that accessing through
a SAM-ICE (Segger J-Link) still works with the patch.

Change-Id: I20dafbff8e1e9f967da950e48a56205586eeef8d
Signed-off-by: Jörg Wunsch <openocd@uriah.heep.sax.de>
Reviewed-on: http://openocd.zylin.com/2046
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2014-03-17 12:49:32 +00:00
Tim Kryger f91390f538 bcm281xx: Add bcm281xx SoC and bcm28155_ap board
Add support for Broadcom's dual A9 mobile SoC and its reference board.

Change-Id: Ia145b120043bddc89c44726066023154ae390788
Signed-off-by: Tim Kryger <tim.kryger@linaro.org>
Reviewed-on: http://openocd.zylin.com/1926
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2014-03-09 22:33:32 +00:00
Andrey Yurovsky 8e44a9663d Add support for the Atmel SAMG53
flash: at91sam4: add support for the SAMG53 family (this also covers the
SAMG51).  The SAMG5x parts have an EEFC (enhanced embedded flash controller)
which seems to be identical to the EFC that the sam4 driver supports.

Add a script for the Xplained Pro G53 board, this has the onboard CMSIS-DAP
debugger and a SAMG53N19.  Tested on this board and chip combination.

Change-Id: I12af50402cd2069b3c7380d92e6fe54816d6c045
Signed-off-by: Andrey Yurovsky <yurovsky@gmail.com>
Reviewed-on: http://openocd.zylin.com/1974
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2014-03-04 20:18:37 +00:00
Andrey Smirnov 7e4fb97559 nrf51: Implement the support for Nordic's nRF51 devices
Add support for Nordic's nRF51 chip series. Tested with nRF51822.

Change-Id: Id70f6fd76888cc595a353aefb84d25c4cd325d7d
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Reviewed-on: http://openocd.zylin.com/1945
Tested-by: jenkins
Reviewed-by: Andrey Yurovsky <yurovsky@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2014-02-24 12:09:04 +00:00
Fatih Aşıcı 12b34414db cfg: Make stm32f4x usable with SWD transport
Change-Id: Ib8f3b414ec3c31cf8a112e75efe003e2237c59bb
Signed-off-by: Fatih Aşıcı <fatih.asici@gmail.com>
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/1951
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-by: Nemui Trinomius <nemuisan_kawausogasuki@live.jp>
2014-02-24 11:56:29 +00:00
Adrian Burns 1338cf60b9 quark_x10xx: add new target quark_x10xx
Intel Quark X10xx SoC debug support added
Lakemont version 1 (LMT1) is the x86 core in Quark X10xx SoC
Generic x86 32-bit code is in x86_32_common.c/h

Change-Id: If2bf77275cd0277a82558cd9895b4c66155cf368
Signed-off-by: adrian.burns@intel.com
Reviewed-on: http://openocd.zylin.com/1829
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2014-02-11 13:07:29 +00:00
Spencer Oliver ebb71eb291 cfg: LPC17xx default to using SYSRESETREQ to reset target
Originally the LPC17xx user guide (UM10360 Rev 2) stated that SYSRESETREQ
was not supported, so this was the default cortex_m reset mode.

Rev 3 of the same user guide states that it is now supported.
This has been verified on a LPC1768 mbed platform, previously I have not
tested this functionality.

Change-Id: I4858248903981a1c93ce75016e67c9e02702fcc5
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1892
Tested-by: jenkins
Reviewed-by: Jörg Fischer <turboj@gmx.de>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2014-01-29 13:20:02 +00:00