Commit Graph

9724 Commits

Author SHA1 Message Date
Tomas Vanek 57c1e49180 flash/stm32f1x,f2x: fix endianess in slow fallback flash write
Use target_write_memory() instead of target_write_u16()

Change-Id: I2389fe7a5fa18c9bc9c1aad8b8ddd64608bf2566
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/6705
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2022-03-12 09:32:09 +00:00
Marc Schink 2586fec922 target/arm_tpiu: Fix usage of 'tpiu create'
Change-Id: I1ffad65a9e6d76f4d7fbbe249d8af3beb7e7692b
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: https://review.openocd.org/c/openocd/+/6860
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2022-03-05 13:24:18 +00:00
Marc Schink 4a4ca07da7 target/arm_tpiu: Fix 'tpiu create' parameter check
The current implementation crashes when executing 'tpiu create'
without an object name due to an invalid memory access. Pass 'argv'
instead 'goi.argv' to fix the problem.

While at it, match the style of the error message to the style used for
other Tcl commands. Especially, make the 'name' parameter mandatory.

Change-Id: Ib2b233f8556934af61608ae93d6405585c2c40b7
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: https://review.openocd.org/c/openocd/+/6329
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
2022-03-05 13:23:33 +00:00
Marc Schink 29e2a74516 target/arm_tpiu: Make error message easier to understand
Change-Id: Idddc31e34a67641c32d041c89d01fe2126ec5ddb
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: https://review.openocd.org/c/openocd/+/6328
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2022-03-05 13:23:00 +00:00
Marc Schink e8e62c5aca target/tcl: Add get_reg function
Change-Id: Id1be9554d1df2c07cec3161a0fd3a586fdf18246
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: https://review.openocd.org/c/openocd/+/5312
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2022-03-05 13:21:24 +00:00
Marc Schink da73280101 target/tcl: Add set_reg function
Change-Id: I97a01b93046cb7af289792489f77f5580312585a
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: https://review.openocd.org/c/openocd/+/5313
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2022-03-05 13:11:25 +00:00
Tarek BOCHKATI 8b740af10d flash/stm32l4x: fix maybe-uninitialized compiler error
using gcc (Ubuntu 9.3.0-17ubuntu1~20.04) 9.3.0 we get:
error: ‘retval’ may be used uninitialized in this function

fixes: 13cd75b6ec (flash/nor/stm32xx: fix segfault accessing Cortex-M part number)
Change-Id: I897c40c5d2233f50a5385d251ebfa536023e5cf7
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6861
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2022-03-01 08:36:52 +00:00
Antonio Borneo 103b1d68db gdb_server: check target examined while combining reg list
Commit 6541233aa7 ("Combine register lists of smp targets.")
assumes that all the targets in the SMP cluster are already
examined and unconditionally call target_get_gdb_reg_list_noread()
that will in turn return error if the target is not examined yet.

Skip targets not examined yet.
Add an additional check in case the register list cannot be built,
e.g. because no target in the SMP cluster is examined. This should
never happen, but it's better to play safe.

Change-Id: I8609815c3d5144790fb05a870cb0c931540aef8a
Fixes: 6541233aa7 ("Combine register lists of smp targets.")
Reported-by: Michele Bisogno <michele.bisogno.ct@renesas.com>
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6853
Tested-by: jenkins
Reviewed-by: Michele Bisogno <michele.bisogno.ct@renesas.com>
Reviewed-by: Tim Newsome <tim@sifive.com>
2022-02-26 15:37:34 +00:00
Antonio Borneo bc50b8f1b2 gdb_server: fix double free
Commit 6541233aa7 ("Combine register lists of smp targets.")
unconditionally assigns the output pointers of the function
smp_reg_list_noread(), even if the function fails and returns
error.
This causes a double free from the caller, that has assigned NULL
to the pointers to simplify the error handling.

Use local variables in smp_reg_list_noread() and assign the output
pointers only on success.

Change-Id: Ic0fd2f26520566cf322f0190780e15637c01cfae
Fixes: 6541233aa7 ("Combine register lists of smp targets.")
Reported-by: Michele Bisogno <michele.bisogno.ct@renesas.com>
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6852
Tested-by: jenkins
Reviewed-by: Michele Bisogno <michele.bisogno.ct@renesas.com>
Reviewed-by: Tim Newsome <tim@sifive.com>
2022-02-26 15:37:19 +00:00
Sean Anderson e84be7088d board: Add NXP LS1088ARDB
This adds a board file for the NXP LS1088ARDB. This only covers the
"primary" JTAG header J55, and not the PCIe header (J91). The only
oddity is that the LS1088A and CPLD are muxed by adding/removing a
jumper from J48. Unfortunately, it doesn't look like OpenOCD supports
this CPLD beyond determining the irlen, so it's not very useful. Those
who are interested in experimenting can define CWTAP to access the CPLD,
but the default is to access the CPU.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Change-Id: Ia07436a534f86bd907aa5fe2a78a326a27855a24
Reviewed-on: https://review.openocd.org/c/openocd/+/6849
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2022-02-26 15:36:38 +00:00
Sean Anderson d1278660af target: ls1088a: Add service processor
Normally the service processor is not necessary for debugging. However,
if you are using the hard-coded RCW or your boot source is otherwise
corrupt, then the general purpose processors will never be released from
hold-off. This will cause GDB to become confused if it tries to attach,
since they will appear to be running arm32 processors. To deal with
this, we can release the CPUs manually with the BRRL register. This
register cannot be written to from the axi target, so we need to do it
from the service processor target. This involves halting the service
processor, modifying the register, and then resuming it again. We try
and determine what state the service processor was in to avoid resuming
it if it was already halted.

The reset vector for the general purpose processors is determined by the
boot logation pointer registers in the device configuration unit.
Normally these are set using pre-boot initialization commands, but if
they are not set then they default to 0. This will cause the CPU to
almost immediately hit an illegal instruction. This is fine because we
will almost certainly want to attach to the processor and load a program
anyway.

I considered adding this as an event handler for either gdb-attach or
reset-init. However, this command shouldn't be necessary most of the
time, and so I don't think we should run it automatically.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Change-Id: I1b725292d8a11274d03af5313dc83678e10e944c
Reviewed-on: https://review.openocd.org/c/openocd/+/6850
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2022-02-26 15:36:16 +00:00
Sean Anderson 3fcfe4f196 target: Add support for ls1088a
The LS1088A is an octo-core aarch64 processor from NXP in the layerscape
family. The JTAG is undocumented, but I was able to figure things out
from the output of `dap info`. This is the first in-tree example of
using the hwthread rtos (as far as I know), so hopefully it can serve as
an example to other developers. There are some ETMs, but I was unable to
try them out because I got 'invalid command name "etm"' when trying to
test things out.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Change-Id: I9b0791d27d8c41170a413a8d86431107a85feba2
Reviewed-on: https://review.openocd.org/c/openocd/+/6848
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2022-02-26 15:30:36 +00:00
Sean Anderson b61eae1962 cpld: altera-epm240: Increase adapter speed
According to the datasheet, the minimum clock period with Vccio1 = 1.5V
(the lowest voltage supported) is 143ns, or around 6MHz. Set the default
adapter speed to 5 MHz.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Change-Id: I21cad33fa7f1e25e81f43b5d2214d1fa4ec924de
Reviewed-on: https://review.openocd.org/c/openocd/+/6847
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2022-02-26 15:29:52 +00:00
Sean Anderson d673521c39 cpld: altera-epm240: Add additional IDCODEs
This adds some additional IDCODEs from the datasheet. It also adds
support for customizing the tap name.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Change-Id: I7cda10b92c229b61836c12cd9ca410de358ede2e
Reviewed-on: https://review.openocd.org/c/openocd/+/6846
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2022-02-26 15:28:41 +00:00
Tomas Vanek 13cd75b6ec flash/nor/stm32xx: fix segfault accessing Cortex-M part number
Some of STM32 flash drivers read Cortex-M part number from
cortex_m->core_info.
In corner cases the core_info pointer was observed uninitialised
even if target_was_examined() returned true. See also [1]

Use the new and safe helper to get Cortex-M part number.

While on it switch also target_to_cm()/target_to_armv7m() to the safe
versions. This prevents a crash when the flash bank is misconfigured
with non-Cortex-M target.

Add missing checks for target_was_examined() to flash probes.

[1] 6545: fix crash in case cortex_m->core_info is not set
    https://review.openocd.org/c/openocd/+/6545

Change-Id: If2471af74ebfe22f14442f48ae109b2e1bb5fa3b
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Fixes: f5898bd93f (flash/stm32fxx.c: do not read CPUID as this info is stored in cortex_m_common)
Reviewed-on: https://review.openocd.org/c/openocd/+/6752
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
2022-02-25 20:28:02 +00:00
Tomas Vanek b53f5c2571 target/cortex_m: add Cortex-M part number getter
The getter checks the magic numbers in arch_info to detect eventual
type mismatch.

Change-Id: I61134b05310a97ae9831517d0516c7b4240d35a5
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/6751
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
2022-02-25 20:26:56 +00:00
Tomas Vanek e4ba76a003 target/armv7m,cortex_m: introduce checked arch_info cast routines
target_to_armv7m() and target_to_cm() do not match the magic number
so they are not suitable for use outside of target driver code.

Add checked versions of pointer getters. Match the magic number
to ensure the returned value points to struct of the correct type.

Change-Id: If90ef7e969ef04f0f2103e0da29dcbe8e1ac1c0d
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/6750
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2022-02-25 19:56:41 +00:00
Tomas Vanek 10b5ac9ccb target/cortex_m: fix target_to_cm() helper
The third parameter of container_of() should point to the same member
as target->arch_info points to, struct arm.

It worked just because struct arm is the first member in
struct armv7m_common.
If you move arm member from the first place, OpenOCD fails heavily.

Change-Id: I0c0a5221490945563e17a0a34d99a603f1d6c2ff
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/6749
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2022-02-25 19:53:18 +00:00
Simon Johansson 29912328f0 flash/nor/stm32f2x: Fix erase of bank 2 sectors
This commit corrects the erase function for stm32f2x when dealing with
sectors in bank 2, for STM32F42x/43x devices with 1MB flash.

On STM32F42x/43x with 1MB flash in dual bank configuration, the sector
numbering is not consecutive. The last sector in bank 1 is number 7, and
the first sector in bank 2 is number 12.
The sector indices used by openocd, however, _are_ consecutive (0 to 15
in this case). The arguments "first" and "last" to stm32x_erase() are of
this type, and so the logic surrounding sector numbers needed to be
corrected.
Since the two banks in dual bank mode have the same number of sectors, a
sector index in bank 2 is larger than or equal to half the total number
of sectors.

Change-Id: I15260f8a86d9002769a1ae1c40ebdf62142dae18
Signed-off-by: Simon Johansson <ampleyfly@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6810
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
2022-02-25 10:58:41 +00:00
Antonio Borneo 94e7535be8 .gitmodules: switch away from repo.or.cz
The host repo.or.cz is often offline, creating issues for cloning
and building OpenOCD from scratch.
Already 'jimtcl' developer has dropped repo.or.cz, triggering the
OpenOCD commit 861e75f54e ("jimtcl: switch to github").

Change also the link of the remaining submodules 'git2cl' and
'libjaylink' to their respective main repository.

Change-Id: Ib513237427635359ce36a480a8f2060e2fb12ba4
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6834
Tested-by: jenkins
Reviewed-by: zapb <dev@zapb.de>
2022-02-19 14:33:08 +00:00
Ben McMorran 254883597f rtos: threadx: Add hla_target support for ThreadX
Tested with an AZ3166 dev board (which uses the STM32F412ZGT6) running
the Azure RTOS ThreadX demonstration system.

Signed-off-by: Ben McMorran <bemcmorr@microsoft.com>
Change-Id: I44c8f7701d9f1aaa872274166321cd7d34fb1855
Reviewed-on: https://review.openocd.org/c/openocd/+/6829
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2022-02-14 20:25:20 +00:00
Antonio Borneo 37d506ae55 server: remove remaining crust from dropped eCos code
Commit 39650e2273 ("ecosboard: delete bit-rotted eCos code") has
removed eCos code but has left some empty function that was used
during non-eCos build to replace eCos mutex.

Drop the functions and the file that contain them.

Change-Id: I31bc0237ea699c11bd70921660f960ee406ffa80
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6835
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2022-02-14 15:13:34 +00:00
Tim Newsome 2c0a65baa2 Fix small memory leak.
See https://github.com/riscv/riscv-openocd/pull/672

Change-Id: Ia11ab9bcf860f770ea64ad867102c74b898f6b66
Signed-off-by: Tim Newsome <tim@sifive.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6831
Tested-by: jenkins
Reviewed-by: zapb <dev@zapb.de>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2022-02-14 15:13:11 +00:00
Ben McMorran 7307fd0e3f gdb_server: Include thread name as XML attribute
Explicitly providing a thread name in the "thread" element produces
better thread visualizations in downstream tools like IDEs.

Signed-off-by: Ben McMorran <bemcmorr@microsoft.com>
Change-Id: I102c14ddb8b87757fa474de8e3a3f6a1cfe10d98
Reviewed-on: https://review.openocd.org/c/openocd/+/6828
Tested-by: jenkins
Reviewed-by: zapb <dev@zapb.de>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2022-02-14 15:12:45 +00:00
Jacek Wuwer f998a2aaf1 Cadence virtual debug interface (vdebug) integration
Change-Id: I1bc105b3addc3f34161c2356c482ff3011e3f2cc
Signed-off-by: Jacek Wuwer <jacekmw8@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6097
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
Reviewed-by: zapb <dev@zapb.de>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2022-02-14 15:12:10 +00:00
Antonio Borneo 2a2636f138 doxygen: fix some function prototype description
Change-Id: I49311a643ea73143839d2f6bde976cfd76f8c67f
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6830
Tested-by: jenkins
2022-02-14 15:11:21 +00:00
Tim Newsome 49c40a7529 target/riscv: revive 'riscv resume_order'
This functionality was lost in [1], which was merged as commit
615709d140 ("Upstream a whole host of RISC-V changes.").
Now it works as expected again.

Add convenience macro foreach_smp_target_direction().

Link: [1] https://github.com/riscv/riscv-openocd/pull/567
Change-Id: I1545fa6b45b8a07e27c8ff9dcdcfa2fc4f950cd1
Signed-off-by: Tim Newsome <tim@sifive.com>
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6785
Tested-by: jenkins
2022-02-14 15:10:56 +00:00
Antonio Borneo a11fe473ea helper/list: add list_for_each_entry_direction()
Use a bool flag to specify if the list should be forward or
backward iterated.

Change-Id: Ied19d049f46cdcb7f50137d459cc7c02014526bc
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6784
Tested-by: jenkins
2022-02-14 15:10:41 +00:00
Antonio Borneo 16cc853bcf target/smp: use a struct list_head to hold the smp targets
Instead of reinventing a simply linked list, reuse the list helper
for the list of targets in a smp cluster.
Using the existing helper, that implements a double linked list,
makes trivial going through the list in reverse order.

Change-Id: Ib36ad2955f15cd2a601b0b9e36ca6d948b12d00f
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6783
Tested-by: jenkins
2022-02-14 15:10:10 +00:00
Zoltán Dudás 5ab74bde06 semihosting: User defined operation, Tcl command exec on host
Enabling a portion (0x100 - 0x107) of the user defined semihosting
operation number range (0x100 - 0x1FF) to be processed with the help of
the existing target event mechanism, to implement a general-purpose Tcl
interface for the target available on the host, via semihosting
interface.

Example usage:
- The user configures a Tcl command as a callback for one of the newly
	defined events (semihosting-user-cmd-0x10X) in the configuration
	file.
- The target can make a semihosting call with <opnum>, passing optional
	parameters for the call.

If there is no callback registered to the user defined operation number,
nothing happens.

Example usage: Configure RTT automatically with the exact, linked
control block location from target.

Signed-off-by: Zoltán Dudás <zedudi@gmail.com>
Change-Id: I10e1784b1fecd4e630d78df81cb44bf1aa2fc247
Reviewed-on: https://review.openocd.org/c/openocd/+/6748
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2022-02-05 21:40:17 +00:00
Pavel Kirienko dbbac5f11d semihosting: use open mode flags from GDB, not from sys/stat.h
Values defined in sys/stat.h are not guaranteed to match
the constants defined by the GDB remote protocol, which are defined in
https://sourceware.org/gdb/onlinedocs/gdb/Open-Flags.html#Open-Flags.
On my local system (Manjaro 21.2.1 x86_64), for example, O_TRUNC is
defined as 0x40, whereas GDB requires it to be 0x400,
causing all "w" file open modes to misbehave.

This patch has been tested with STM32F446.

Change-Id: Ifb2c740fd689e71d6f1a4bde1edaecd76fdca910
Signed-off-by: Pavel Kirienko <pavel.kirienko@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6804
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2022-01-29 18:25:21 +00:00
Tim Newsome 6541233aa7 Combine register lists of smp targets.
This is helpful when you want to pretend to gdb that your heterogeneous
multicore system is homogeneous, because gdb cannot handle heterogeneous
systems. This won't always works, but works fine if e.g. one of the
cores has an FPU while the other does not. (Specifically, HiFive
Unleashed has 1 core with no FPU, plus 4 cores with an FPU.)

Signed-off-by: Tim Newsome <tim@sifive.com>
Change-Id: I05ff4c28646778fbc00327bc510be064bfe6c9f0
Reviewed-on: https://review.openocd.org/c/openocd/+/6362
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2022-01-29 18:25:06 +00:00
Julien Massot 93f2276cdd aarch64: support for aarch32 ARM_MODE_UND
Fix:
unrecognized psr mode: 0x1b
cannot read system control register in this mode: (UNRECOGNIZED : 0x1b)

Change-Id: I4dc3e72f90d57e52c0fe63cb59a7529a398757b3

Signed-off-by: Julien Massot <julien.massot@iot.bzh>
Change-Id: Ifa5d21ae97492fde9e8c79ee7d99d8a2a871b1b5
Reviewed-on: https://review.openocd.org/c/openocd/+/6808
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2022-01-29 18:20:48 +00:00
Hans-Erik Floryd 5e0cc43838 tcl/board: Add EVB-LAN9255 config
Config for EVB-LAN9255, tested using Atmel-ICE debugger on J10
connector.

Signed-off-by: Hans-Erik Floryd <hans-erik.floryd@rt-labs.com>
Change-Id: I8bcf779e9363499a98aa0b7d10819c53da6a19e7
Reviewed-on: https://review.openocd.org/c/openocd/+/6812
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2022-01-29 18:20:07 +00:00
Hans-Erik Floryd efb0b116da flash/nor/atsame5: add LAN9255 devices
Support Microchip LAN9255 devices with embedded SAME53J MCU.

Signed-off-by: Hans-Erik Floryd <hans-erik.floryd@rt-labs.com>
Change-Id: Ia811c593bf7cf73e588d32873c68eb67c6fafad7
Reviewed-on: https://review.openocd.org/c/openocd/+/6811
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2022-01-29 18:18:53 +00:00
Adrien Grassein 666ff828b2 jtag: Add an option to ignore the bypass bit
Some CPU wrongly indicate the bypas bit in the codeid.
It's the case of the NanoXplore NG-ULTRA chip that export a
configurable (and potentially invalid) ID for one of
its component.
Add an option to ignore it.

Signed-off-by: Adrien Grassein <adrien.grassein@gmail.com>
Change-Id: Ic59743f23bfc4d4e23da0e8535fec8ca9e87ff1a
Reviewed-on: https://review.openocd.org/c/openocd/+/6802
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2022-01-22 10:20:17 +00:00
Antonio Borneo e3bda57982 target: use target_event_name()
We have the API target_event_name().
Use it to improve code readability.

Change-Id: Ic48d2227bdefe9af05aff99a871a45e0612e5254
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6790
Tested-by: jenkins
2022-01-22 10:19:48 +00:00
Antonio Borneo 492ac453ab log: fix memory leak when log to file is enabled
When log to file is enabled, the file is not closed by OpenOCD at
exit. This is reported by Valgrind as a memory leak that is still
reachable, as the internal buffers of 'FILE *log_output' are freed
by the automatic fclose() at exit.

Close the log file before exit.

Change-Id: Id472c0d04462035254a9b49ecb0a4037263c6f6f
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6789
Tested-by: jenkins
2022-01-22 10:15:48 +00:00
Antonio Borneo 1536e249f2 aarch64: dump a message when CTI is missing
If the CTI is not specified OpenOCD fails target's examination
without indicating the reason.

Drop an error message about the missing CTI.

Change-Id: I344537fb21cf38785796ba938e71890e04135509
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6788
Tested-by: jenkins
2022-01-22 10:15:01 +00:00
Antonio Borneo 5a8d32fcb9 doc: use the new jimtcl syntax for 'expr'
With jimtcl 0.81 the syntax of the TCL command 'expr' requires the
multiple arguments to be within curly brackets.

Update the examples in the documentation to follow the new syntax.
While there, split one example to avoid it to exceed the line size
during pdf document generation.

Change-Id: I91cca419f8273415ccb0c2ce369fc6ac476e34e5
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6809
Tested-by: jenkins
2022-01-22 10:13:36 +00:00
Doug Brunner aad8718058 flash/nor/efr32: fixed lockbits and user data
Changed flash driver to support writing to the user data page, as well as to any portion of the lockbits page above 512 bytes (the amount used for the actual page lock words). The top part of the lockbits page is used on at least the EFR32xG1 chips for the SiLabs bootloader encryption keys.

As presented to the user, the lockbits page is the same size as the other pages, but any attempt to write to its low 512 bytes is an error. To enforce this, efr32x_write is renamed to efm32x_priv_write and a wrapper function is provided in its place. If the user erases the lockbits page, the driver rewrites the cached lock words after the erase. When the driver erases the lockbits page in order to update the lock words, it first takes a copy of anything stored in the top part of the page, and re-programs it after the erase operation.

There are now multiple instances of flash_bank for each target, and the flash_bank instances must share their cached lock words to operate as intended. Therefore, when a bank is created, the global flash bank list is used to find any other banks that share the same target. Since some banks in the global list are invalid at the time free_driver_priv is called, reference counting is used to decide when to free driver_priv.

To avoid the need to find the lockbits flash_bank from another flash_bank, efm32x_priv_write and efm32x_erase_page now take an absolute address.

There didn't seem to be any reason to prohibit unprotecting individual flash pages, so that limitation is removed from efm32x_protect().

This addresses ticket #185.

Valgrind-clean, except for 2x 4kiB not freed/still reachable blocks that were allocated by libudev.
No new Clang analyzer warnings, no new sanitizer warnings.

Signed-off-by: Doug Brunner <doug.a.brunner@gmail.com>
Change-Id: Ifb22e6149939d893f386706e99b928691ec1d41b
Reviewed-on: https://review.openocd.org/c/openocd/+/6665
Tested-by: jenkins
Reviewed-by: Fredrik Hederstierna <fredrik.hederstierna@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2022-01-05 17:57:08 +00:00
Tim Newsome d27d66bc1b Document how vector registers are exposed to gdb.
See https://github.com/riscv/riscv-openocd/pull/570

Change-Id: Ie7cdef3717e107a9df0b48316cfbc547dea9a7fd
Signed-off-by: Tim Newsome <tim@sifive.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6776
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2021-12-24 15:13:14 +00:00
Marc Schink 0cbb0c3ccc contrib/udev: Add missing J-Link USB PID
See libjaylink/contrib/99-libjaylink.rules

Change-Id: I36733e18eb4bc11828c5fa563c687d28be9e34bd
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: https://review.openocd.org/c/openocd/+/6778
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2021-12-24 15:12:39 +00:00
Tim Newsome 3ba21e5f00 target/riscv: calloc() memory per register.
This replaces a static array with 8 bytes per register. When there are
vector registers larger than 8 bytes, they would end up clobbering each
other's values. I can't believe I didn't catch this earlier.

See https://github.com/riscv/riscv-openocd/pull/658

Change-Id: I9df4eaf05617a2c8df3140fff9fe53f61ab2b261
Signed-off-by: Tim Newsome <tim@sifive.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6775
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2021-12-24 15:10:20 +00:00
Antonio Borneo 9828c0a440 semihosting: use macro COMMAND_HANDLER
We have the macro
	#define COMMAND_HANDLER(name) \
		static __COMMAND_HANDLER(name)
Use it!

Change-Id: I0e5385cb54197c743348f0d2ce215c93b8e396a4
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6786
Tested-by: jenkins
2021-12-24 15:07:26 +00:00
Antonio Borneo 5795f4d3ef gdb_server: fix a comment in gdb_new_connection()
On 2008-03-05, before git's age, commit 6d95014674 adds a
comment about unobserved ACK supposedly sent by GDB at connection.

The ACK is sent since GDB 3.95 (1999-05-04), but a bug introduced
in GDB 6.5 (2006-06-21) and fixed in GDB 7.0 (2009-10-06) makes
GDB sending the query for "supported packets" before sending the
ACK. Due to the bug, the author of the commit failed to see the
ACK.

Change-Id: I574a8013e7d159d1c71087af83b7c2ce92be86bd
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6769
Tested-by: jenkins
2021-12-18 17:26:36 +00:00
Antonio Borneo 29e689ede6 openocd: add keep_alive during command sleep
The command sleep holds the host CPU until it completes.
Send keep_alive to GDB, so it will not timeout.

Change-Id: I92e9c5fc871b4e6a7695cdc449ca9fb3c1f1d9ec
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6770
Tested-by: jenkins
Reviewed-by: Jan Matyas <matyas@codasip.com>
2021-12-18 17:23:34 +00:00
Tomas Vanek 33fa237b2f target/cortex_m: minor refactoring in cortex_m_store_core_reg_u32()
Unlike cortex_m_load_core_reg_u32() storing core register uses
the same code pattern around DHCSR read as offered by the convenience
helper cortex_m_read_dhcsr_atomic_sticky().

Use the helper.

Change-Id: Ia947204944a8b549f3c2be7fb2f717aad18970c4
SeeAlso: 65d7629183 (cortex_m: poll S_REGRDY on register r/w)
SeeAlso: 0dcf95c717 (target/cortex_m: cumulate DHCSR sticky bits)
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/6767
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2021-12-18 17:23:04 +00:00
Tomas Vanek 1e07079dee jtag/drivers/vsllink: fix memory leak
Close libusb context in vsllink_quit()

Change-Id: I85da8d7228b1b2b033a32b2f9ae9ed0726546b55
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/6766
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2021-12-18 17:22:24 +00:00
Jaehoon Park fdf17dba56 flash/nor/spi: add micron MT25QU01G
1Gbit SPI flash on VCU118 Rev. 2.0

Contributed to riscv-openocd in https://github.com/riscv/riscv-openocd/pull/487

Signed-off-by: Tim Newsome <tim@sifive.com>
Change-Id: I93447dd970d9901a671567fe8ab9e407432f8db9
Reviewed-on: https://review.openocd.org/c/openocd/+/6764
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
2021-12-11 17:49:46 +00:00